Core Software Research Articles

The Design and Performance of GPS Phase II User Equipment Navigation Software

This paper describes the design of Navigation Software implemented for the family of GPS User Equipment developed by Rockwell-Collins for the USAF NAVSTAR GPS Phase IIB Program. The family consists of one channel, two channel and five channel sets. The goal of the software design was to maximize commonalty of software functions across the entire family while minimizing the modifications required for new applications. The one channel set is specifically targeted to the manpack/vehicular application, while the two and five channel sets are generic sets adaptable to many applications. Adaptation to a particular host vehicle requires modification of only an outer layer of software modules, leaving the core software—including the navigation function—intact. The one channel navigation function centers around an 8-state Kalman filter processing measurements from one satellite every second. The navigation function of the two and five channel sets is common to both families at the object code level and centers around a 12-state Kalman filter. This filter runs at 1 Hz in one of three basic modes, in conjunction with high iteration rate processing of host vehicle sensor data that enables the maintenance of a navigation solution close to real time. This solution is used to aid satellite signal acquisition and tracking and may be used by host vehicle subsystems. This paper also discusses certain special features such as adaptive process noise, under-determined operation, and handling of INS resets. It concludes with a sample of performance data from in-plant and field tests.

A core software concept for integrated control

circles of radius 1, 2, or 3 ft with an additional asymmetric marker 1 ft beyond the circle on the y axis. There was little change in error with the simulated change in attitude. The values of the error were calculated at each distance and plotted against the log of the distance. The changes over the distance from 6.25 to. 200 ft were so small as to not affect the standard error by as much as 0.2 deg. Results from a typical set of runs are shown in Table 1. The ratios between the standard deviations of the errors were predicted to be inversely proportional to the square roots of the numbers of markers, roughly 1.36. The simulation yielded 1.58, 1.38, and 1.31 for 1, 2, and 3 ft, respectively. The ratios of standard deviations at different distances were compared in Table 2 where oj represents the standard deviation for a circle of radius y. To explore the effect of an increase in the accuracy of the scanning laser radar, in some of the runs it was assumed that each marker was read three times and the result averaged to get a more accurate position rading. The predicted ratio between the standard errors was 0.577. When run with 13 reflectors and a radius of 3 ft, this gave a standard error of 0.49±0.04 deg. The ratio of the corresponding standard errors was 0.568.

Availability analysis of a N modules parallel system with common memory, central controller and distributed software

Parallel systems with processing distributed in the various modules are very interesting examples of hardware/software tradeoffs within a complex structure. An example of such a system mode of N modules, has been considered. The implications of a common memory and a central controller are analysed and an availability model is derived. The division of the software task into subtasks is viewed as a source of possible deadlock of the structure. Series catastrophic states due to hard core units and software coupling are included in the availability analysis.

FTMP—A highly reliable fault-tolerant multiprocess for aircraft

FTMP is a digital computer architecture which has evolved over a ten-year period in connection with several life-critical aerospace applications. Most recently it has been proposed as a fault-tolerant central computer for civil transport aircraft applications. A working emulation has been operating for some time, and the first engineering prototype is scheduled to be completed in late 1979. FTMP is designed to have a failure rate due to random causes of the order of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-10</sup> failures per hour, on ten-hour flights where no air-borne maintenance is available. The prefered maintenance interval is of the order of hundreds of flight hours, and the probability that maintenance will be required earlier than the preferred interval is desired to be at most a few percent. The design is based on independent processor-cache memory modules and common memory modules which communicate via redundant serial buses. All information processing and transmission is conducted in triplicate so that local voters in each module can correct errors. Modules can be retired and/or reassigned in any configuration. Reconfiguration is carried out routinely from second to second to search for latent faults in the voting and reconfiguration elements. Job assignments are all made on a floating basis, so that any processor triad is eligible to execute any job step. The core software in the FFMP will handle all fault detection, diagnosis, and recovery in such a way that applications programs do not need to be involved. Failure-rate models and numerical results are described for both permanent and intermittent faults. A dispatch probability model is also presented. Experience with an experimental emulation is described.

Maintenance strategies for PCM circuit switching

During all the system design phase of an SPC switching system, a considerable effort is devoted to maintenance, both from a hardware and software point of view. The maintenance phases include fault detection, fault analysis (e.g., identification of the faulty security block within the switching system), fault isolation, fault reporting, fault localization, fault clearance, and restoration to service with the eventual requalification and reinitialization of the repaired security block. The paper mainly discusses fault detection and fault analysis strategies with specific reference to PCM digital switching systems. Different means leading to fault detection are presented with reference to central control, network access devices (scanners, drivers, markers), and digital switching network (duplicated or not duplicated). These means include automatic on-line tests (monitoring and routining), on-demand on-line tests, and alarm handling. Fault analysis can be accomplished by means of a deductive or a statistical method. As the latter seems more attractive, three basic methods of statistical fault analysis are presented. They use, respectively, two counters (operation and fault counter) per security block; one fault counter per security block; one "historical" fault stack, in which all the identities of security blocks involved in faulty operations are stored. The above fault analysis strategies are compared mainly in terms of core memory occupancy, processor time, and software complexity.