Capacitor Converter Research Articles

English

Converters and inverters are central power processing circuits in solar photovoltaic power generation systems. Recent surveys reported that power switches and electrolytic capacitors in converters and inverters are prone to failure due to thermal effects and electrical stress. Damage of any single component either reduces the efficiency or malfunction the entire system. Since PV power stations are remotely located ,fault diagnosis and repairing of power processing stages takes few hours to months depending upon service provided by the manufacturer. If it takes more time for fault diagnosis and fault removal, it results in zero or less amount of power generation thereby decreasing the efficiency. Since the power switchesare the central part of converters , this article presents an overview of known power switch faults, switch fault monitoring, diagnosis and fault tolerant schemes in the converters of photovoltaic application. Authors of this article have a confidence that providing fault diagnosis and tolerance competence to PV power station will contribute to improve the system efficiency and reliability.

Robust Time-Delay Control for the DC–DC Boost Converter

This paper studies a robust control for regulating a boost converter capacitor output voltage. The boost converter is inherently a highly nonlinear system that displays interconnected state variables and system parameter variations due to load change with input disturbances. Therefore, a robust control scheme is required to cope with these characteristics. The main objective of controlling the capacitor output voltage is to keep the output voltage constant under input voltage variations with fast response, and little overshoot and ripples. To satisfy this objective, a robust control with time-delay concept is introduced. The control utilizes time-delayed switching input to the converter, as well as output current and voltage variables, to replace the unknown dynamics and disturbance. To prove the effectiveness of the algorithm, two operating point variations are considered: variations in source voltage, and changes in output load. Simulations are performed using MATLAB/Simulink to show the effectiveness of the algorithm by choosing the output voltage lift, drop, settling time, and ripples as the system performance criteria. Then, a comparison of the results is made of the proportional and integral control, and the sliding mode control. An experimental test is also performed to demonstrate the effectiveness of the system.

Modular Realization of Capacitive Converters Based on General Transposed Series–Parallel and Derived Topologies

The realization of capacitive converters based on a modular approach is presented and analyzed in this paper. The converters are based on topologies with identical capacitors. First, the switching network (SN) of a basic series-parallel topology is presented. The analysis reveals the assembly and growth rules for expanding the topology to any number of capacitors. Subsequently, the SN for the more versatile and complex general transposed series-parallel (GTSP) topology is presented. The topology is expanded by defining a basic cell comprising a capacitor and five peripheral switches. The expansion of this converter improves its performance by ameliorating accuracy and regulation in the dc/dc voltage ratio. The control schemes of these converters are also presented with emphasis on the GTSP topology, whose switches are not assigned in advance. The control scheme for achieving the desired voltage ratio is described. A five-capacitor converter with its control is built to illustrate the theory in open-loop mode, which provides experimental results that are in full agreement with the analytical predictions.

Capacitive Readout Circuit for Tri-axes Microaccelerometer with Sub-fF Offset Calibration

This paper presents a capacitive readout circuit for tri-axes microaccelerometer with sub-fF offset calibration capability. A charge sensitive amplifier (CSA) with correlated double sampling (CDS) and digital to equivalent capacitance converter (DECC) is proposed. The DECC is implemented using 10-bit DAC, charge transfer switches, and a chargestoring capacitor. The DECC circuit can realize the equivalent capacitance of sub-fF range with a smaller area and higher accuracy than previous offset cancelling circuit using series-connected capacitor arrays. The readout circuit and MEMS sensing element are integrated in a single package. The supply voltage and the current consumption of analog blocks are 3.3 V and 230 μA, respectively. The sensitivities of tri-axes are measured to be 3.87 mg/LSB, 3.87 mg/LSB and 3.90 mg/LSB, respectively. The offset calibration which is controlled by 10-bit DECC has a resolution of 12.4 LSB per step with high linearity. The noise levels of tri-axes are 349 μg/√Hz, 341 μg/√Hz and 411 μg/√Hz, respectively.

Research on Short-Circuit Discharge Characteristics of Capacitive Circuits Based on Safety Spark Test Apparatus

Based on the safety spark test apparatus, the short-circuit spark discharge (SCSD) characteristics of the simple capacitive circuit and switching converter are studied. It is pointed out that their SCSD process can be divided into four stages, that is, dielectric-breakdown stage, spark-generated stage, spark-maintenance stage, and spark-extinguish stage; moreover, there is different equivalent spark resistance in each stage. For the simple capacitive circuit, its spark resistance is larger and maintaining voltage is almost unchanged in the spark-maintenance stage. For the switching converter, its output short-circuit characteristics depend strongly on the load resistance and its maintaining voltage reduces rapidly with the decrease of the load resistance. The circuit model is proposed, which can simulate the output SCSD process of the switching converter. By using the least-squares method, the relationship expressions between the discharge duration and capacitance in each time-stage are derived and the corresponding equivalent resistance is obtained. The mathematical models are established, and the expressions of the discharge current and voltage are deduced. Experiment and simulation results are positive in the analysis showing the feasibility of the proposed models.

Modeling and Optimization for Capacitive Converter of Energy Harvester

A new converter with spherical cap for energy harvesting is proposed. Based on the method of separated variables within the toridal coordinate system, a corresponding analytical model for spherical cap converter is further established so as to obtain the analytic expressions of the topology capacitance and the output voltage. The concept of energy increment factor is specifically defined to denote the improvement of energy storage efficiency.

100 mV–1.2 V fully‐integrated DC–DC converters for thermal energy harvesting

Two fully-integrated DC/DC converters for energy harvesting applications are presented. The startup-voltages of the converters are, respectively, 140 and 100 mV, the output voltage exceeds 1.2 V, with a power efficiency of about 20%. The architectures for boosting such extremely low voltages are based on an ultra-low-voltage oscillator cross connected to a capacitive converter. The overall circuits do not require any external components and can be fully integrated in a standard complementary metal oxide semiconductor low-voltage technology. The converters have been designed in United Microelectronics Corporation 180 nm process.

Modeling and Optimization of Capacitive Converter for Energy Scavenging System

A new converter with spherical cap for energy scavenging is proposed. Based on the method of separated variables within the torrid coordinate system, a corresponding analytical model for spherical cap converter is further established so as to obtain the analytic expressions of the topology capacitance and the output voltage. The concept of energy increment factor is specifically defined to denote the improvement of energy storage efficiency. With regard to spherical cap converters of different dimensions, the measured values of energy increment factor coincide well with the theoretical equivalents, indicating an effective verification of the proposed analytical model for the spherical cap converter topology.

An MCT-Based Bit-Weight Extraction Technique for Embedded SAR ADC Testing and Calibration

This paper presents a self-testing and calibration technique for the embedded successive approximation register (SAR) analog-to-digital converter (ADC) in system-on-chip (SoC) designs. We first proposed a low cost design-for-test (DfT) technique that estimates the SAR ADC performance before and after calibration by characterizing its digital-to-analog converter (DAC) capacitor weights (bit weights). Utilizing major carrier transition (MCT) testing, the required analog measurement range is only about 1 LSB; this significantly reduces test circuitry complexity. Then, we develop a fully-digital calibration technique that utilizes the extracted bit weights to correct the non-ideal I/O behavior induced by capacitor mismatch. Simulation results show that (1) the proposed testing technique achieves very high test accuracy even in the presence of large noise, and (2) the proposed calibration technique effectively improves both static and dynamic performances of the SAR ADC.

Analysis of modular multilevel converter capacitor voltage balancing based on phase voltage redundant states

This study provides mathematical analysis for the pulse width modulation and capacitor voltage balancing of a three-level modular converter, using voltage phase redundant states. Simulation and experimentation validate the analysis presented and highlight the distinct features of the modulation and capacitor voltage balancing strategies used in terms of effective switching frequency per device, device current and voltage stresses compare to other methods in the literature. The study also presents a simple modulation strategy that can be used in conjunction with the presented capacitor voltage balancing strategy for modular multilevel converters with a large number of cells per arm.

Efficiency of thermoelectric conversion in ferroelectric film capacitive structures

Thermal heating/cooling conditions for metal-insulator-metal structures based on barium strontium titanate ferroelectric films are studied by numerical methods with the aim of their application in capacitive thermoelectric converters. A correlation between the thermal and capacitive properties of thin-film ferroelectric capacitors is considered. The time of the temperature response and the rate of variation of the capacitive properties of the metal-insulator-metal structures are determined by analyzing the dynamics of thermal processes. Thermophysical calculations are carried out that take into consideration the real electrical properties of barium strontium titanate ferroelectric films and allow estimation of thermal modulation parameters and the efficiency of capacitive thermoelectric converters on their basis.

New Control Strategy of Three-Phase Five-Level NPC Rectifier -Inverter System for Induction Machine Drive

This paper proposes a control strategy of a three –phase five-level double converter for induction motor drives. The converter consists of the five-level NPC rectifier, DC link, and the five-level NPC inverter. In this control strategy, the DC link voltages are controlled by using a closed loop with an optimized stabilization system called clamping bridge. It provides a fast and flexible control of the converter capacitor voltage. This method will redress the imbalance of DC link voltage. This control strategy is completely independent from the load control, leading to a simpler implementation. The three-phase five-level NPC rectifier-inverter system is an ideal interface between a utility and renewable energy sources such as photovoltaic or wind generator.

PEN/Si3N4 bilayer film for dc bus capacitors in power converters in hybrid electric vehicles

High performance hybrid bilayer capacitor film has been developed by controlled deposition of silicon nitride (Si3N4) on polyethylene naphthalate (PEN). It was found that silicon nitride prepared with plasma-enhanced chemical vapor deposition can significantly increase the dielectric constant (K) and energy density of PEN by more than 20% and 50%, respectively. Moreover, the PEN/Si3N4 bilayer hybrid film also exhibits appropriate mechanical and thermal properties for capacitor winding. The high operating temperature and energy density of the PEN/Si3N4 bilayer dielectric film are very attractive for dc bus capacitors used in power inverters or converters found in hybrid electric vehicles, wind turbine generators, grid-tied photovoltaics, and smart grid, as well as pulsed power systems.

Optimal DFIG Converter Protection Design under Different Controllers

To enable wind turbine and the power converter have the ability to protect itself without disconnection to power grids during the fault, protection for crowbar and chopper should be designed properly. Optimal resistors value of crowbar and chopper are calculated under PVdq controller and Fmac controller according to the proposed index which embody the effect of rotor current, reactive power, converter capacitor voltage and the electrical torque. Simulation results obtained by using PSCAD show that DFIG should be designed with different optimal crowbar and chopper resistors under different controllers. Moreover, DFIG with Fmac controller has better fault ride-through capability than that with PVdq controller.

A voltage-controlled oscillator based on negative capacitance converter

A voltage-controlled oscillator based on negative capacitance converter

Online Monitoring of Capacitors in Power Converters

In power converters, the filtering or DC link capacitors are usually the component with shorter lifetime. With the aging, both, electrolytic and film capacitors, do often burst out, causing serious damages or even the destruction of the whole power stage. In this paper, a technique for diagnostic purposes is presented to estimate online, and even in real time, the aging of capacitors in different converters. The technique is based on the estimation of the capacitors equivalent series resistance (ESR) and capacitance. In this way, predictive maintenance can be carried out, and it is possible to alarm for the capacitor replacement before failure. In order to demonstrate and validate the effectiveness and accuracy of the proposed technique, several power topologies are discussed, showing experimental results. An embedded prototype with the real- time estimation through a Digital Signal Processor (DSP) is constructed and presented.

Reactive Power Generation and Optimization during a Power System Fault in Wind Power Turbines Having a DFIG and Crowbar Circuit

For variable-speed constant-frequency (VSCF) wind power generation, a doubly fed induction generator (DFIG) equipped with a crowbar circuit is becoming more widely used in electrical transmission networks. This prevents potentially damaging over-voltage and/or over-current conditions in the DFIG during a power system fault. The response of a DFIG based wind turbine system to voltage dips at the point of common coupling is studied in this paper. A crowbar circuit can limit the surge current as well as protect the rotor side converter and DC-link capacitor. When the crowbar is cut in, the rotor side converter is disconnected from the rotor windings, which makes the DFIG behave as an asynchronous induction generator with high rotor impedance. It is suggested that use of a crowbar circuit can reduce the reactive power absorbed by the stator and also assist in voltage recovery of the grid by injecting reactive power into the grid. This paper analyzes the influence of the AC crowbar resistors or inductors on the reactive power consumption of the stator during grid voltage dips. In addition, the paper presents a current-limiting method to control the grid side converter and the rotor side converter, which provides reactive power to the grid and thus enhance the capability of low voltage ride-through (LVRT). In the simulation studies presented, AC crowbars with different resistor and inductor values are selected. The simulation results show that the stator reactive power absorption can be controlled, while the rotor side converter and grid side converter can be controlled to inject reactive power into the grid to enhance voltage restoration and fault recovery.

Life-Cycle Monitoring and Voltage-Managing Unit for DC-Link Electrolytic Capacitors in PWM Converters

A novel life-cycle monitoring and voltage-managing device for dc-link electrolytic capacitors in pulsewidth modulation converters is presented. The system performs online identification of the capacitor's equivalent series resistance (ESR) in order to detect the life-cycle status and permit preventive maintenance. The ESR detection is based on the capacitor's ac losses calculated from voltage/current measurements using a simple low-cost microcontroller. The unit is designed as small printed circuit board located directly at the capacitor's screw terminals in order to simplify the required temperature sensing and to minimize wiring effort. The minimized energy consumption allows a power supply taken out of the capacitor to be tested. Besides life-cycle monitoring, the unit further facilitates energy-efficient voltage balancing for capacitors in series arrangements avoiding any power resistors typically used in balancing circuits. Instead, the unit controls the capacitor voltage by influencing its power consumption. Each individual monitoring unit (one per each power capacitor of the converter) transfers the ESR results to the converter's main controller and receives control commands via a common optoisolated fieldbus. Alternatively, this data transfer is performed using wireless near-field communication leading to a completely autonomous monitoring unit without any wiring for power supply and data transmission.

Advanced digital control for a switched capacitor and interleaved switched capacitor hybrid electric vehicle energy management system

This paper presents the analysis and novel controller design for a two-quadrant hybrid switched capacitor (SC) converter and interleaved two-quadrant SC bidirectional DC/DC converter for a hybrid electric vehicle dual energy storage system. The designed novel control strategy enables simpler dynamics compared to a standard buck converter with input filter, good regulation capability, low EMI, lower source current ripple, ease of control, and continuous input current waveform in both buck as well as boost modes of operation.

A 455 nW 220 fJ/conversion-step 12 bits 2 kS/s SAR ADC for portable biopotential acquisition systems

An ultra-low power 12 bits 2 kS/s successive approximation register analog-to-digital converter (ADC) is presented. For power optimization, the voltage supply of the digital part is lowered, and the offset voltage of the latch is self-calibrated. Targeted for better linearity and lower noise, an improved digital-to-analog converter capacitor array layout strategy is presented, and a low kick-back noise latch is proposed. The chip was fabricated by using 0.18 μm 1P6M CMOS technology. The ADC achieves 61.8 dB SNDR and dissipates 455 nW only, resulting in a figure of merit of 220 fJ/conversion-step. The ADC core occupies an active area of only 674 × 639 μm2.