Conventional Metal-insulator-semiconductor Research Articles

Role of Through Silicon Via in 3D Integration: Impact on Delay and Power

The metal–semiconductor (MES)-based through silicon vias (TSV) has provided attractive solutions over conventional metal–insulator–semiconductor (MIS) TSVs in recent three-dimensional (3D) integration. This paper aims a comprehensive performance analysis of MIS and MES structures considering different TSV shapes such as cylindrical, tapered, annular, and square. At 32[Formula: see text]nm technology, a CMOS-based coupled driver-via-load (DVL) setup is introduced wherein each via is represented an equivalent RLGC model of MIS- and MES-based TSV shapes. The proposed electrical model accurately considers the impact of micro bump and inter-metal dielectric (IMD) effects at 32[Formula: see text]nm technology as per the fabrication house. A 3D electromagnetic (EM) structural wave simulation is performed to validate the RLGC model parameters of different TSV structures for an operating frequency of up to 20[Formula: see text]GHz. The proposed DVL setup is used to analyze the propagation delay, power dissipation, and dynamic crosstalk for different MIS- and MES-based TSV shapes. A significant improvement in the cross-coupling behavior can be obtained using the MES-based tapered TSV compared to the other MIS structures. Additionally, the power delay product (PDP) of the tapered MES is reduced by 92.4% compared to the conventional MIS-based cylindrical TSV.

A Substitution for the High-k Dielectric in an AlGaN/GaN Metal-insulator-Semiconductor Heterostructure

Paraelectric state ferroelectric material is proposed as a novel substitution for the conventional high-k dielectric used in AlGaN/GaN metal-insulator-semiconductor (MIS) field-effect transistors. Its superior potential for improving device transconductance is due to its unique switchable polar nature. By self-consistent calculation involving the switchable polarization of the paraelectric, the 2DEG properties and C—V characteristics are investigated and compared for the novel AlGaN/GaN metal-paraelectric-semiconductor (MPS) structure and an equivalent conventional MIS structure. It is shown that owing to the paraelectric polarization, the gate control of the 2DEG density is remarkably enhanced in the MPS structure and the gate capacitance is significantly improved with a smaller threshold voltage. The self-consistent polarization of the paraelectric in the MPS structure is non-linearly dependent on the saturated polarization, which implies an optimum saturated polarization of 5–10 μC/cm2 for the paraelectric.

Effect of ZnS and CdS coating on the photovoltaic properties of CuInS2-sensitized photoelectrodes

This paper presents a facile route to prepare CuInS2 (CIS) as a light absorber for solar cells. CIS was effectively deposited inside the pores of the nanoporous anatase titanium dioxide photoelectrodes with a high coverage degree. The performance of the CIS-sensitized TiO2 photoelectrodes could be substantially enhanced through a sequential coating with a CdS shell and a ZnS layer via successive ionic layer adsorption and reaction (SILAR). Electrochemical impedance spectrum (EIS), cyclic voltammetry (CV), and photocurrent experiments were employed to study the effect of CdS and ZnS coating. The CdS shell provided high surface coverage to passivate surface states. The ZnS layer acted as a potential barrier which was similar to an insulating layer employed in the conventional metal–insulator–semiconductor solar cells, allowing the adjustment of the electric field and potential distribution in the interface between the electrodes and the electrolyte and suppressing the dark current, resulting in further increase in the photoresponse. We found that the thickness of the nanoporous TiO2 films had a dramatic impact on the optical response and efficiency of CIS-sensitized photoelectrodes, with the 5 μm sample performing much better than the 11 μm sample, which underlined the importance of charge (or ion) transport kinetics.

Dynamics and control of recombination process at semiconductor surfaces, interfaces and nano-structures

Characterization methods and fundamental aspects of surface/interface states and recombination process in Si and III–V materials are reviewed. Various measurement considerations are pointed out for the conventional metal–insulator–semiconductor (MIS) capacitance–voltage ( C– V) method, a contactless C– V method, and the microscopic scanning tunneling spectroscopy (STS) method, and general features of surface states are discussed. Surface states are shown to have U-shaped distributions of donor–acceptor continuum with a characteristic charge neutrality level, E HO. Rigorous simulation of dynamics of surface recombination process has shown that the effective surface recombination velocity, S eff, is not a constant of the surface, but its value changes by many orders of magnitude with the incident light intensity and the polarity and amount of fixed charge. From this, new methods of surface state characterization based on photoluminescence and cathodoluminescence are derived. Attempts to control surface states and Fermi level pinning at metal semiconductor interface and free surfaces of nano-structures are presented as efforts toward “nano-photovoltaics”.

In situ UHV contactless C– V and XPS characterization of surface passivation process for InP using a partially nitrided Si interface control layer

A totally in situ surface passivation process of InP consisting of growth of an ultrathin Si interface control layer (Si ICL) and its subsequent partial nitridation is described. The process was characterized and optimized by in situ ultrahigh vacuum (UHV) contactless capacitance–voltage ( C– V) measurements and X-ray photoelectron spectroscopy (XPS) measurements. An electron cyclotron resonance (ECR)-N 2 plasma process and a nitrogen radical process were compared for partial nitridation of Si ICL. In situ XPS measurements provided useful information on the thickness and composition of the nitrided surface layer. UHV C– V measurements showed that the nitridation process using ECR-N 2 plasma was more favorable, realizing a full swing of Fermi level almost over the entire bandgap. A metal–insulator–semiconductor (MIS) capacitor was fabricated by further depositing a thick Si 3N 4 layer on the ECR plasma processed structure. Conventional MIS C– V measurements confirmed an excellent interface property, proving the effectiveness of the in situ passivation process.

Embedded microstrip interconnection lines for gigahertz digital circuits

Transmission line structures are needed for the high-performance interconnection lines of GHz integrated circuits (ICs) and multichip modules (MCMs), to minimize undesired electromagnetic wave phenomena and, therefore, to maximize the transmission bandwidth of the interconnection lines. In addition, correct and simple models of the interconnection lines are required for the efficient design and analysis of the circuits containing the interconnection lines. In this paper, we present electrical comparisons of three transmission line structures: conventional metal-insulator-semiconductor (MIS) and the embedded microstrip structures-embedded microstrip (EM) and inverted embedded microstrip (IEM). In addition, we propose closed-form expressions for the embedded microstrip structures EM and IEM and validate the expressions by comparing with empirical results based on S-parameter measurements and subsequent microwave network analysis. Test devices were fabricated using a 1-poly and 3-metal 0.6 /spl mu/m Si process. The test devices contained the conventional MIS and the two embedded microstrip structures of different sizes. The embedded microstrip structures were shown to carry GHz digital signals with less loss and less dispersion than the conventional MIS line structures. S-parameter measurements of the test devices showed that the embedded microstrip structures could support the quasi-TEM mode propagation at frequencies above 2 GHz. On the other hand, the conventional MIS structure showed slow-wave mode propagation up to 20 GHz. More than 3-dB/mm difference of signal attenuation was observed between the embedded microstrip structures and the conventional MIS structure at 20 GHz. Finally, analytical RLCG transmission line models were developed and shown to agree well with the empirical models deduced from S-parameter measurements.

Noncontact Measurement of Generation Lifetime

In this paper, we discuss the measurement of minority carrier generation lifetime by the noncontact metal-insulator-semiconductor (MIS) method. This method enables electrical measurements on metal-air-insulator-semiconductor (MAIS) structure utilizing the air gap and is based on the conventional MIS theory. Capacitance-time ( C-t) measurement is employed for the lifetime evaluation in this method. The generation lifetime and the surface generation velocity are determined by Zerbst analysis, similar to the case of a conventional MIS capacitor formed with gate electrodes. For Si substrate with a long lifetime, the conventional MIS method has the disadvantage of long measurement time. However, MAIS structure reduces the measurement time by increasing the air gap distance. This is because the air gap is equivalent to a thick oxide film. In our experiment, metal-contaminated Si wafers were used to compare the MAIS method with the conventional MIS method in terms of the generation lifetime. The experimental results obtained from the two methods showed good agreement.

Fabrication of Cone-Shaped Metal-Insulator-Semiconductor Electron Tunneling Cathode

A new cone-shaped metal-insulator-semiconductor (MIS) cathode with an outside electrode is proposed for vacuum microelectronics devices. This cathode has larger emission current and higher transfer ratio (the ratio of electron emission current to the diode current) than those of the conventional MIS cathodes. In the present paper, the general concept of this new cathode is presented. To ensure the effectiveness of the electrode configuration, the cathode performance was investigated with a cone-shaped MIS cathode. The fundamental characteristics of this cathode were measured. The emission into vacuum was confirmed and the transfer ratio of about 10-3 at maximum was obtained.

Application of thin-film materials in solid state gas sensors

The mode of operation of metal–insulator–semiconductor (MIS) hydrogen sensors, which contain Langmuir–Blodgett solid ultrathin films as the insulator layer, has been examined. The device response to low concentrations (0–6 ppm) of hydrogen in nitrogen at 373 K was observed to correlate with analyte concentration according to the Lundström model, while at lower temperatures or in the presence of air, no such correlation was evident. Results from transient response and operating stability tests, taken together with previously reported analyses using X-ray photoelectron spectroscopy, indicate significant differences, compared with conventional (oxide I-layer) MIS devices, in the mechanism of interaction of hydrogen with the sensor. The palladium M-layer in the present device does not appear to be porous, according to carbon monoxide interference tests and it is proposed that there is no significant permeation of oxygen through the device.

MIS hydrogen sensors containing LB film insulator layers

Langmuir-Blodgett (LB) solid ultrathin films have been incorporated as the insulator layer in Pd/insulator/n-Si Schottky barrier diode metal-insulator-semiconductor (MIS) hydrogen sensors. The effects on device response and recovery of M- and I-layer thickness, temperature, hydrogen concentration and ambient atmosphere are examined. Optimized devices, containing organic LB films, show better responses than conventional oxide-containing MIS sensors and are capable of withstanding extended exposure to temperatures of up to 180 °C. Sensitivities of 0.5 ppm or better are achievable with good long-term operating stability.

Capacitance properties of MIS tunnel diodes

The theoretical capacitance properties of the metal-insulator-semiconductor (MIS) tunnel diode are described. It is shown that devices with relatively thick insulating layers display properties similar to conventional MIS capacitors, while those with thinner insulating layers differ appreciably. Frequency-dependent features can occur in the characteristics of these devices as a result of a delayed inversion layer response. The presence of such features in experimental devices provides support for the inversion layer clamping process predicted theoretically. Because of these frequency-dependent features, it is shown that caution must be exercised when using MIS tunnel diodes for obtaining surface-state information.