Conventional ESD Research Articles

Randomized Controlled Study of Endoscopic Mucosal Resection (EMR) Versus Endoscopic Submucosal Dissection with a Waterjet Hybridknife (ESDH) of Esophageal Lesions in a Porcine Model

Introduction: Uncontrolled studies indicated that ESD is superior to EMR for en-bloc resection of gastrointestinal mucosal lesions. However, ESD is technically difficult and seems to be more time-consuming and hazardous than EMR. In addition experience with this method is limited in the esophagus although there may be more clinical applications for esophageal lesions than for gastric lesions in Western countries. The objective of our study is to compare a new simplified ESD technique with conventional EMR. Methods and aims: The study was performed in 6 pigs under general anesthesia. A total of 25 esophageal areas with a diameter of 20 mm were marked with coagulation spots. These lesions were then randomized to either EMR by use of the cap technique or ESD. Submucosal injection of saline solution was used for both methods. ESD was done with a hybrid knife which allows cutting / coagulation as well as injection / flushing through an axial water-jet channel with a preselected pressure of a high pressure waterjet system (Erbe Jet 2). Intraoperative bleedings were treated with hemostatic forceps. Primary objective: to achieve complete resection of the lesions including the coagulation markers with no mucosal bridges; secondary objectives: to minimize the number of specimen, to determine the complication rate and procedural duration. Results: 13 lesions were randomized to EMRC and 12 to ESDH. ESDH achieved complete resection significantly more frequently than EMRC (10/12 versus 6/13 p = 0.05). All ESDH resections were performed as a single piece whereas a mean ( ± SD) of 2.5 ± 0.9 resections were needed for EMRC (p < 0.05). Mean areas of the specimen were 4.7 ± 0.7 cm2 in the ESDH group and 3.7 ± 1.2 cm2 in the EMRC group (p < 0.04). ESDH was performed with a larger amount of fluid for injection/flushing compared to EMRC (78.1 ± 32.8 ml vs 20.9 ± 7.6 ml; p < 0.001). The procedural duration was longer for ESDH than for EMRC (28.2 ± 11.9 min vs 12.2 ± 4.9 min; p < 0.001). ESDH and EMRC caused bleedings in 6/12 and 5/13 (p = 0.09) of the cases, respectively. Hemostasis could be achieved in all cases. There was no perforation in both groups. Conclusions: This randomized controlled trial shows that ESDH significantly achieves complete resection of esophageal lesions more frequently with less number of specimen than EMRC. ESDH is more time-consuming but the procedural duration seems to be shorter than conventional ESD because there is no need for exchange of devices for injection and cutting. The easy use of water-jet assisted injection of large amount of fluids may explain that ESDH was as safe as EMRC in spite of the thin esophageal wall in a porcine model.

Percutaneous Gastric Lifting with Threaded T-Tag to Prevent Gastric Deflation for Endoscopic Full-Thickness Resection (EFTR)

Background: Theoretically, endoscopic full-thickness resection (EFTR) has several advantages to treat gastric cancer compared to conventional ESD technique. We have reported circumferential cutting method for EFTR with modified sphincterotome, and it gave good results. However, there is a slight chance to soil the peritoneal cavity. Moreover, gastric deflation during the procedure sometimes makes it difficult to accomplish. The aims of this study were to evaluate the efficacy and safety of this newly developed EFTR method in survival porcine models.

RF ESD protection strategies: Codesign vs. low- C protection

The present work is focussed on the trade-off between conventional RF ESD protection concepts optimized in terms of capacitive load and the frequently discussed RF ESD codesign idea with ESD protection skilfully integrated into RF circuit design. A narrow and a broadband RF test circuit were developed to put the benchmark on a firm basis. RF and ESD experiments are discussed, showing where the higher effort for the codesign approach starts to pay off.

Distributed ESD protection for high-speed integrated circuits

Conventional ESD guidelines dictate a large protection device close to the pad. The resulting capacitive load causes a severe impedance mismatch and bandwidth degradation. A distributed ESD protection scheme is proposed to enable a low-loss impedance-matched transition from the package to the chip. A simple resistive model adequately predicts the ESD behavior under stress according to the charged device and human body models. The large area of the distributed ESD scheme could limit its application to designs such as distributed amplifiers, rf transceivers, A/D converters, and serial links with only a few dedicated high-speed interfaces. The distributed ESD protection is compatible with high-speed layout guidelines, requiring only low-loss transmission lines in addition to a conventional ESD device.

ESD protection for slew-rate-controlled output buffer in a 0.5 μm CMOS SRAM technology

A new ESD protection design by using the well-coupled field-oxide device (WCFOD) is proposed to protect the slew-rate-controlled output buffer in a 0.5 μm P-well/ N-substrate CMOS SRAM technology. The ESD transient voltage is coupled to the P-well of the ESD protection field-oxide device through a parasitic capacitor to trigger on the bipolar action of the field-oxide device. The ESD trigger voltage of the WCFOD can be lowered to below the snapback-breakdown voltage of the output NMOS transistor, so it provides effective ESD protection for the slew-rate-controlled output transistors without causing any degradation on the circuit performance. The coupling capacitor is made by inserting a poly layer right under the wire-bonding metal pad without the increase of layout area. A modified WCFOD structure is also proposed for output ESD protection in deep-submicron CMOS technology with polycide or salicide processes. Three conventional output ESD protection designs with the series resistor, the double-diode structure, and the field-oxide device, are also made for comparison. Five test chips with the same 256 K SRAM core but only different output ESD protection designs have been fabricated in a same wafer to practically verify the ESD protection efficiency of this proposed WCFOD and modified WCFOD structures.

Complementary-LVTSCR ESD protection circuit for submicron CMOS VLSI/ULSI

There is one LVTSCR device merged with short-channel NMOS and another LVTSCR device merged with short-channel PMOS in a complementary style to offer effective and direct ESD discharging paths from the input or output pads to VSS and VDD power lines. The trigger voltages of LVTSCR devices are lowered to the snapback-breakdown voltages of short-channel NMOS and PMOS devices. This complementary-LVTSCR ESD protection circuit offers four different discharging paths to one-by-one bypass the four modes of ESD stresses at the pad, so it can effectively avoid unexpected ESD damage on internal circuits. Experimental results show that it provides excellent ESD protection capability in a smaller layout area as compared to the conventional CMOS ESD protection circuit. The device characteristics under a high-temperature environment of up to 150/spl deg/C are also experimentally investigated to guarantee the safety of this proposed ESD protection circuit.