Conventional Bipolar Transistor Research Articles

The Advantages and Applications of IGBT Compared with Conventional BJT and MOSFET

Nowadays, the power semiconductor devices have been used in many fields like wind power generation systems, the rail transit. Bipolar junction transistors (BJTs) and metal-oxide-semiconductor field-effect transistors (MOSFETs) as well as some other devices are the dominating the market. The insulated gate bipolar transistor (IGBT) as a mixed device of the BJT and the MOSFET, has a preeminent performance. In this paper, the characteristics of the punch through IGBT (PT-IGBT), the MOSFET and the BJT will be investigated by TCAD. Then the PT-IGBT is compared with the BJT and the MOSFET, for concluding its advantages. According to the simulation result, the PT-IGBT has the on-state current of 9*10-4A and the forward blocking voltage of 1200V, which are much higher than the other two devices. In the end of the paper, the development of the semiconductor devices is predicted, about the research trends.

Investigation of Junction Thermal Characteristics of Light-Emitting Transistors

Self-heating effect is the main contribution to the junction temperature in bipolar junction transistors. In this paper, the dc temperature-variation measurement and extraction method, including thermal-electric feedback coefficient of an InGaP/GaAs light-emitting transistor (LET), are presented. The thermal-electric feedback coefficient of the LET is −2.07 mV/K at collector current of 2 mA and the thermal resistance is 993.3 °C/W when the corresponding power dissipation is 44.19 mW. The thermal properties of the conventional heterojunciton bipolar transistor is also demonstrated and compared. The differences can be attributed to the quantum-well thermionic emission mechanisms and enhanced radiative recombination in the LET.

4H‐SiC work‐function‐dependent bipolar transistor with ultra‐high current gain

A new structure of a 4H-SiC bipolar transistor with ultra-high current gain is proposed and analysed by simulation. A p-type Schottky contact serving as the conventional emitter region is introduced. By proper choice of the metal work-function, the injection efficiency of the minority carrier (electron) is promoted and may be close to unity. Therefore high current gain is realised due to the high electron current density injected from the p-type Schottky contact. The simulation results show that the current gain varies with the metal work-function and could reach ∼1000, which is attractive for the base-drive circuit. Moreover, the new structure simplifies the etching process compared with the conventional bipolar junction transistor.

A high performance charge plasma PN-Schottky collector transistor on silicon-on-insulator

In this paper, we propose a new high performance PN-Schottky collector (PN-SC) lateral bipolar junction transistor (BJT) on silicon-on-insulator (SOI). The proposed device addresses the problem of poor speed of conventional lateral PNP-BJT device by using a Schottky collector. Further, it does not use the conventional ways of ion implantation/diffusion to realize n and p type doped region. However, it uses metal electrodes of different work functions to create n and p type charge plasma in an undoped silicon film. The simulation study of the proposed lateral PN-SC bipolar charge plasma transistor on SOI (PN-SC-BCPT) device has shown a significant improvement in current gain (β), cutoff frequency (fT) and switching performance in comparison to conventional PNP-BJT and PNP-bipolar charge plasma transistor (PNP-BCPT) devices. A significantly high β is obtained in the proposed PN-SC-BCPT (∼2100) in comparison to PNP-BCPT (∼1450) and the conventional BJT (∼9) devices, respectively. It has been observed that there is 89.56% and 153.5% increase in fT for the proposed PN-SC-BCPT device (2.18 GHz) in comparison to conventional PNP-BJT (1.15 GHz) and PNP-BCPT (0.86 GHz) devices, respectively. Further, reductions of 24.6% and 15.4% in switching ON-delay and 66% and 30.76% in switching OFF-delay have been achieved in the proposed device based inverters in comparison to PNP-BCPT and the conventional BJT devices based inverters, respectively. Furthermore, the proposed device does not face doping related issues and the requirement of high temperature processing is absent.

Effect of Nano‐Porosity on High Gain Permeable Metal‐Base Transistors

As one type of vertical thin‐film transistors, permeable metal‐base transistors (PMBTs) with a permeable metal film embedded between two semiconductor layers have been proposed for high gain current amplifier. In principle, compared with conventional bipolar transistors, PMBTs should have a higher speed and are easier to fabricate compatible with flexible and printed electronics. However, functional PMBTs are not realized due to low current gains (<50) and lack of output current saturation. In this paper, making use of the nano‐textured surface of an organic semiconductor, we are able to fabricate devices with permeable metal base films having a pore size of about 20 nm and achieve current gains up to 476 with output current saturation. Correlations between the nano‐scale porosity and the charge transmission/amplification behaviors in the device are explained with characterization of the metal base porosity. From our device simulation results, the small pore size is essential to achieve current saturation in the device due to the potential‐pinning effect in the small pore regions. Finally, using a similar strategy, we also demonstrate a high gain (=260) solution‐processed metal oxide‐based PMBTs with output current saturation.

Development of novel transistor and thyristor composed of LED and photodiode

K. Okamoto, who is one of the authors, found in 2010 that a novel device composed of a LED and a photodiode functioned similarly to only the conventional bipolar junction transistor (BJT) but also the thyristor, a well-known power switching device. The reason why the LED–photodiode device behaves as BJT and thyristor is considered to be the mutual photovoltaic effect between a LED and a photodiode. On the basis of this finding, we further developed devices consisting of a LED and a photodiode. In this paper, we present some functional LED–photodiode devices and also discussed the mechanism of underlying their behaviors.

Development and Static Mode Characterization of a New Low-Loss AC Switch Based on Super-gain BJT

This paper deals with an innovative low-loss AC switch, named as TBBS (transistor based bidirectional switch), based on the association of super-gain BJTs developed by the GREMAN laboratory. The main characterization results of the super-gain BJT are reminded to identify the key parameters that are essential to build the TBBS. A complete characterization database in static mode of this new AC switch is discussed. In particular, its forward and reverse-biased features have been measured to see the evolution of the DC current gain as a function of the current density. The TBBS makes sense when using the super-gain BJT (bipolar junction transistor) in reverse mode. It means that the reverse DC current gain has to be sufficient (at least higher than 1 compared with the conventional BJT one). This new AC switch is bidirectional in current and voltage, totally controllable (turn-on and turn-off) and the most attractive solution in terms of on-state power losses. Further, its manufacturing process is as easier as existing device such as triac.

Radiation effect of deep-submicron metal-oxide-semiconductor field-effect transistor and parasitic transistor

The metal-oxide-semiconductor field-effect transistor (MOSFET) and the parasitic bipolar transistor of domestic complementary metal oxide semiconductor (CMOS) process are irradiated with 60Coγ rays to investigate the failure mechanism of the mixed-signal ICs fabricated by deep submicron CMOS process, caused by total dose radiation. The research results are as follows. 1) The parasitic sidewall and top corner regions contribute to the intra-device leakage. 2) The parasitic bipolar transistor of CMOS process is not sensitive to total dose radiation, which is very different from the conventional bipolar transistor. Preliminary analysis suggests that the difference originates from the differences in the structural and making process. 3) The total dose radiation damage to the parasitic bipolar transistors is not coupled with the damage to the NMOS transistor in the same CMOS process. 4) Based on the above study, the radiation failure mechanisms of the analog and digital module in mixed-signal ICs fabricated respectively by the domestic and commercial CMOS process are investigated. Preliminary analysis suggests that the increase of off-leakage current of MOSFET is responsible mainly for the increase in power consumption of digital module, and the insensitivity of bandgap voltage reference to total dose radiation originates from the radiation resistance of the parasitic bipolar transistor which is the important part of bandgap voltage reference in CMOS mixed-signal ICs.

Novel Opt-coupling Transistor by LED and PD and its Application

This paper proposes a novel transistor-like device by the optical coupling of LED (Light Emitting Diode) and Photodiode. The device that we call “OCT: Optical Coupling Transistor” shows an amplification function if the Photodiode current by photo electromotive force is feed backed into the LED, in the same way as the case of common emitter circuit of the conventional Bipolar Junction Transistor. In this paper, we present the amplification principle and its applications by OCT such as audio amplifier and operational amplifier.

Dynamic range and sensitivity improvement in near-infrared detectors using silicon germanium bipolar complementary metal-oxide semiconductor technology

Johan VenterSaurabh SinhaUniversity of PretoriaCarl and Emily Fuchs Institute for MicroelectronicsDepartment of Electrical, Electronic and ComputerEngineeringPretoria, South AfricaE-mail: jwventer@ieee.orgAbstract. Classically gated infrared (IR) detectors have been imple-mented using charge-coupled devices (CCD). Bipolar complementarymetal-oxide semiconductor (BiCMOS) technology emerged as a viablealternative platform for development. BiCMOS technology has a numberof advantages over CCD and conventional CMOS technology, of whichincreased switching speed is one. The pixel topology used in this workis a reversed-biased diode connected heterojunction bipolar transistor.The disadvantage of CMOS detectors is the increased readout noiseduetotheincreasedon-chipswitchingcomparedtoCCD,whichdegradesdynamic range (DR) and sensitivity. This yields increased switchingspeeds compared to conventional bipolar junction transistors. Sensitivityimproved from 50 mA∕W (peak) at 430 nm in CCD detectors to180 mA∕W (peak) (or 180;000 V∕W) at 665 nm in BiCMOS detectors.Other CMOS IR detectors previously published in the literature showedsensitivity values from 2750 to 5000 V∕Wor100 mA∕W. The DR alsoimproved from 47 and 53 dB to 70 dB. The sensitivity of conventionalCCD detectors previously published is around 53 mA∕W. The second ad-vantageisthatdetectioninthenear-IRband withconventionalsilicon inte-grated technology is possible. This work has shown increased detectioncapabilities up to 1.1 μm compared to Si detectors.

Effect of Emitter Layer on the Signal Generation of the Active Pixel Sensor

The image sensor in the optical mouse reads the scene of the bottom, and compares it with the last sceneto acquire the moving data. The scene should be read with high frame rate to make the moving of the cursor soft and exact. The high frame rate means the short time to integrate the signal charge. The weak signal causes malfunctioning of the moving of the cursor. The signal should be amplified to ensure the signal to noise ratio. Some type of the pixel in the optical mouse uses a bipolar transistor to amplify the signal. The conventional bipolar transistor used in the optical mouse has full covering emitter layer on the base layer. The emitter layer helps the bipolar action, but it decreases the signal electron-hole pair generation since the generation occurs in the collector-base junction. We propose the emitter structure which covers only the boundary of the base layer. The photo current of the new structure increased 20% compared to the conventional structure.

A Novel BJT Structure Implemented Using CMOS Processes for High-Performance Analog Circuit Applications

In this paper, a novel bipolar junction transistor (BJT) structure is proposed for high matching characteristics and its performance is compared with a conventional BJT structure. Although the proposed BJT matching structure indicates a decrease of collector current density <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$J_{C}$</tex></formula> and current gain <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\beta$</tex></formula> of about 5.36% and 1.02% compared with those of the conventional BJT structure, the matching characteristics of the collector current <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">$(A_{\rm IC})$</tex></formula> and the current gain <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$(A_{\beta})$</tex> </formula> for the proposed structure are improved by about 31% and 24%. The improved matching characteristic of the proposed structure is believed to be due to the reduced effect of the deep n-well or the reduced current path from emitter to collector.

Bipolar Charge-Plasma Transistor: A Novel Three Terminal Device

A distinctive approach for forming a lateral bipolar charge-plasma transistor (BCPT) is explored using 2-D simulations. Different metal work-function electrodes are used to induce n- and p-type charge-plasma layers on undoped silicon-on-insulator (SOI) to form the emitter, base, and collector regions of a lateral n-p-n transistor. Electrical characteristics of the proposed device are simulated and compared with that of a conventionally doped lateral bipolar junction transistor (BJT) with identical dimensions. Our simulation results demonstrate that the BCPT concept will help us realize a superior bipolar transistor in terms of a high current gain, as compared with a conventional BJT. This BCPT concept is suitable in overcoming doping issues such as dopant activation and high-thermal budgets, which are serious issues in ultrathin SOI structures.

LED 응용을 위한 BCM 방식의 Power Factor Correction Control IC 설계

본 논문에서는 400V, 120W 급 LED 구동을 위한 1단 전류 경계모드(Boundary Condition Mode) 제어방식의 역률 개선 제어회로를 설계하였다. 제안하는 제어회로는 역률 개선 및 고조파 발생을 감소시키는 기능을 가지고 있으며, 또한 PFC(Power Factor Correction)회로 내에서 상대적으로 많은 면적을 차지하는 기존의 바이폴라 트랜지스터 구조 대신 새로운 CMOS 회로로 설계하였다. 기존대비, 약 30% 정도의 레이아웃 면적을 줄이게 되었고, 상용화 시 칩의 가격 경쟁력이 클 것으로 사료된다. In this paper, a power factor correction (PFC) control circuit using single stage boundary conduction mode(BCM) for the 400V. 120W LED drive application has been designed. The proposed control circuit is aimed for improvement of the power factor correction and reduction of the total harmonic distortion. In this circuit, a new CMOS multiplier structure is used instead of a conventional BJT(bipolar junction transistor) based multiplier where has a relatively large area. The CMOS multiplier can bring 30 % reduced chip area, competitive die cost in comparison with the conventional BJT multiplier.

Short-Circuit Capability of SiC Buried-Gate Static Induction Transistors: Basic Mechanism and Impacts of Channel Width on Short-Circuit Performance

Fundamental short-circuit operations of silicon carbide static induction transistors with buried-gate structures (BGSITs) were experimentally clarified, with subsequent device simulations. The impacts of channel width and source length on short-circuit capabilities were investigated. In particular, a design concept of the channel width was proposed to improve the short-circuit energy without a serious increase in on-resistance. The maximum short-circuit capability of the fabricated BGSITs was 18 J/cm2 at room temperature, which shows excellent performance compared with that of conventional Si insulated-gate bipolar transistors.

Suppressed surface‐recombination structure and surface passivation for improving current gain of 4H‐SiC BJTs

Abstract4H‐SiC bipolar junction transistors (BJTs) are one of the promising candidates for next‐generation power devices. 4H‐SiC BJTs have the advantages of low on‐resistance and high temperature capability. On the other hand, high common emitter current gain is required from a practical use point of view because BJTs are current‐controlled devices. In order to improve the current gain of 4H‐SiC BJTs, we have concentrated on suppressing surface recombination on the SiC surface, which is a critical limiting factor of the current gain and can be suppressed by reducing carrier density and/or trap density. We have proposed novel 4H‐SiC bipolar junction transistors with suppressed surface‐recombination structure: SSR‐BJTs that have the SiC surface with low carrier density, characterized by a lightly doped n‐type layer (LDN layer) and a highly resistive p‐type region (HRP region). In addition, surface passivation suitable for reducing surface traps has been investigated by applying a new characterization method of surface‐recombination current in which the sp · Ls value, a product of a surface‐recombination velocity (sp) and a surface‐diffusion length (Ls), is derived from an analysis of forward I–V characteristics of SiC pn diodes. We have experimentally demonstrated that the sp · Ls value is a practical indicator to evaluate surface passivation. By using the characterization, an effective passivation method with the combination of a pyrogenic oxidation, a post‐oxidation anneal in H2 ambient, and an anneal in NH3 ambient has been developed. SSR‐BJTs with a variety of device structures and process conditions have been fabricated to investigate their characteristics. A fabricated SSR‐BJT showed a recorded maximum current gain of 134 at room temperature with a specific on‐resistance of 3.2 mΩ cm2 and a blocking voltage VCEO of 950 V. The SSR‐BJT kept a current gain of 60 °C at 250 °C with a specific on‐resistance of 8 mΩ cm2. These results have demonstrated the outstanding current‐gain capability of the SSR‐BJTs compared to conventional BJTs. (© 2009 WILEY‐VCH Verlag GmbH &amp; Co. KGaA, Weinheim)

Surface Accumulation Layer Transistor (SALTran): A New Bipolar Transistor for Enhanced Current Gain and Reduced Hot-Carrier Degradation

We report a new surface accumulation layer transistor (SALTran) on SOI which uses the concept of surface accumulation of electrons near the emitter contact to improve the current gain significantly. Using two-dimensional process and device simulation, the performance of the proposed device has been evaluated in detail by comparing its characteristics with those of the previously published conventional bipolar transistor structure. From our simulation results, it is observed that depending on the choice of emitter doping and emitter length, the proposed SALTran exhibits a current gain enhancement of 10 to 70 times that of the compatible bipolar transistor. We also demonstrate that the presence of the surface accumulation layer does not deteriorate the cut-off frequency as observed in the high-low emitter junction bipolar transistors. Our simulations also indicate that when the emitter is lightly doped, the SALTran is immune to hot carrier injection problems due to the reduced electric field in the emitter. The effect of surface states at the emitter contact and temperature on current gain have been examined.

A New High Speed Switching Bipolar Power Transistor with Corrugated Base Junctions

A new structure of the bipolar power transistor with corrugated base junctions is proposed for fast switching applications. The proposed bipolar power transistors with corrugated base junctions are fabricated without any additional process steps. We investigated the electrical characteristics of the transistor such as current gain, saturation voltages between the collector and the emitter and turn-off transient times, and compared them with those of the conventional bipolar transistors with parallel plane base junctions. It is shown that the bipolar transistors with corrugated base junctions have not only shallow saturation but also built-in field accelerating the recombination of excess electrons and holes in the base region. The storage times of the bipolar power transistors with corrugated base junctions are shorter by above 25% than those of the conventional bipolar power transistors.

Horizontal current bipolar transistor (HCBT): a new concept of silicon bipolar transistor technology

A new concept of silicon bipolar transistor technology is proposed. The resulting horizontal current bipolar transistor (HCBT) is simulated assuming the 0.25 /spl mu/m technology. The surface of the device is smaller than conventional super-self aligned bipolar transistors. The same doping profile as in known vertical current devices is achieved by simpler technology using single polysilicon layer, without conventional epitaxial and n/sup +/ buried layers and with reduced number of lithography masks and technological steps. The simulated dc and ac characteristics of HCBT are similar to the characteristics of standard SST devices.

Trade-off between the Kirk effect and the breakdown performance in resurfed lateral bipolar transistors for high voltage, high frequency applications

The trade-off between the breakdown performance and the Kirk effect has been evaluated and compared among conventional bipolar transistors and resurfed lateral bipolar transistors. It was demonstrated that the traditional conflict of differing requirements on W c and N c by the breakdown performance and the Kirk effect can be eased by incorporating the resurf principle. Comparative studies have been carried out between the optimized devices with breakdown voltages from 20 to 40 V. It is shown that for an identical breakdown voltage, the high-current-level performance of the resurfed devices can be significantly improved by incorporating a gradually doped collector region. This further leads to a significant increase in the cut-off frequency without degrading the breakdown performance.