Continuous Conduction Mode Operation Research Articles

Q-EDR Hybrid Boost Converter Operation For High Gain With Low Device Stress

Abstract: The hybrid continuous-discontinuous mode (CCM-DCM) operation of non-isolated systems is proposed in this paper. boost converter with quadratic extended duty ratio (Q-EDR) for applications with high gain and low power. The inductors at the input while the EDR was in continuous conduction mode (CCM) The mode of operation of stage inductors is discontinuous conduction. (DCM) in order to reap the advantages of CCM and DCM operation. Interleaving's ripple in the low input current and low voltage The EDR stage switches' stress remains. With what is being half and half method of activity, the inductance worth of EDR stage significant decrease in the inductor. an additional decrease in switch voltage is accomplished during turn-on progress in the proposed activity, prompting huge decrease thus on exchanging losses. This lets the converter run at higher switching speeds. frequency, thereby reducing EDR inductors' size by 45 percent in this instance an experiment confirms the proposed idea. Simulink prototype for a two-phase Q-EDR operating at 30 V-40 V to 400 V output, a gain of more than 12 at duty close to 0.54. The converter has a peak efficiency of 95.5 percent. at a switching frequency of 135 kHz and 300 W for all silicon switches.

Lyapunov stability analysis and FIL implementation for boundary‐based hybrid controller in boost converter

AbstractThis paper presents a comprehensive stability analysis of the boundary‐based hybrid control (BBHC) algorithm designed for boost converter. The stability assessment is carried out utilizing multiple Lyapunov functions, addressing both continuous conduction mode (CCM) and discontinuous conduction mode (DCM) operation. The boost converter is modeled as a hybrid automaton to capture its dynamic behavior accurately. Through rigorous Lyapunov stability analysis, this study demonstrates the effectiveness of the BBHC algorithm in ensuring stable operation of the boost converter across various operating modes. Additionally, the proposed control algorithm's validation is conducted using the FPGA‐in‐the‐loop (FIL) technique, highlighting its efficiency and robustness in real‐world applications. This research contributes valuable insights into the design and implementation of stable control strategies for boost converter, emphasizing the practical utility of the BBHC algorithm with FIL for enhanced performance and reliability in power electronics systems.

Frequency Modulation Scheme for CCM Boost PFC Converter to Improve THD in Light-Load Condition

This study proposes a novel frequency modulation scheme for a continuous conduction mode (CCM) boost power factor correction (PFC) converter. The aim is to improve the total harmonic distortion (THD) under light-load conditions. Boost converters are widely utilized with CCM control for the PFC stage owing to their ability to achieve high efficiency with minimal components. In addition, they have a high power factor (PF) and low THD. However, despite being designed for CCM operation, the boost PFC converter transitions into discontinuous conduction mode (DCM) as the output load decreases. This mode, known as mixed conduction mode, degrades the PF and THD of the PFC converter. To address these issues, we propose a novel frequency modulation scheme. The CCM boost PFC converter adopts frequency variation to reduce the DCM region. To validate the feasibility of the proposed concept, a prototype with a 60 Hz/230 Vac input and 850 W/380 V output was utilized. Consequently, the boost PFC converter attains a high PF and low THD with simplified circuits.

Grey wolf optimizer for the design optimization of a DC-DC boost converter

Design optimization of a DC-DC boost converters for minimizing overall operational losses is the problem under study. The optimum design contains selecting the best value of circuit inductance, capacitance, and switching frequency for the continuous conduction mode (CCM) operation. The design constraints selected are the current ripple content, ripple content of voltage, and bandwidth for operation in CCM. Grey wolf optimizer (GWO) algorithm is implemented for the boost DC-DC converter’s optimal design. The comparative investigation of algorithms reveals that GWO outperforms other established optimization algorithms like the particle swarm optimization (PSO), moth flame optimization (MFO) algorithm, simulated annealing (SA) and firefly algorithm (FFA) in terms of convergence time, computational effort, and the minimized system losses while finding the most efficient design of the converter. Parametric study on statistical performance indicates that the GWO algorithm outperforms the rest of the optimization algorithms on comparing with previously reported results. The optimized results obtained in the current work provides and improved converter design with reduction in the power loss in the optimized design of the converter by over 15% from previously reported works.

An efficient controller design of a PV integrated single inductor multiple output DC-DC converter for dynamic voltage and low power applications.

In this article, a Single Inductor Multiple Output (SIMO) DC-DC boost converter for driving independent three outputs of dynamic voltage and low power is proposed. Compared with the traditional SIMO DC-DC converter, the proposed work accomplishes (i) independent control of power at each output, (ii) small switch count, (iii) relatively better scalability with increasing output channel, (iv) fast response time, and (v) relatively better efficiency. The core aim of the current article is to implement an efficient controller design of the SIMO DC converter circuit operating in continuous conduction mode for dynamic voltage applications. The SIMO circuit comprises a photovoltaic (PV) array as a renewable energy harvesting source at the input. A hysteretic controller based on direct control with seamless transition control topology is implemented in this model for SIMO operation. This scheme is popular due to its less cost, simple, easy-to-use design architecture, and fast speed of close loop control. The configuration of the solar array is designed to deliver maximum power on the input of the SIMO DC-DC converter. For tracking the maximum power point, incremental conductance with integral control configuration is applied on the PV array with fast speed and efficiency. The MATLAB/Simulink environment is utilized for model configuration. The simulation results show that the proposed SIMO configuration with the PV array provided 100.5 W and 21.7 W for 1000 W/m2 and 250 W/m2, respectively.

Fuel Cell Based Ultra-Voltage Gain Boost Converter for Electric Vehicle Applications

The proposed fuel cell-based ultra-voltage gain boost converter offers an alternative to transformer-based topologies for achieving high voltage gain. While transformers can achieve high voltage gains, they come with drawbacks such as high cost, design complexity, and increased weight. In this article, a switched inductor circuit is introduced as an alternative solution to achieve high voltage gain. This circuit enhances overall system performance by reducing size, weight, and cost. Operating in a transformer-less topology, the converter boosts voltage levels while ensuring low voltage stress on the switching devices. The suggested design enables larger voltage gain values even at low duty ratios. The output of the fundamental boost converter serves as the input for the switched inductor circuit, effectively boosting the voltage level and supplying more voltage to the output side. This converter is particularly suitable for applications requiring ultra-voltage gain in electric vehicles, which offer reduced pollution compared to internal combustion engines. Moreover, the utilization of this topology reduces space requirements. The article presents a thorough investigation of the steady state operation in continuous conduction mode, and theoretical verification and MATLAB simulations demonstrate the performance and operation of the proposed converter.

A new step-up-down quadratic dc–dc converter with a single active switch

A novel step-up-down quadratic dc–dc topology is proposed. After performing the dc analysis, it is found that the proposed converter has a wide dc conversion ratio. The current and voltage stresses and ripples are determined alongside the continuous conduction mode (CCM) operation conditions. The correct converter operation is verified by simulation and then through the measurements on an experimental prototype. Additionally, a design algorithm is proposed together with an example of applying it for building a practical prototype. The design algorithm is implemented in a numeric computing platform. The state–space model is derived for both for the ideal case as well as considering the conduction losses. The control to output transfer function and the audiosusceptibility are computed. It is shown how the fourth order control to output transfer function can be well approximated by a second order transfer function. This approximation brings the advantage of simple controller design based on classical techniques. Both classical operational amplifier (Op. Amp.) based controllers and widely available controllers in the form of integrated circuits (ICs) can be used for the implementation, requiring only the calculation of elements in the feedback loop of the error amplifier. Based on the transfer functions of the converter and of the Laplace domain controller, a digital controller may also be derived. An example is presented and simulated to prove the correct operation of the closed-loop system.

Design and Development of SECU Converter Cascaded Control for EV Applications

A power factor correction-based hybrid converter operating in continuous conduction mode with high efficiency and voltage conversion ratio is presented in this publication. The proposed converter is obtained by integrating the single-ended primary inductance converter (SEPIC) and the Cuk converter to produce a DC symmetrical balanced dual output voltage across the load without a common ground between source and load. The modeling of the converter by state space model is derived using the state space averaging technique. The cascaded control strategy using a multiplier approach with a cascaded controller and PI-Hysteresis-based controller is employed for shaping the source current and load voltage. The performance analysis of the suggested converter under steady state and transient conditions is carried out in MATLAB/Simulink software tool. The observed result displays that cascaded control yields excellent performance compared to PI-Hysteresis control in satisfying the IEC 61000-3-2 standard by maintaining a power factor close to unity, and reduced total harmonic distortion.

Design analysis and control of step‐up converter with reduced switch stress

SummaryIn light of the increasing share of renewable energy sources (RES) in electricity generation, the research community is directing their attention toward developing highly efficient DC‐DC high‐gain step‐up converters. These converters are designed to exhibit reduced voltage stress on the switching devices (semiconductors). This paper presents a comprehensive study of a switch voltage stress‐reduced step‐up converter that offers a range of additional features, including the availability of a common ground point, continuous input current, simple two‐mode continuous conduction mode (CCM) operation, wide duty cycle range, and quadratic boosting factor. To achieve the aforementioned features, the converter utilizes two switches with the same operating modes, eliminating the need for complex switching circuitry. Operational modes, steady‐state analysis, and design considerations have been presented in detail. Comparative analysis indicates that the voltage conversion ratio per number of devices in the proposed topology is significantly higher than that of similar topologies. In addition, the voltage stress of switches is considerably less than the topologies addressed in the literature. The study further includes detailed mathematical and experimental analyses, small signal analysis, and hardware implementation to support the theoretical findings. The converter's efficiency has been thoroughly analyzed along with thermal analysis to ensure its reliability.

The Design of 2S2L-Based Buck-Boost Converter with a Wide Conversion Range

This manuscript proposes a novel nonisolated negative output buck-boost converter topology for wide voltage conversion applications. To design this converter, a typical buck-boost converter configuration is used. In conventional buck-boost converter, the active switches designed are replaced by two switches-two inductors (2S2L) cells. The proposed converter operates in the continuous conduction mode (CCM) operation under steady-state conditions. This converter has a lower component count and low voltage stress on the switches and diodes. Moreover, the major advantage of this buck-boost converter topology is that a wide range of step-down and step-up voltage conversions can be achieved. The performance of the proposed system is designed in MATLAB/SIMULINK. A few other comparisons are also presented to demonstrate the competitiveness of the proposed buck-boost converter.

Boundary-Based Hybrid Control Algorithm for Switched Boost Converter Operating in CCM and DCM

It is essential to have enhanced efficiency for the DC-DC converters operating in continuous conduction mode (CCM) and discontinuous conduction mode (DCM). This requires a hybrid controller designed using pulse width modulation (PWM) and pulse frequency modulation (PFM) schemes. This paper fixates on a boundary-based hybrid control algorithm for the second-order DC-DC converter - the switched boost converter. The proposed algorithm works in PWM control scheme for CCM operation, whereas DCM operation uses PFM control scheme. The boundary conditions are defined by the load current, output voltage, and switching frequency. Here, an attempt is carried out to have the advantages of both the control schemes. The boost converter is represented by the switched system operating in three modes. Violating transition guards condition orchestrates the switching among these modes. A supervisor detects the CCM and DCM operations, and subsequently switches between PWM and PFM control scheme. Extensive circuit-level simulations are carried out in MATLAB to show the efficacy of the suggested algorithm under the fluctuating line, load, and set-point.

Online DC-Link Capacitance Monitoring for Digital-Controlled Boost PFC Converters Without Additional Sampling Devices

Aluminum electrolytic capacitors (Al-Caps) are widely used in the dc link of ac/dc applications; however, they are one of the weakest components in power electronic converters. With the degradation of Al-Cap, its capacitance ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C</i> ) decreases, and the equivalent series resistance increases. Based on this, many efforts have been made to realize condition monitoring (CM) of Al-Caps. Unfortunately, additional hardware (including current sensors and sampling circuits) and/or powerful data processing tools are usually required, which increases the cost and would bring new reliability risks. Considering this issue, this article presents a transient-based CM scheme for dc-link capacitors in digital-controlled boost power factor correction (PFC) converters, which does not need additional sampling devices. By analyzing the relationship between large-signal transient voltage profile and dc-link capacitance, a calculation model is established. Based on the sampled voltage and current signals used for digital control, the dc-link capacitance can be online estimated. Its feasibility is validated in simulation with a boost PFC operating in continuous conduction mode (CCM) and discontinuous conduction mode. Furthermore, taking a 1-kW boost PFC operating in CCM as a case study, experimental results illustrate that the estimation errors of the dc-link capacitance are less than 3.5% (error of a single test) and 1.5% (average error of multiple tests).

Design, implementation and performance evaluation of different digital control techniques for current controlled DC-DC Buck converter

The paper presents modelling, control architecture, analysis and design of digital compensators for single feedback-loop voltage mode control as well as two feedback-loop average current mode control and peak current mode control of current controlled DC-DC Buck converter operating in continuous conduction mode with output current as control variable. The compensators are derived using digital redesign approach, simulated on MATLAB, implemented as control algorithms on Texas Instruments' 32-bit TMS320F28069M microcontroller platform, and experimentally validated by testing with a laboratory prototype of current controlled Buck converter. Simulation and experimental results are discussed, compared and evaluated for converter output current performance in tracking reference current signal as well as in regulation against input voltage and load disturbances. Salient features of each control technique are identified and described to determine its suitability in applications of DC-DC converters requiring controlled output current.

Chaos Elimination for a Buck Converter Using the Multi-Objective Grey Wolf Optimiser

Abstract A wide variety of nonlinear phenomena, such as bifurcation and chaos, have been observed in power electronics converters. Much research has been conducted on these behaviours in different converter topologies. The buck converter is known to exhibit chaotic behaviour in a wide parameter range, giving rise to unstable behaviours depending on the circuit parameters values. This paper investigates this bifurcation behaviour by varying the parameters of a voltage PI (Proportional Integral) controlled buck converter operating in continuous conduction mode, using a continuous-time model and constant frequency control signal. Furthermore, a novel and improved version of the PI compensation technique, designed using the multi-objective grey wolf optimiser (MOGWO), is proposed to stabilise the buck converter from chaotic state to periodic orbit.

Comprehensive Mapping of Continuous/Switching Circuits in CCM and DCM to Machine Learning Domain Using Homogeneous Graph Neural Networks

This paper proposes a method of transferring physical continuous and switching/converter circuits working in continuous conduction mode (CCM) and discontinuous conduction mode (DCM) to graph representation, independent of the connection or the number of circuit components, so that machine learning (ML) algorithms and applications can be easily applied. Such methodology is generalized and is applicable to circuits with any number of switches, components, sources and loads, and can be useful in applications such as artificial intelligence (AI) based circuit design automation, layout optimization, circuit synthesis and performance monitoring and control. The proposed circuit representation and feature extraction methodology is applied to seven types of continuous circuits, ranging from second to fourth order and it is also applied to three of the most common converters (Buck, Boost, and Buck-boost) operating in CCM or DCM. A classifier ML task can easily differentiate between circuit types as well as their mode of operation, showing classification accuracy of 97.37% in continuous circuits and 100% in switching circuits.

Three-Terminal Gain Cells Based on Coupled Inductor and Voltage Multiplers for High Step-Up Conversion

A generalized methodology for creating gain cells with three terminals is proposed in this brief. The gain cells are based on inductor coupling and voltage multiplier techniques and are applied to the classical dc-dc Boost converter. When compared with conventional gain cells already described in the literature, the proposed ones are able to provide higher step-up gains with the same number of components. Additionally, they also require lower magnetizing inductances to ensure their operation in continuous-conduction mode, which may reduce the volumes of the coupled inductors. To illustrate the application of the proposed gain cells, an example of high step-up dc-dc converter is created and its operation principle is analyzed. A 200-W prototype concerning to this converter is built and tested, validating the proposal.

MODELING AND CHARACTERISTIC ANALYSIS OF FRACTIONAL-ORDER BOOST CONVERTER BASED ON THE CAPUTO–FABRIZIO FRACTIONAL DERIVATIVES

This paper presents a novel approach for modeling Boost converters using the Caputo–Fabrizio (C-F) definition-based fractional-order model to address singular characteristics in fractional-order definitions and enhance model accuracy. A small signal modeling method is proposed to improve the accuracy of circuit parameter design and to derive state-averaged models, state-space equations, and transfer functions. The influence of capacitor and inductor orders on steady-state characteristics is analyzed and the influence of fractional-order on ripple characteristics is investigated through simulation. When the fractional-order approaches 1, the output voltage increases and the inductance current decreases, with waveform jitter mitigation. Moreover, boundary conditions for continuous conduction mode operation are established based on ripple characteristics. The numerical and circuit-oriented simulations verify the correctness of the proposed model. Finally, the orders and accurate parameters of capacitors and inductors based on the C-F definition are determined and the experiments are conducted. The comparison between the experimental and simulation results demonstrates that the proposed model can accurately describe the steady-state characteristics of the practical circuit systems, which further validates the accuracy of the proposed method.

On modeling and real-time simulation of a robust adaptive controller applied to a multicellular power converter

Introduction. This paper describes the simulation and the robustness assessment of a DC-DC power converter designed to interface a dual-battery conversion system. The adopted converter is a Buck unidirectional and non-isolated converter, composed of three cells interconnected in parallel and operating in continuous conduction mode. Purpose. In order to address the growing challenges of high switching frequencies, a more stable, efficient, and fixed-frequency-operating power system is desired. Originality. Conventional sliding mode controller suffers from high-frequency oscillation caused by practical limitations of system components and switching frequency variation. So, we have explored a soft-switching technology to deal with interface problems and switching losses, and we developed a procedure to choose the high-pass filter parameters in a sliding mode-controlled multicell converter. Methods. We suggest that the sliding mode is controlled by hysteresis bands as the excesses of the band. This delay in state exchanges gives a signal to control the switching frequency of the converter, which, in turn, produces a controlled trajectory. We are seeking an adaptive current control solution to address this issue and adapt a variable-bandwidth of the hysteresis modulation to mitigate nonlinearity in conventional sliding mode control, which struggles to set the switching frequency. Chatter problems are therefore avoided. A boundary layer-based control scheme allows multicell converters to operate with a fixed-switching-frequency. Practical value. Simulation studies in the MATLAB / Simulink environment are performed to analyze system performance and assess its robustness and stability. Thus, our converter is more efficient and able to cope with parametric variation.

Design and Analysis of Zeta Converter for Power Factor Correction Using Cascade PSO-GSA-Tuned PI and Reduced-Order SMC

This paper presents the design and analysis of a single-phase power factor correction (PFC) scheme using a DC–DC Zeta converter operating in continuous conduction mode. The presented DC–DC converter exhibits non-linearity due to switching elements that degrades the performance of the converter. Therefore, this paper proposes a non-linear cascade control of particle swarm optimization-gravitational search algorithm (PSO-GSA) tuned proportional-integral (PI) and sliding mode controller (SMC) in outer and inner loop, respectively, to improve the performance of the converter. The robustness of the controller is analysed by applying the load and line variations to the converter. The simulation results showed that the steady state performance indices such as integral absolute error and integral square error, and transient performance indices like settling time and peak overshoot are significantly enhanced for the proposed cascade control scheme compared to the PSO and root locus method of tuning the outer PI with the inner SMC controller. The proposed control scheme gives better performance in terms of power factor improvement, percentage reduction in total harmonic distortion, and efficient tracking of output voltage for change in reference voltage compared to other techniques presented. Further, the performance of the proposed scheme is tested for battery charging application of the solar photovoltaic system. The demonstrated simulation results are validated by implementing the DC–DC Zeta converter in real-time hardware set-up.

PT controlled PCCM buck converter with adaptive pulse train generator and NMOS current sensor

A pulse train controlled buck converter operating in pseudo continuous conduction mode (PCCM) is implemented in the 0.18-μm CMOS process in this paper. An adaptive pulse train generator, which adjusts duty cycle based on the output power, is proposed to improve the output voltage range and transient response. To operate in PCCM, an NMOS current sensor using a double common-gate amplifier with a high slew rate is utilized to detect the falling inductor current. Simulation results demonstrate that the converter obtains a well regulated variable output voltage from 1 V to 4 V, providing a maximum load current of 1000 mA at the switching frequency of 1 MHz. The transient spike is smaller than 35 mV and recovery time is less than 6.3μs for a 300 mA load current step. The peak efficiency is 94.4% at 300-mA load current.