Content Addressable Research Articles

D2B: A de Bruijn based content-addressable network

We show that the de Bruijn graph is appropriate for maintaining dynamic connections, e.g., between the members of a P2P application who join and leave the system at their convenience. We describe the content-addressable network D2B, based on an overlay network preserving de Bruijn connections dynamically, and on a distributed hash table (DHT) supporting efficient publish and search procedures. The overlay network has constant expected degree, and any publish or search operation in the DHT takes a logarithmic expected number of steps.

Load Balancing Routing Algorithm for Reverse Proxy Servers

We propose a novel routing algorithm for reverse proxy servers, called load balancing content address hashing (LB-CAH), and evaluate the performance of the proposed routing algorithm compared with that of the content address hashing (CAH) and the hash and slide (HAS) routing algorithms. The proposed LB-CAH routing algorithm calculates the popularity of pages in the load balancer using an LFU caching technique and periodically makes a popularity list. Using this popularity list, the proposed routing algorithm selects a reverse proxy server as follows. When the requested page appears in the popularity list, the request is routed according to the round robin method; otherwise, it is routed according to the content address hashing method. We evaluate and compare the LB-CAH, CAH and HAS routing algorithms by simulation experiments from the viewpoints of load balancing, consumed cache space and cache hit rate. Simulation experiments show that the proposed LB-CAH routing algorithm achieves almost the same degree of load balancing as the HAS algorithm and the same cache hit rate as the CAH algorithm for reverse proxy servers in various web site environments.

SCAN: A secure service directory for service-centric wireless sensor networks

Sensors and actuators offer services in service-centric sensor networks, e.g. they provide information about the temperature at a certain location. Those services are building blocks for the overall behaviour of the sensor networks. To offer dynamic composition of services and to make services available for every node in the network, a way to securely store and retrieve information about available services of the network is necessary. The paper presents Secure Content Addressable Network (SCAN) which is a distributed approach to a secure service directory for service-centric sensor networks.

Distributed Zone Partitioning Schemes for CAN and Its Application to the Load Balancing in Pure P2P Systems

In this paper, we propose several distributed zone partitioning schemes for Content-Addressable Networks (CAN), that is known as a pure peer-to-peer system based on the Distributed Hash Table (DHT). The main objective of the proposed schemes is to balance the load of nodes in the CAN system, in such a way that every node receives almost the same number of inquiries from the other nodes in the system. The result of simulations implies that, by using the proposed schemes instead of a randomized zone partitioning scheme originally implemented in the CAN system, we could reduce the response time for each inquiry to less than 75%.

Aligned prefix caching based on singleton information

In recent years, the lookup speed of Content Address Memory (CAM), a hardware solution for IP caching, is greatly improved. CAM is a good candidate for lightweight routing-lookup modules on input line-cards in parallelism router architecture. In this paper, we propose aligned-ancestor poisoning (AAP) and aligned-prefix caching (APC) to enhance IP caching. In particular, AAP is a marking scheme for tree-based routing tables. Routing-lookup results thus carry additional singleton information, which indicates whether predefined aligned prefixes are cacheable or not. APC is a caching scheme to utilize such routing-lookup results. To properly configure AAP and APC, we further investigate the properties of referred singleton prefixes. Our trace-driven simulations show that the required cache size can be significantly reduced, compared with the conventional destination caching scheme.

An Associative Architecture of CMAC for Mobile Robot Motion Control

A new design scheme for the Cerebellar Model Articular Controller (CMAC) is presented in this article. The controller is designed with a content addressable memory (CAM) that replaces the function of the hash-coding method, which is adopted by the traditional CMAC and consumes much computation power in memory space mapping. Therefore, address mapping in the proposed CMAC is different from the hash-coding method. The CAM, which is capable of fast comparison, can immediately determine in parallel if there is any identical data in memory as the input data to be compared. If a match does not occur, the activated address is then stored in a vacant cell of the CAM indexed by a circular incremental pointer. Memory collision can be avoided unless the memory is fully occupied. In this way, the memory utilization rate can be improved to 100%, which is difficult to achieve using the conventional schemes. Meanwhile, control noise can be largely suppressed. In content addressing, the associated mask function, which is triggered when the CAM is full, can decrease the probability of collision and improve control performance. Simulation results of function approximation and truck backer-upper control indicate that the proposed CMAC is clearly superior to the conventional CMACs.

A scalable content-addressable network

Hash tables - which map "keys" onto "values" - are an essential building block in modern software systems. We believe a similar functionality would be equally valuable to large distributed systems. In this paper, we introduce the concept of a Content-Addressable Network (CAN) as a distributed infrastructure that provides hash table-like functionality on Internet-like scales. The CAN is scalable, fault-tolerant and completely self-organizing, and we demonstrate its scalability, robustness and low-latency properties through simulation.

Associative memory for intelligent control

In many industrial applications of softcomputing, intelligent controls are important to accomplish high level tasks. Intelligent controls, however, need specific knowledge for each task. Therefore developing good memory is crucial to store the required knowledge efficiently and robustly. Neural network associative memories are the most suitable for the role because of their flexibility and content addressability. In this paper, first, we describe the basic concept of the neural network associative memories and the conventional learning algorithms. After pointing out some problems of the associative memories, we explain a novel learning algorithm, which is superior to the conventional ones. Finally, we introduce an associative memory suited for the intelligent controls and show the effectiveness by a number of computer simulations.

RAM versus CAM

Fifty years ago John von Neumann proposed the concept of the stored-program computer in which both instructions and data are confined within the boundaries of a storage device called memory. Today a computer architect is faced with a bewildering variety of memory-types to choose from when implementing this concept in the hardware. The most commonly used storage device is called random-access memory (RAM). That is, the process of locating a word within the storage array involves giving its address. The time needed to retrieve the word remains the same irrespective of the physical location of the word in the array. However, many data processing applications require searching items in some data structure, such as a table, stored in the memory. The established procedure to search a table is: 1) to store all the items where they can be accessed in sequence; 2) choose a sequence of addresses; 3) read the contents of memory at each address, and 4) compare the information read with the item being searched until a match occurs. This is exorbitantly time-consuming if the table is very large and/or the search algorithm is relatively inefficient. This time can be significantly reduced if the stored data can be identified for access by the content of the data itself rather than by an address. A memory unit accessed by content is called an associative memory or content addressable memory (CAM). This type of memory is accessed simultaneously and in parallel on the basis of the data content. This paper addresses the question: Is content addressability better than random-accessibility?.

A low-cost high-capacity associative memory design using cellular automata

The present paper reports a novel scheme for designing fast retrieval memory system using cellular automata. In essence, the proposed scheme implements the concept of hashing in hardware. This makes possible the design of low-cost high-capacity memory systems with limited content addressability as an option. The efficiency of the scheme has been verified through extensive simulation studies of the hardwired hashing function built around 1D and 2D linear cellular automata (CA).< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Optical matrix–vector implementation of the content-addressable network

The content-addressable network (CAN) is an efficient, intrinsically discrete training algorithm for binary-valued classification networks. The binary nature of the CAN network permits accelerated learning and significantly reduced hardware-implementation requirements. A multilayer optoelectronic CAN network employing matrix-vector multiplication was constructed. The network learned and correctly classified trained patterns, gaining a measure of fault tolerance by learning associative solutions to optical hardware imperfections. Operation of this system is possible owing to the reduced hardware accuracy requirements of the CAN learning algorithm.

Optical neural network with bipolar neural states

A method to achieve bipolar performance in a single-channel optical associative memory is presented. By coding the biased interconnection weights, a distributed background, and an input-dependent dynamic threshold on a single mask, we construct an optical network with both bipolar neural states and bipolar interconnections. Content addressability and other properties are improved by the introduction of a distributed background, as compared with the case in which this background is not used. Computer simulations and optical experiments are performed based on the Hopfield algorithm.

Neural network model for unequally distributed neuron states

A modified neural network model suitable for patterns with unequally distributed neuron states is proposed. The storage capacity and content addressability are greatly improved by adding a linear modification term to the interconnection weights of the Hopfield model. Computer simulations were performed to demonstrate the robustness of the modified model compared to the original. A gratingmodulated holographic hybrid system was employed for an optical demonstration. Experimental results are shown.

Basins of attraction in a neural network model trained with external fields

A neural network model with optimal connections trained with ensembles of external, discrete, noisy fields is studied. Allowing for non-zero errors in the storage, novel behaviour is observed, which is reflected in the model's retrieval map. Improvements in the model's content addressability is determined by comparing the maximum storage level at which there is a near 100% basin of attraction. The case presented here has the external field applied during training, during retrieval, and during both with statistically equal parameters. In all three the content addressability is improved over the external field network, with the equal training and retrieval fields case having the largest improvement. However, the apparent domination of the retrieval over the training field perhaps suggests this simple equality is unlikely to be the optimal relationship.

Information capacity in recurrent McCulloch–Pitts networks with sparsely coded memory states

A new access to the asymptotic analysis of autoassociation properties in recurrent McCulloch-Pitts networks in the range of low activity is proposed. Using information theory, this method examines the static structure of stable states imprinted by a Hebbian storing process. In addition to the definition of critical pattern capacity usually considered in the analysis of the Hopfield model, the authors introduce the definition of information capacity which guarantees content addressability and is a stricter upper bound of the information really accessible in an autoassociation process. They calculate these two types of capacities for two types of local learning rules which are very effective for sparsely coded patterns: the Hebb rule and the clipped Hebb rule. It turns out that for both rules the information capacity is exactly half the pattern capacity.

Information capacity in recurrent McCulloch–Pitts networks with sparsely coded memory states

A new access to the asymptotic analysis of autoassociation properties in recurrent McCulloch-Pitts networks in the range of low activity is proposed. Using information theory, this method examines the static structure of stable states imprinted by a Hebbian storing process. In addition to the definition of critical pattern capacity usually considered in the analysis of the Hopfield model, the authors introduce the definition of information capacity which guarantees content addressability and is a stricter upper bound of the information really accessible in an autoassociation process. They calculate these two types of capacities for two types of local learning rules which are very effective for sparsely coded patterns: the Hebb rule and the clipped Hebb rule. It turns out that for both rules the information capacity is exactly half the pattern capacity.

Enlarging the attractor basins of neural networks with noisy external fields

A neural network model with optimal connections trained with ensembles of external, discrete, noisy fields is studied. Allowing for non-zero errors in the storage, novel behaviour is observed which is reflected in the model's retrieval map. Improvement in the model's content addressability is determined by comparing the maximum storage level at which there is a near 100% basin of attraction. The cases presented have the external field applied during training, during retrieval and during both with statistically equal parameters. In all three the content addressability is improved over the zero external field network, with the equal training and retrieval fields case having the largest improvement. However, the apparent domination of the retrieval over the training field suggests this simple equality is perhaps not the optimal relationship.

An on-chip smart memory for a data-flow CPU

Register Alias Table (RAT) is a smart memory that is embedded in HPSm (High-Performance Substrate), a Berkeley data-flow CPU. It is a multiport memory that has content addressability and support for branch prediction and exception handling, in addition to conventional read and write operations. An experimental 1240-b smart memory chip is implemented in a 1.6- mu m double-metal scalable CMOS process. This memory performs 15 operations within a cycle time of 100 ns, has 34658 transistors, occupies an area of 3.8 mm*5.2 mm, and dissipates 0.51 W.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Content addressability: an exercise in the semantic matching of hardware and software design

This paper considers content addressability and discusses its potential impact on software engineering in the context of its affinity to, and thus efficient implementation of, common abstract data types. More generally, the authors present an approach to language design based on the abstracted characteristics of the implementing hardware. Based on the perceived needs of common data types, a prototype MOS VLSI content addressable memory component is designed together with enhancements leading to large fault-tolerant memory systems. A novel computer architecture is introduced to include this component and to provide an example target machine. The specification of a high level programming language, using a tractable set of extensions to conventional language syntax, then completes the programming environment.

Content-addressable mass memories

In the area of non-numerical data processing, the usual local addressing with its fixed access path is troublesome and time-consuming if very large data sets have to be handled. Next to the well-known software procedures more and more hardware solutions are sought for supporting the typically content-addressable data access. The apparently ideal solution of a parallel associative memory cannot be implemented in the capacities of mass memories, but it can be substituted for mass memories with content addressability.