Conservative Parallel Simulation Research Articles

Fine-Grained Parallel and Distributed Spatial Stochastic Simulation of Biological Reactions

Fine-Grained Parallel and Distributed Spatial Stochastic Simulation of Biological Reactions

Local versus global lookahead in conservative parallel simulations

This paper presents an algorithm, which we refer to as SGTNE, to efficiently obtain lookahead information from a cluster of processors in a parallel simulation in order to unblock (logical) processes (LP) in a given processor. The SGTNE algorithm is based on a TNE conservative synchronization scheme that relies on an independent execution of a shortest path algorithm in individual processors in order to provide lookahead to the resident LPs. Because TNE is executed on individual processors, it is susceptible to inter-processor deadlocks, which must be detected and broken at some cost. SGTNE (Semi-Global TNE) avoids these deadlocks by executing a shortest path algorithm over a snapshot of the LPs in a cluster of processors. An experimental study of SGTNE was conducted on an Intel Paragon A4. The study compared SGTNE to TNE and to an optimized version of Chandy–Misra (CM) null message algorithms. We also investigated several scheduling algorithms for SGTNE and determined factors influencing its performance, most notably the influence of partitioning. Our results indicate that SGTNE provides good speedup relative to the fastest sequential algorithm and that it out-performs TNE for the population level examined, SGTNE was 3–5 times as fast as the CM-algorithm.

Conservative Parallel Simulation of a Large Number of Processes

In this paper we evaluate parallel simulation based on conservative parallel discrete-event simulation algorithtms. We focus on optimization techniques for simulation models consisting of a large set of elements or processes. One of the main problems during simulation of these large models is the synchronization of elements located on the same processor. While advanced algo rithms are often very time consuming, simple methods fail to exploit the parallelism within the model. Here we describe methods which exploit the parallelism within a model while adding only moderate overhead to the simulation. Finally, we present some simulation results based on our methods.

Modelling and simulation of interconnection networks: a conservative parallel approach

The use of conservative parallel simulation techniques to accelerate multistage interconnection network simulation is addressed. The conventional null-message approach to resolving the deadlock problem in conservative simulation may lead to a livelock if lookahead cannot be guaranteed. We propose a new deadlock/livelock free scheme using null messages, but without the presumed lookahead, to co-ordinate the parallel simulation. A flushing mechanism to address the combinatorial explosion of memory consumption due to such null messages is also discussed. Our analysis shows that the proposed flushing mechanism effectively reduces the memory consumption from exponential to linear. Different partitioning and transformation techniques are used to map the simulation program onto multiprocessor platforms. Both the empirical and analytical results show an exceptional phenomenon that a balanced simulation workload distribution may not necessarily translate into better run-time performance.

Dynamic load balancing strategies for conservative parallel simulations

This paper studies the problem of load balancing for conservative parallel simulations for execution on a multicomputer. The synchronization protocol makes use of Chandy-Misra null-messages. We propose a dynamic load balancing algorithm which assumes no compile time knowledge about the workload parameters. It is based upon a process migration mechanism, and the notion of CPU-queue length, which indicates the workload at each processor.We examine two variations for the algorithm which we refer to as centralized and multi-level hierarchical methods, in the context of queueing network simulation of a torus. The torus was chosen because it of its many cycles aid in the formation of deadlock making it a stress test for any conservative synchronization protocols. Our experiments indicate that our dynamic load balancing schemes significantly reduce the run time of an optimized version of Chandy-Misra null message approach, and decreases by 30-40\% the synchronization overhead when compared to the use of a static partitioning algorithm. Significantly, the results obtained also indicate that the multi-level scheme always outperforms both the centralized load balancing approach and the static partitioning algorithm.

Modelling And Distributed Simulation On A Network Of Workstations

This paper addresses the issues of applying parallel simulation techniques to accelerate simulation on a network of workstations. The Omega multistage interconnection network is used as an example application. The conservative parallel simulation synchronization scheme using conventional null-message approach to resolve deadlock problem is based on a lookahead mechanism. For some application domains, unfortunately, the lookahead information is not available. Consequently, parallel simulation using null messages can result in live lock. We propose a deadlock/livelock free scheme using null messages, but without the lookahead assumption, to coordinate the simulation. In addition, we investigate different partitioning and transformation techniques for mapping a simulation program onto a network of workstations. A flushing mechanism to address the combinatoric explosion of using null-message in conservative simulation is also discussed. Our analysis shows that the proposed flushing mechanism effectively reduces the number of null messages from exponential to linear.

Reducing synchronization overhead in parallel simulation

Synchronization is often the dominant cost in conservative parallel simulation, particularly in simulations of parallel computers, in which low-latency simulated communication requires frequent synchronization. We present and evaluate LOCAL BARRIERS and PREDICTIVE BARRIER SCHEDULING, two techniques for reducing synchronization overhead in the simulation of message-passing multicomputers. Local barriers use nearest-neighbor synchronization to reduce waiting time at synchronization points. Predictive barrier scheduling, a novel technique that schedules synchronizations using both compile-time and runtime analysis, reduces the frequency of synchronization operations. In contrast to other work in this area, both techniques reduce synchronization overhead without decreasing the accuracy of network simulation. These techniques were evaluated by comparing their performance to that of periodic global synchronization. Experiments show that local barriers improve performance by up to 24% for communication-bound applications, while predictive barrier scheduling improves performance by up to 65% for applications with long local computation phases. Because the two techniques are complementary, we advocate a combined approach. This work was done in the context of PARALLEL PROTEUS, a new parallel simulator of message-passing multicomputers.

Improving conservative VHDL simulation performance by reduction of feedback

This paper describes two forms of feedback in the simulation runtime of VHDL circuits that greatly influences performance. While circuit feedback and strongly connected components have been observed and documented as detrimental influences to conservative parallel discrete event simulation (PDES) efficiency, that influence has never been quantified. Moreover, in this study, the phenomenon of induced feedback was observed to diminish speedup to the same degree as explicit feedback. In this paper the influence of feedback on simulation runtime is analyzed and an algorithm for its elimination is presented. In addition, a metric for the quantification of feedback is introduced. By measuring feedback, it is possible to balance its influence on simulation runtime with that of other factors (e.g. load balance, number of processors, machine granularity, etc. ) through the use of a cost-based partitioning approach. This paper reports significant improvements in runtime for three circuits due to the prevention of feedback using the partitioning algorithm presented. In addition, strong correlation between the feedback metric and conservative parallel simulation overhead is demonstrated.

Conservative parallel simulation of ATM networks

A new Conservative algorithm for both parallel and sequential simulation of networks is described. The technique is motivated by the construction of a high performance simulator for ATM networks. It permits very fast execution of models of ATM systems, both sequentially and in parallel. A simple analysis of the performance of the system is made. Initial performance results from parallel and sequential implementations are presented and compared with comparable results from an optimistic TimeWarp based simulator. It is shown that the conservative simulator performs well when the "density" of messages in the simulated system is high, a condition which is likely to hold in many interesting ATM scenarios.

Performance analysis of parallel simulation on distributed systems

This paper presents an analytical model to evaluate the performance of parallel simulation on distributed computing platforms. The proposed model is formalized by two important time components in parallel and distributed processing: computation time and communication time. A conservative parallel simulation of multistage interconnection networks is used as an example in our analytical model. Performance metrics such as elapsed time, speedup and simulation bandwidth associated with different schemes for partitioning/mapping parallel simulation onto distributed processors are evaluated. Our mathematical analysis identifies the major constituents of simulation overheads in these mapping strategies necessary for improving parallel simulation efficiency. We also show that a perfectly balanced workload distribution may not necessarily translate into better performance. On the contrary, we have shown that a balanced mapping of workload may increase communication overheads resulting in a longer simulation elapsed time. Our performance model has been validated against implementation results from a parallel simulation model. The analytical framework is also practical to evaluate the runtime efficiency of other simulation applications which are based on the conservative paradigm.

Prediction of memory consumption in conservative parallel simulation

This paper proposes a critical path-like analyzer to predict the amount of memory consumed in a specific Chandy-Misra simulation: Segments of code are inserted into the existing sequential simulation program, and this modified simulation program is called a memory analyzer. The amount of memory needed in the corresponding Chandy-Misra simulation is computed along with the execution of the memory analyzer. Experiments to evaluate the analyzer are in groups.

A parallelism analyzer for conservative parallel simulation

Most small-scale simulation applications are implemented by sequential simulation techniques. As the problem size increases, however, sequential techniques may be unable to manage the time complexity of the simulation applications adequately. It is natural to consider re-implementing the corresponding large-scale simulations using parallel techniques, which have been reported to be successful in reducing the time complexity for several examples. However, parallel simulation may not be effective for every application. Since the implementation of parallel simulation for an application is usually very expensive, it is required to investigate the performance of parallel simulation for a particular application before re-implementing the simulation. The Chandy-Misra parallel, discrete-event simulation paradigm has been utilized in many large-scale simulation experiments, and several significant extensions have been based on it. Hence the Chandy-Misra protocol is adopted here as a basic model of parallel simulation to which our performance prediction techniques are applied. For an existing sequential simulation program based on the process interaction model, this paper proposes a technique for evaluating Chandy-Misra parallel simulation without actually implementing the parallel program. The idea is to insert parallelism analysis code into the sequential simulation program. When the modified sequential program is executed, the time complexity of the parallel simulation based on the Chandy-Misra protocol is computed. Our technique has been used to determine whether a giant Signaling System 7 simulation (sequential implementation) should be re-implemented using the parallel simulation approach. >

Modeling and Simulation of a High Speed LAN

Simulation is a tool that can be used to assess functionality and performance of communication networks and protocols. However, efficient simulation of complex communication systems is not a trivial task. In this paper, we discuss modeling and simulation of bus-based communication networks and present the results of modeling and simulation of a multigigabit/s LAN. We used parallel simulation techniques to reduce the simulation time of the LAN and implemented both an optimistic and a conservative parallel simulation scheme. Our experimental results on a shared memory multiprocessor indicate that the conservative parallel simulation scheme is superior to the optimistic one for this specific application. The parallel simulator based on the conservative scheme demonstrates a linear speedup for large networks.

A static partitioning and mapping algorithm for conservative parallel simulations

In this paper, we consider the problem of partitioning a conservative parallel simulation for execution on a multi-computer. The synchronization protocol makes use of null messages [6]. We propose the use of a simulated annealing algorithm with an adaptive search schedule to find good (sub-optimal) partitions. The paper discusses the algorithm, its implementation and reports on the performance results of simulations of a partitioned FCFS queueing network model executed on iPSC/860 hypercube. The results obtained are compared with a random partitioning. They show that a partitioning which makes use of our simulated annealing algorithm results in a reduction of 25-35% of the running time of the simulations when compared to the running time of a random partition of the model.

A generalized carrier-null method for conservative parallel simulation

The carrier-null message approach to conservative-distributed discrete-event simulation can significantly reduce the number of synchronization messages required to avoid deadlock. In this paper we show that the original approach does not apply to simulations with arbitrary communication graphs and we propose a modified carrier-null approach which does. We present and discuss some preliminary results obtained using our approach to simulate digital logic circuits.

Optimistic Parallel Simulation of Continuous Time Markov Chains Using Uniformization

In an earlier paper we described how uniformization can be used as the basis of a conservative parallel simulation algorithm for simulating a continuous time Markov chain (CTMC). The fundamental notion is that uniformization permits the calculation (in advance of actually running the simulation) of instants where processors will synchronize, achieving much lower synchronization overhead than is usually attributed to conservative methods. In this paper we extend the idea further, showing how to use uniformization in the context of an optimistic parallel simulation to reduce the frequency of state-saving, schedule intelligently, and eliminate the Global Virtual Time (GVT) calculation. We demonstrate the efficiency of the method by implementation on a 16-processor Intel iPSC/2 and on 256 processors of the Intel Touchstone Delta.

On a parallel partitioning technique for use with conservative parallel simulation

The major goal of this work has been to develop an implementation of a parallel partitioning algorithm which is suitable for use in a conservatively synchronized Parallel Discrete Event Simulation (PDES) environment. Effective partitioning is essential for performance and capacity consideration, for any PDES problem. The performance of the partitioning algorithm is very important, to the overall simulation performance. There are two possible approaches to improve performance for the partitioning step: algorithm modifications; and parallelize the partitioning algorithm (Fiduccia and Mattheyses, 1982) is developed. The basic algorithm has been modified, first for parallel execution with a similar quality of final partition; and then further modified to increase the parallelism of the algorithm, at the expense of partition quality.

How using busses in multicomputer programs affects conservative parallel simulation

In this paper we consider the effect of using bus interconnection structures on the overheads present in conservative parallel simulations of multicomputer programs. We use a modified version of the Poker Programming Environment to empirically measure the overhead in three parallel algorithms using buses. We discuss the sources of overhead and compare them with those found using point-to-point communication. Preliminary results indicate that the overheads encountered using a bus interconnection structure were not predicted by our previous results using point-to-point communications.

Conservative parallel simulation of continuous time Markov chains using uniformization

The authors describe parallel algorithms for simulating certain continuous time Markov chains, such as those arising in queueing network models of distributed computing systems or communications systems. The algorithms are based on the technique of uniformization. Two variations of a conservative parallel simulation algorithm are presented. In each algorithm, a relatively short presimulation is performed to identify those times, and only those times, at which the simulation algorithm requires processor pairs to synchronize. Speedup studies of the algorithms, performed on a 16-node Intel iPSC/2 hypercube, are presented and discussed. >

A delay-based model for circuit parallelism

A new formal model for variable-delay simulators is presented for comparing the effects of time base on circuit parallelism. This model more accurately reflects current simulation strategies than previous models. Using this new model the author shows that parallelism is not a nondecreasing function of time base. She bounds parallelism, however, by two functions that converge to the unit-delay parallelism as the time base increases, preserving the intuition that coarser timing models result in greater parallelism. In addition, the author corroborates the model predictions via an empirical study and discusses the impact of the results on synchronous and conservative asynchronous parallel simulations.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>