Consecutive Bits Research Articles

On ensuring data recoverability by the use of error-correcting codes

The problem of controlling data errors in magnetic disc storage is one of fundamental importance. Data errors caused by electrical noise within the system are considered 'soft' and generally recoverable by retry of the data transfer operation, resulting in execution overhead. However, errors caused by inherent defects in the recording media or due to contamination are considered to be 'hard' and occur in 'bursts', in which case, consecutive bit positions are corrupted, as opposed to isolated 'random' errors. In the latter case, data is inevitably lost. This paper describes the effective use of error-correcting codes to combat burst errors in disc storage.

Sequentially Companded Modulation for Low-Clock-Rate Speech Codec Applications

The expansion of the step size of a speech codec may be arranged to change as the number of identical consecutive bits starts to increase. This technique causes the codec to respond partially to a fewer number of identical consecutive bits and more dramatically to larger numbers. In contrast to a typical exponential expansion of the step size, the proposed technique, in addition, expands the exponent. For speech, two distinct advantages have been observed: (i) the improvement of higher frequency audio frequency response at the same clock rate and (ii) the reduction of idle channel noise. In practice we have found that three- and four-bit companding will suffice for a typical 24 kHz, ADM codec. The proposed companding appears to be an acceptable choice between two-, three-, and four-bit companding which leads to better frequency response but worse noise, and four-bit companding which leads to both worse frequency and noise responses.

Performance evaluation of a general framing circuit using two N -stage shift registers

A general algorithm is presented for computing the average number of shifts per frame period (A) of a framing circuit which checks for N consecutive data bits for possible framing bit candidacy. A simulation program has also been written to compute A for N between 2 and 8.

A New Random-Error-Correction Code

A new random-error-correction code presented here is one of the most efficient two-error-correction codes. The new code can correct 2-bit random errors within twelve (12) consecutive bits while (15,7) BCH code [1] corrects two errors within fifteen (15) bits and Hagelbarger's code [2] corrects two errors within fourteen (14) bits. Although Peterson and Weldon's double-error-correcting (12,6) code [1] and Massey's two-error-correcting convolutional code [3] also correct two errors within twelve (12) bits, both codes propagate errors. The (12,6) Viterbi code [1], [4] corrects two errors and uses a Viterbi decoder, while the new code is decodable with a one-step majority logic. Error propagation in the feedback majority logic decoder is discussed, and it is proved empirically that the new code presented here does not propagate errors.

Efficient Generation of Statistically Good Pseudonoise by Linearly Interconnected Shift Registers

Some new algorithms are presented for efficiently generating pseudorandom noise both in hardware and software. In software, a new word of pseudorandom bits can be generated about every 12 machine cycles, and hardware implementations can generate pseudo Gaussian noise with bandwith of 20 MHz or more. The algorithms generate binary maximal-length linear recursive sequencies of high degree and with many nonzero terms. The ability to efficiently implement high-degree recursions is important because the number of consecutive bits which can be guaranteed to be both linearly and statistically independent is equal to the degree of the recursion. The implementations are by interconnection of several short shift registers in a linear manner in such a way that different widely spaced phase shifts of the same p-n sequence appear in the stages of the several registers. Some specific algorithms have been subjected to extensive statistical evaluation, with no evidence found to distinguish the sequences from purely random binary sequences.

An Automatic Computer-to-Computer Digital Communications System

This paper discusses the design of an automatic on-line computer-to-computer intercommunications system with locations at several data processing centers throughout the world. The solution to the problem is developed in logical order starting with the selection of a transmission medium. Leased private wire telephone facilities were found to be the best world-wide common denominator for economically meeting reliability and speed (1200, 2400 and 600 bit/sec) criteria. Pertinent statistical information characterized the transmission environment with short periods of high burst noise and long periods of error-free transmission. A statistically related burst "error model" of 48 successive bits subject to error was derived. Several available error detecting and correcting codes were considered, and the limitations of each explored. A geometric block code combined with a Hamming cyclical code was found to possess excellent burst error detection capability (343 consecutive bits subject to error or an error correction capacity of one "error model" of 48 bits). When this forward acting code is combined with decision feedback the probability of undetected error entering the system is reduced to less than that in computer systems. Implementation of the code structure is uniquely suitable to time sharing and linear-feedback shift-register techniques.