Connected Component Detection Research Articles

Transitive closure algorithm MEMTC and its performance analysis

In this paper, we present a new algorithm for computing the full transitive closure designed for operation in layered memories. The algorithm is based on strongly connected component detection and on a very compact representation of data. We analyze the average-case performance of the algorithm experimentally in an environment where two layers of memory of different speed are used. In our analysis, we use trace-based simulation of memory operations.

Stability of CNN with opposite-sign templates and nonunity gain output functions

The stability of a cellular neural network (CNN) with opposite-sign templates and a non-unity gain or cyclic voltammogram output function is studied. In the CNN's stable states, new connected component detection structures 1 and 2 (NCCD-1 and NCCD-2) and two thinning-like structures (TL-1 and TL-2) have been discovered.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

A high speed systolic architecture for labeling connected components in an image

Connected components detection and labeling is an essential step in many image analysis techniques. The efficiency of the connected components labeling algorithm is critical for many image processing and machine vision applications that require real time response. The advances in the areas of parallel processing and VLSI technology can be exploited in designing hardware algorithms of high speed and throughput. In this paper, the authors propose a systolic algorithm and architecture for finding connected components in an image. The architecture is simple and can be implemented as a special purpose VLSI chip. Although, the algorithm has a time complexity of O(N/sup 2/), this is in terms of the actual clock cycle which is estimated as 25 nano seconds. The proposed hardware can process a 128/spl times/128 image in 0.85 msec and uses 128 processors whereas the MPP requires 94.6 msec with 16384 processors. The only special purpose hardware that exists requires 300 msec to label a 512/spl times/512 image which can be accomplished in 13.5 msec using the authors' proposed hardware. >

Current-mode techniques for the implementation of continuous- and discrete-time cellular neural networks

A unified, comprehensive approach to the design of continuous-time (CT) and discrete-time (DT) cellular neural networks (CNNs) using CMOS current-mode analog techniques is presented. The net input signals are currents instead of voltages, which avoids the need for current-to-voltage dedicated interfaces in image processing tasks with photosensor devices. Outputs may be either currents or voltages. Cell design relies on exploiting current mirror properties for the efficient implementation of both linear and nonlinear analog operators. Basic design issues, the influence of nonidealities and advanced circuit design issues, and design for manufacturability considerations associated with statistical analysis are discussed. Experimental results are given for three prototypes designed for 1.6- mu m n-well CMOS technologies. One is discrete-time and can be reconfigured via local logic for noise removal, feature extraction (borders and edges), shadow detection, hole filling, and connected component detection (CCD) on a rectangular grid with unity neighborhood radius. The other two prototypes are continuous-time and fixed template: one for CCD and other for noise removal. >

Analog CMOS implementation of cellular neural networks

The analog CMOS circuit realization of cellular neural networks with transconductance elements is presented. This realization can be easily adapted to various types of applications in image processing just by choosing the appropriate transconductance parameters according to the predetermined coefficients. The effectiveness of the designed circuits for connected component detection is shown by HSPICE simulations. For fixed function cellular neural network circuits, the number of transistors is reduced further by using multi-input transconductance elements.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Discrete‐time cellular neural networks

AbstractA network structure called a discrete‐time cellular neural network is introduced. It is derived from cellular neural networks and feedback threshold networks. the architecture is discussed and its advantages are presented. Convergence is proved for a large class of templates and applications are given for the following image‐processing tasks: linear thresholding, connected component detection, hole filling, concentric contouring, increasing and decreasing objects step by step, searching for objects with minimal distance, and oscillation.

Design of high‐speed, high‐density CNNS in cmos technology

AbstractAn analogue VLSI circuit architecture for the CMOS implementation of cellular neural networks (CNNs) is presented. It is based exclusively on the use of small capacitors and operational transconductance amplifiers operating in continuous time. Integrated circuit implementations of this architecture are very well suited for processing applications requiring large array size and high speed. We describe a systematic design approach for those circuits and present the design, fabrication and testing of two chips. These chips are used for connected component detection applications and are the first working integrated circuit implementation of a CNN. They contain 2000 transistors and have been fabricated using 2 μm CMOS technology. the density is 32 cells per square millimetre of silicon and the time constant of the processing is of the order of 10−7 s. Experimental results of static and dynamic tests are given, including a complete image‐processing example.

A CNN chip for connected component detection

The first working chips that implement a cellular neural network (CNN) are reported. They have been integrated in a CMOS 2- mu m technology, and are intended for connected component detection processing applications. The operation is made in continuous time using analog circuitry. The design, fabrication, and testing of these chips are presented. >

Stability of cellular neural networks with opposite-sign templates

Cellular neural networks (CNNs) with opposite-sign templates have been successfully applied by T. Matsumoto et al. in connected component detection (CCD) in feature extraction (see ibid., vol.37, p.633-5, 1990). A stability analysis of this class of nonreciprocal CNN is provided by L.O. Chua et al. (see ibid., vol.37, p.1520-7, 1990). In this paper, a thorough stability analysis of this type of CNNs which shows the dependence of complete stability on the template values is presented. Parameter regions for complete stability and instability are determined, and the parameter region for the functionality of CCD is also given based on this investigation. Simulation examples verify that the complete stability of CNN with opposite-sign templates is not always preserved.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Drop size distribution in sprays by image processing

An automatic analysis system has been developed and used to analyze photographs obtained by high-speed microphotography, the final aim being to derive spatial resolved size distributions of drops in sprays. The problem of determining whether photographic images of particles are in focus or not is solved by obtaining a calibration of geometric parameters of particle images as functions both of the particle position in the camera's field of view and of the particle diameter. On the basis of the results of this calibration on the particular photographic system being used, the drops are automatically rejected or sized and counted. This is done through a procedure based on the geometrical characterization of drop images at different ranges of gray levels. The main body of such a procedure is constituted by an algorithm of original design (connected components detection algorithm) which allows for the simultaneous detection of the boundaries of drop images at different gray levels and generates a hierarchical structure among them. Size distributions obtained by means of the procedure described in the paper offer significant reduction in experimental time as well as improvement in experimental accuracy, in relation to manual sizing and counting techniques.

A Graph-Theoretic Approach to a Communications Problem

A Graph-Theoretic Approach to a Communications Problem