Concurrent Software Development Research Articles

(Invited) Challenges and Opportunities for the Computational Analysis of Electrochemical Energy Systems

Electrochemical systems are challenging to analyze and design due to their multi-dimensional, time-dependent, and multi-physics nature. For this reason, many computational electrochemical system models have been developed in the past three decades, some of which can now be found in commercial software packages, e.g., COMSOL or ANSYS Fluent. These models however: i) are based on simplifying assumptions, e.g., reduced dimensionality, infinite dilution, Tafel kinetics; ii) contain uncertain input parameters, e.g., effective transport properties and kinetic parameters; and, iii) are only validated with a limited number of experiments, e.g., polarization curves. These limitations, understandable at the time due to limited computational resources, characterization techniques, and material understanding and stability, are difficult to justify today that parallel programming and computer clusters enable scientists to perform large multi-dimensional simulations; electrochemical testing has expanded to include segmented cell testing, impedance spectroscopy, water flux estimation, and in-operando visualization; and, characterization tools and techniques have been developed to, for example, easily measure adsorption isotherms, effective proton conductivity and, within a given resolution, visualize the three-dimensional microstructure of the electrodes.Scientists working on computational analysis of electrochemical systems must acknowledge that further model development is still needed and must take advantage of new resources to improve the robustness and accuracy of cell-level models. The path is long and crooked, but it is very likely that the opportunity for a truly useful computational model, one that can be used for design, is beyond simplistic implementations and polarization curves. The effort is great, but it can be minimized by concurrent software development, as well as, by careful experimental work dedicated to parameter estimation and model validation.This presentation aims at outlining the limitations of state-of-the-art models, the challenges and opportunities of concurrent development and maintenance of a multi-scale, transient electrochemical energy system software, such as the open-source fuel cell simulation toolbox (OpenFCST) [1], and the new opportunities provided by combining advanced characterization tools with computational analysis. As an example, the development and validation of the transient, two-phase fuel cell and electrolyzer cell-level models in OpenFCST will be discussed [2]. The use of a hydrogen-pump model to study the effect of an active catalyst in CL effective proton conductivity measurements will also be discussed as an example of concurrent experimental/model design [3].

Formula omitted]: A simplified and abstract multicore hardware model for large scale system software formal verification

This paper introduces SimplMM, a novel subsystem within the Certified Concurrent Abstraction Layers (CCAL) modular software verification framework, designed specifically for fine-grained concurrent software. SimplMM aims to provide a generic, practical, and realistic multicore machine model for verifying software within the CCAL framework.While formal multicore hardware semantics have seen extensive development, their integration with large-scale software verification has received limited attention. To address this gap, we propose a novel approach: a toolkit comprising a generic sequentially consistent multicore semantics, contextual refinement templates, and libraries. These components establish crucial connections between the machine model and verified program modules (layers) using CCAL. We demonstrate the practicality of our framework by successfully integrating it with existing large-scale proofs, specifically for CertiKOS running on top of the x86 hardware architecture.This research significantly advances the field of accurate and efficient concurrent software verification and development tools for multicore systems. Our provision of a practical and formal multicore machine model, seamlessly integrated within the CCAL framework, equips developers with a powerful toolkit for large-scale concurrent software verification. The effectiveness of our approach, validated through successful integration with existing large-scale proofs such as CertiKOS, establishes a robust foundation for the design and verification of concurrent software in multicore systems.

Devices and techniques used to obtain and analyze three-dimensional cell cultures.

Cell cultures are indispensable for both basic and applied research. Advancements in cell culture and analysis increase their utility for basic research and translational applications. A marked development in this direction is advent of three-dimensional (3D) cultures. The extent of advancement in 3D cell culture methods over the past decade has warranted referring to a single cell type being cultured as an aggregate or spheroid using simple scaffolds as "traditional." In recent years, the development of "next-generation" devices has enabled cultured cells to mimic their natural environments much better than the traditional 3D culture systems. Automated platforms like chip-based devices, magnetic- and acoustics-based assembly devices, di-electrophoresis (DEP), micro pocket cultures (MPoC), and 3D bio-printing provide a dynamic environment compared to the rather static conditions of the traditional simple scaffold-based 3D cultures. Chip-based technologies, which are centered on principles of microfluidics, are revolutionizing the ways in which cell culture and analysis can be compacted into table-top instruments. A parallel evolution in analytical devices enabled efficient assessment of various complex physiological and pathological endpoints. This is augmented by concurrent development of software enabling rapid large-scale automated data acquisition and analysis like image cytometry, elastography, optical coherence tomography, surface-enhanced Raman scattering (SERS), and biosensors. The techniques and devices utilized for the purpose of 3D cell culture and subsequent analysis depend primarily on the requirement of the study. We present here an in-depth account of the devices for obtaining and analyzing 3D cell cultures.

Decision Support for Project Rescheduling to Reduce Software Development Delays based on Ant Colony Optimization

Delays often occur during some activities in software development projects. Without handling of project delays effectively, many software development projects fail to meet their deadlines. If extra employees with same or similar skills and domain knowledge can be rescheduled for the remaining activities of the delayed projects, it can be possible to reduce or even eliminate existing delays in concurrent software development projects of similar nature. However, it is evident that employee rescheduling may result in delaying other activities, which may lead to the problem of delay propagation. Hence, it is important to investigate how to reduce or even eliminate the delay in one project without impacting other projects. By nature this is an NP-hard problem. Therefore, we propose a novel generic rescheduling strategy based on adaptive ant colony optimization algorithm to provide decision support for software project managers to select appropriate employees to deal with project delays. We have carried out a set of comprehensive experiments to evaluate the performance of the proposed strategy. In addition, three real world software project instances are also utilized to evaluate our strategy. The results show that our strategy is effective, efficient and able to outperform its representative counterparts significantly.

On Asynchrony and Choreographies

Choreographic Programming is a paradigm for the development of concurrent software, where deadlocks are prevented syntactically. However, choreography languages are typically synchronous, whereas many real-world systems have asynchronous communications. Previous attempts at enriching choreographies with asynchrony rely on ad-hoc constructions, whose adequacy is only argued informally. In this work, we formalise the properties that an asynchronous semantics for choreographies should have: messages can be sent without the intended receiver being ready, and all sent messages are eventually received. We explore how out-of-order execution, used in choreographies for modelling concurrency, can be exploited to endow choreographies with an asynchronous semantics. Our approach satisfies the properties we identified. We show how our development yields a pleasant correspondence with FIFO-based asynchronous messaging, modelled in a process calculus, and discuss how it can be adopted in more complex choreography models.

Design and Evaluation of SunSpec-Compliant Smart Grid Controller with an Automated Hardware-in-the-Loop Testbed

With increasing penetrations of inverter-based, renewable energy resources on electrical grids around the world, new distributed energy resource (DER) interconnection and interoperability requirements have been introduced to address emerging power system operator needs. The inverter-based power conversion systems are capable of communicating with grid operators, providing voltage and frequency support, and supporting the grid during faults. However, DER vendors are under pressure to quickly and reliably update the interoperability and electrical capabilities of their equipment for different jurisdictions with the rapidly changing landscape of disparate codes and standards. The necessary power hardware required for testing power systems under the wide variety of operational conditions may be untenable for many organizations. Therefore, we introduce an approach for the concurrent development of controls and application software through a controller hardware-in-the-loop (CHIL) testbed integrated with an automated testing platform that allows for the cost-effective, flexible evaluation of advanced grid support functions without the need for large and expensive power hardware. We show this CHIL capability through the demonstration and automation of interconnection tests with a 34.5 kW Austrian Institute of Technology (AIT) smart grid converter (SGC) connected to a Typhoon HIL system. We have demonstrated the CHIL system with regards to connect/disconnect, active power curtailment, fixed power factor, reactive power control, volt-var, and frequency-watt advanced grid functionality tests. For all tests, the automated CHIL testing protocols for advanced functions were sufficient to demonstrate and evaluate the grid support behavior of the equipment under test.

Concurrency bugs in open source software: a case study

Concurrent programming puts demands on software debugging and testing, as concurrent software may exhibit problems not present in sequential software, e.g., deadlocks and race conditions. In aiming to increase efficiency and effectiveness of debugging and bug-fixing for concurrent software, a deep understanding of concurrency bugs, their frequency and fixing-times would be helpful. Similarly, to design effective tools and techniques for testing and debugging concurrent software, understanding the differences between non-concurrency and concurrency bugs in real-word software would be useful.This paper presents an empirical study focusing on understanding the differences and similarities between concurrency bugs and other bugs, as well as the differences among various concurrency bug types in terms of their severity and their fixing time, and reproducibility. Our basis is a comprehensive analysis of bug reports covering several generations of five open source software projects. The analysis involves a total of 11860 bug reports from the last decade, including 351 reports related to concurrency bugs. We found that concurrency bugs are different from other bugs in terms of their fixing time and severity while they are similar in terms of reproducibility. Our findings shed light on concurrency bugs and could thereby influence future design and development of concurrent software, their debugging and testing, as well as related tools.

Verification of MPI Java programs using software model checking

Development of concurrent software requires the programmer to be aware of non-determinism, data races, and deadlocks. MPI (message passing interface) is a popular standard for writing message oriented distributed applications. Some messages in MPI systems can be processed by one of the many machines and in many possible orders. This non-determinism can affect the result of an MPI application. The alternate results may or may not be correct. To verify MPI applications, we need to check all these possible orderings and use an application specific oracle to decide if these orderings give correct output. MPJ Express is an open source Java implementation of the MPI standard. We developed a Java based model of MPJ Express, where processes are modeled as threads, and which can run unmodified MPI Java programs on a single system. This enabled us to adapt the Java PathFinder explicit state software model checker (JPF) using a custom listener to verify our model running real MPI Java programs. We evaluated our approach using small examples where model checking revealed message orders that would result in incorrect system behavior.

Non-preemptive and SRP-based fully-preemptive scheduling of real-time Software Transactional Memory

Recent embedded processor architectures containing multiple heterogeneous cores and non-coherent caches renewed attention to the use of Software Transactional Memory (STM) as a building block for developing parallel applications. STM promises to ease concurrent and parallel software development, but relies on the possibility of abort conflicting transactions to maintain data consistency, which in turns affects the execution time of tasks carrying transactions. Because of this fact the timing behaviour of the task set may not be predictable, thus it is crucial to limit the execution time overheads resulting from aborts. In this paper we formalise a FIFO-based algorithm to order the sequence of commits of concurrent transactions. Then, we propose and evaluate two non-preemptive and one SRP-based fully-preemptive scheduling strategies, in order to avoid transaction starvation.

On the Verification of Concurrent, Asynchronous Programs with Waiting Queues

Recently, new libraries, such as Grand Central Dispatch (GCD), have been proposed to directly harness the power of multicore platforms and to make the development of concurrent software more accessible to software engineers. When using such a library, the programmer writes so-called blocks , which are chunks of code, and dispatches them using synchronous or asynchronous calls to several types of waiting queues. A scheduler is then responsible for dispatching those blocks among the available cores. Blocks can synchronize via a global memory. In this article, we propose Queue-Dispatch Asynchronous Systems as a mathematical model that faithfully formalizes the synchronization mechanisms and behavior of the scheduler in those systems. We study in detail their relationships to classical formalisms such as pushdown systems, Petri nets, F ifo systems, and counter systems. Our main technical contributions are precise worst-case complexity results for the Parikh coverability problem and the termination problem for several subclasses of our model. We also consider an extension of Q das with a fork-join mechanism. Adding fork-join to any of the subclasses that we have identified leads to undecidability of the coverability problem. This motivates the study of over-approximations. Finally, we consider handmade abstractions as a practical way of verifying programs that cannot be faithfully modeled by decidable subclasses of Q das .

Towards Practical Graph-Based Verification for an Object-Oriented Concurrency Model

To harness the power of multi-core and distributed platforms, and to make the development of concurrent software more accessible to software engineers, different object-oriented concurrency models such as SCOOP have been proposed. Despite the practical importance of analysing SCOOP programs, there are currently no general verification approaches that operate directly on program code without additional annotations. One reason for this is the multitude of partially conflicting semantic formalisations for SCOOP (either in theory or by-implementation). Here, we propose a simple graph transformation system (GTS) based run-time semantics for SCOOP that grasps the most common features of all known semantics of the language. This run-time model is implemented in the state-of-the-art GTS tool GROOVE, which allows us to simulate, analyse, and verify a subset of SCOOP programs with respect to deadlocks and other behavioural properties. Besides proposing the first approach to verify SCOOP programs by automatic translation to GTS, we also highlight our experiences of applying GTS (and especially GROOVE) for specifying semantics in the form of a run-time model, which should be transferable to GTS models for other concurrent languages and libraries.

JMVC: A Java Framework for Rapidly Developing Desktop Application Software Based on MVC

Java is one of the leading software development languages. However, the development model of existing Java organizes without structure, mixing the programming code for data access, the processes of business logic, and the graphical user interface layer together. This disorganization creates many problems for software developers, and prevents Java from meeting todays’ requirements for rapid application software development. A model-view-controller framework is a tool for facilitating the rapid development of software in a concurrent software development environment. In this paper, we propose a Java-based model-view-controller framework that we dub JMVC for developing desktop-based applications that can separate the data, view, and controller of the software to enhance the efficiency, reliability, maintainability, and scalability of application software.

A Design Model for Educational Multimedia Software

The design and implementation of educational software call into play two well established domains: software engineering and education. Both fields attain concrete results and are capable of making predictions in the respective spheres of action. However, at the intersection, the reports about the development of computer games and other educational software reiterate similar difficulties and an embarrassing degree of empiricism. This study aims to bring a contribution, presenting a model for the conception of educational multimedia software by multidisciplinary teams. It joins three elements: Ausubel’s theory of meaningful learning; the theory of multimedia from Mayer; and the study of software ergonomics. The structure proposed here emerged from a theoretical study with the concurrent development of software. Observations gathered in a small scale test confirmed the expected design issues and the support provided by the model. Limitations and possible directions of study are discussed.

Design Reusability and Adaptability for Concurrent Software

Developing reusable and adaptable concurrent software are very difficult. Reusability and adaptability in concurrent software become minimal. These collaborations not only perimeter reusability, but also make modification invasive changes to meet new requirements in the design of the concurrent software. The concurrent system has to reengineer, in order to meet the future requirements. A misunderstanding, that a concurrent object-oriented programming generally endorses reusability and adaptability, as none of these problems is imposed. Software developers have to specifically deliberate software making reusability and adaptability. We present a concurrent aspect framework which better supporting reusability and adaptability. In the framework, functional components and system assets are relatively separated. This technique makes concurrent software developing better reusability and adaptability. A framework enables manageable reusability and adaptability for building of concurrent software. Our research focuses on decomposition of contact in concurrent software development and our goal is to demonstrate a better model of concurrent software design.

Dynamics of concurrent software development

AbstractIn a concurrent development process different releases of a software product overlap. Organizations involved in concurrent software development not only experience the dynamics common to single projects, but also face interactions between different releases of their product: they share resources among different stages of different projects, including customer support, they have a common code base and architecture that carries problems across releases, they use the same capabilities, and their market success in early releases impacts their resources in later ones. Drawing on two case studies we discuss some of the feedback processes central to concurrent software development and build a simple simulation model to analyze the resulting dynamics. This model sheds light on tipping dynamics, the nature of inter‐project feedback loops, and alternative resource allocation policies relevant to management of concurrent software development. Copyright © 2009 John Wiley & Sons, Ltd.

Verifying correct usage of atomic blocks and typestate

The atomic block, a synchronization primitive provided to programmers in transactional memory systems, has the potential to greatly ease the development of concurrent software. However, atomic blocks can still be used incorrectly, and race conditions can still occur at the level of application logic. In this paper, we present a intraprocedural static analysis, formalized as a type system and proven sound, that helps programmers use atomic blocks correctly. Using access permissions , which describe how objects are aliased and modified, our system statically prevents race conditions and enforces typestate properties in concurrent programs. We have implemented a prototype static analysis for the Java language based on our system and have used it to verify several realistic examples.

Concurrent software development

article Free Access Share on Concurrent software development Authors: Joseph Blackburn Management at the Owen Graduate School of Management, Vanderbilt University, TN Management at the Owen Graduate School of Management, Vanderbilt University, TNView Profile , Gary Scudder Management at the Owen Graduate School of Management, Vanderbilt University, TN Management at the Owen Graduate School of Management, Vanderbilt University, TNView Profile , Luk N. Van Wassenhove Management Department at INSEAD, Fontainebleau, France Management Department at INSEAD, Fontainebleau, FranceView Profile Authors Info & Claims Communications of the ACMVolume 43Issue 11esNov. 2000 pp 4–eshttps://doi.org/10.1145/352515.352519Online:01 November 2000Publication History 17citation1,878DownloadsMetricsTotal Citations17Total Downloads1,878Last 12 Months20Last 6 weeks7 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF

Codesign [hardware/software partitioning

Hardware/software design is also known as the codesign methodology. This type of design raises some interesting problems since it deals with concurrent hardware and software development. The main issue is implementing a system with a minimal amount of application specific hardware communicating with a standard processor. The paper considers how codesign raises a lot of problems, such as specification, system modeling, partitioning mechanisms, software and hardware implementation and interfaces.

Concurrent software engineering: prospects and pitfalls

Software development remains largely a sequential, time-consuming process. Concurrent engineering (CE) principles have been more widely adopted and with greater success in hardware development. In this paper, a methodology for marrying CE principles to software engineering, or concurrent software engineering (CSE), is proposed. CSE is defined as a management technique to reduce the time-to-market in product development through simultaneous performance of activities and processing of information. A hierarchy of concurrent software development activity is defined, ranging from the simplest (within stage) to the most complex (across products and platforms). The information support activities to support this activity hierarchy are also defined, along with two key linking concepts-synchronicity and architectural modularity. Principles of CSE are developed for each level in the activity hierarchy. Research findings that establish limitations to implementing CE are also discussed.

A knowledge-based approach for the development of concurrent software

The paper presents a knowledge-based approach for the partitioning and allocation of concurrent software to MIMD machines. A set of heuristics guide the partitioning and allocation process. Heuristics capture the expertise of human programmers and a reasoning engine applies them in order to derive from sequential OCCAM source code appropriate transputer architectures and allocate and partition processes and data.