Concurrent Dual-band Low-noise Amplifier Research Articles

A High Gain Concurrent Dual-band Low-Noise Amplifier in 130-nm BiCMOS Technology

This paper presents a fully integrated concurrent 15/30-GHz dual-band low-noise amplifier (LNA). The proposed concurrent LNA IC is designed and simulated in 130-nm BiCMOS technology. The new passive LC notch filter is proposed to realize high gain and low noise figure over dual-band frequency, simultaneously. The simulated BiCMOS LNA IC has exhibited peak gains of 30.1/23.7 dB at 15/30-GHz, respectively, with 20-mW power consumption from 1-V supply. The concurrent dual-band LNA achieves noise figure of 2.2/2.9-dB and IIP3 of -18.2/-8.8 dBm at the respective passbands. Therefore, the proposed dual band concurrent LNA IC is applicable to front-end RF receivers for Ku-Band and Ka-Band systems.

A 28-/39-GHz Dual-Band CMOS LNA With Shunt-Series Transformer Feedback

This letter presents a concurrent dual-band low-noise amplifier (LNA) operating at 28 and 39 GHz for multiband 5G wireless systems. In order to achieve a wideband input power matching, the LNA adopts a shunt-series feedback structure. Detailed noise analysis of the shunt-series transformer feedback LNA is proposed to guide the noise-optimized design, and a modified input network is proposed to improve the noise matching. The modified method also enhances the transconductance of the input stage, thus suppressing the noise of the subsequent circuit and obtaining a better overall noise figure (NF). Based on this input structure, a dual-band LNA with excellent NF is designed in a 65-nm complimentary metal–oxide–semiconductor (CMOS) process. This dual-band LNA achieves 18.1/18.4-dB gain and 3.1/3.8-dB NF at 28/39 GHz, consuming 10.2 mW from a 1.0-V power supply.

A concurrent dual-band low noise amplifier with gain enhancement topology for 2.4/5.2 GHz applications

本文提出了一种工作在2.4 / 5.2GHz的双频谱低噪声放大器（LNA），用于无线链接（WLAN）应用。 刚刚采用了一个具有L转换的小型电容器来实现增益增强。 同时，使用LC并行仿真 结果表明，LNA的增益（S21）为17.1dB和8.5dB，在2.4GHz和5.2GHz时的噪声系数分别为3.6dB和3.3dB，而输入回波损耗（S11）则为-15.6dB和-13.8dB。可以研磨，在两个工作频率下的输出回波损耗（S22）分别为-11.7dB和-20.7dB，在上述两个宽带中，工作电压为1.2V的电路绝对稳定。

Design and analysis of a 1.1 and 2.4 GHz concurrent dual-band low noise amplifier for multiband radios

This paper presents the design and implementation of a dual-band low noise amplifier (DBLNA) operating at 1.1 GHz and 2.4 GHz. The DBLNA employs a second-order dual-band matching network, which is designed using the proposed impedance and frequency transformation technique. The DBLNA has two stages in cascade topology for its high output impedance and high voltage gain. Modified output load is designed to optimize interference rejection. The implemented circuit is fabricated as a microwave integrated circuit (MIC) on the FR-4 substrate. The designed DBLNA achieves a very high measured voltage gain of 24.4 dB and 20.1 dB at 1.1 GHz and 2.4 GHz, respectively. The measured NF of the DBLNA is 2.6 dB and 3 dB at 1.1 GHz and 2.4 GHz, respectively. The interference rejection between passbands at 1.6 GHz is 53.2 dB and stopband rejection ratio is 40.4 dB. The LNA consumes 108 mW from a 3 V supply. The measured P1dB performance is −10 dBm and −5.1 dBm at 1.1 GHz and 2.4 GHz, respectively.

Concurrent Dual-Band Inverter-Based Low Noise Amplifier (LNA) for WLAN Applications

low noise amplifier (LNA); concurrent; dual-band; inverter-basedIn this paper, a two-stage concurrent dual-band low noise amplifier (DB-LNA) operating at 2.4/5.2-GHz is presented for Wireless Local Area Network (WLAN) applications. The current-reused structure using resistive shunt-shunt feedback is employed to reduce power dissipation and achieve a wide frequency band from DC to-5.5-GHz in the inverter-based LNA. The second inverter-based stage is employed to increase the gain and obtain a flat gain over the frequency band. An LC network is also inserted at the proposed circuit output to shape the dual-band frequency response. The proposed concurrent DB-LNA is designed by RF-TSMC 0.18-µm CMOS technology, which consumes 10.8 mW from a power supply of 1.5 V. The simulation results show that the proposed DB-LNA achieves a direct power gain (S 21 ) of 13.7/14.1 dB, a noise figure (NF) of 4.2/4.6 dB, and an input return loss (S 11 ) of −12.9/−14.6 dBm at the 2.4/5.2-GHz bands.

A 2.4/5.2-GHz Concurrent Dual-Band CMOS Low Noise Amplifier

A concurrent dual-band low-noise amplifier (LNA) targeted for W-LAN IEEE 802.11 a/b/g standards is designed using 0.13- $\mu \text{m}$ CMOS process. To attain the power-constrained simultaneous noise and input matching at 2.4 and 5.2 GHz, cascode common source inductive degeneration topology is adopted. The LNA achieves input reflection coefficients of −16.8 and −19.4 dB, forward gains of 19.3 and 17.5 dB at 2.4 and 5.2 GHz, respectively. Furthermore, the LNA exhibits noise figures of 3.2 and 3.3 dB with input 1-dB compression points of −29.6 and −28.2 dBm, while third-order input intercept points of −20.1 and −18.1 dBm at 2.4 and 5.2 GHz, respectively. The LNA dissipates 2.4 mW of power from a 1.2-V supply.

A Concurrent Dual-Band Low Noise Amplifier for GNSS Receivers

A Concurrent Dual-Band Low Noise Amplifier for GNSS Receivers

Analysis of ground layout effect in CMOS concurrent dual-band LNA

Ground planes are often used on the integrated circuits.An improperly designed ground plane can be a major source of noise and attenuation to affect the circuit performances. Using a full-wave simulator HFSS, this article analyzes a ground plane effect in layout of a CMOS concurrent dual-band low-noise amplifier (LNA). The concurrent dual-band LNA that operates at 2.4 and 5.2 GHz is fabricated using 180-nm CMOS technology. Comparing with the circuit simulation result, the measured result shows a 7-dB gain reduction at 5.2 GHz. In an attempt to find the cause and solve the problem, a full-wave simulation that can analyze the layout effects is carried out. On the basis of the full-wave analysis, we determine that the ground plane potentially produces a parasitic inductive component which deteriorates the gain performance at the higher operating frequency band. A modified ground plane layout for reducing the parasitic inductance is proposed, and the LNA achieves the improved gain and noise performances similar to the circuit simulation. © 2011 Wiley Periodicals, Inc. Microwave Opt Technol Lett, 2011; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.26062

Fully integrated concurrent dual-band low noise amplifier with suspended inductors in SiGe 0.35 [micro sign]m BiCMOS technology

A fully integrated concurrent dual-band low noise amplifier with suspended inductors is reported. Wideband input impedance matching and wideband low noise characteristics are achieved by the proposed capacitive feedback technique simultaneously. Measurement results show input return losses of −12.8 and −11.5 dB, voltage gains of 14.4 and 14.3 dB, and noise figures of 2.5 and 3.0 measured at 2.3 and 4.5 GHz, respectively, with an image rejection ratio of 26.1 dB and power consumption of 11.9 mW.

A Low-Power Dual-Band Triple-Mode WLAN CMOS Transceiver

This paper describes a 0.18-mum CMOS direct-conversion dual-band triple-mode wireless LAN transceiver. The transceiver has a concurrent dual-band low-noise amplifier for low power consumption with a low noise figure, a single widely tunable low-pass filter based on a triode-biased MOSFET transconductor for multi-mode operation with low power consumption, a DC-offset compensation circuit with an adaptive activating feedback loop to achieve a fast response time with low power consumption, and a SigmaDelta-based low-phase-noise fractional-N frequency synthesizer with a switched-resonator voltage controlled oscillator to cover the entire frequency range for the IEEE WLAN standards. The transceiver covers both 2.4-2.5 and 4.9-5.95 GHz and has extremely low power consumption (78 mA in receive mode, 76 mA in transmit mode-both at 2.4/5.2 GHz). A system noise figure of 3.5/4.2 dB, a sensitivity of -93/-94 dBm for a 6-Mb/s OFDM signal, and an error vector magnitude of 3.2/3.4% were obtained at 2.4/5.2 GHz, respectively

Analysis and design of a fully integrated CMOS low-noise amplifier for concurrent dual-band receivers

This article thoroughly analyzes a concurrent dual-band low-noise amplifier (LNA) and carefully examines the effects of both active and passive elements on the performance of the dual-band LNA. As an example of the analysis, a fully integrated dual-band LNA is designed in a standard 0.18-μm 6M1P CMOS technology from the system viewpoint for the first time to provide a higher gain at the high band in order to compensate the high-band signal's extra loss over the air transmission. The LNA drains 6.21 mA of current from a 1.5-V supply voltage and achieves voltage gains of 14 and 22 dB, input S11 of 15 and 18 dB, and noise figures of 2.45 and 2.51 dB at 2.4 and 5.2 GHz, respectively. © 2006 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2006.

A monolithic 1.57/5.25‐GHz concurrent dual‐band low‐noise amplifier using InGaP/GaAs HBT technology

AbstractA monolithic concurrent dual‐band low‐noise amplifier (LNA) using InGaP/GaAs HBT technology is demonstrated for the first time. The LNA provides narrowband gain and matching simultaneously at both 1.57‐GHz (GPS) and 5.25‐GHz (ISM) bands. It consumes only 15‐mW power and achieves transducer gains (S21) of 25.3 and 14.3 dB, input return losses (S11) of 6.8 and 11.5 dB, reverse isolation (S12) of −30.8 and −32.2 dB, and noise figures of 2.55 and 4.5 dB at these two bands, respectively. The performance at 5.25 GHz is comparable with the 2.45/5.25‐GHz concurrent dual‐band CMOS LNA with a bonding wire as the gate inductor using 0.35‐m CMOS technology 1. © 2004 Wiley Periodicals, Inc. Microwave Opt Technol Lett 42: 58–60, 2004; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.20206

A fully integrated concurrent dual‐band CMOS low‐noise amplifier

AbstractThis paper presents a fully integrated concurrent dual‐band CMOS low‐noise amplifier (LNA). The LNA is implemented in a standard 0.18‐μm 6M1P CMOS process and is designed from the system viewpoint to provide higher gain at the higher band, for the first time, to compensate the higher‐band signal's extra loss over the air transmission. The LNA drains 5.3 mA of current from a 1.8‐V supply voltage and achieves voltage gains of 16 and 22.5 dB, input return losses of 28 and 27 dB, and noise figures of 3.0 and 3.1 dB at 2.4 and 5.2 GHz, respectively. © 2003 Wiley Periodicals, Inc. Microwave Opt Technol Lett 39: 52–53, 2003; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.11124