Concurrent Dual-band Digital Predistortion Research Articles

Vector-switched digital predistortion for concurrent dual-band transmitters with hybrid time-division multiplexing scheme

In a concurrent dual-band digital predistortion (DPD) system, due to the large number of two-dimensional (2D) polynomial-based model coefficients and the existence of cross-modulation terms, the hardware realization usually requires a lot of resources. To alleviate this problem, this paper proposes a hardware-efficient field programmable gate array (FPGA)-based piecewise vector-switched (PVS) DPD method. With the PVS method, a 2D memory polynomial (MP) model with fewer coefficients can be used as a sub predistorter model for each region. Furthermore, a new hybrid time-division multiplexing (HTDM) scheme is proposed for the 2D-MP predistorter architecture, which enables sharing of cross-modulated lookup tables (LUTs) and complex multipliers in a hybrid way. Experimental results show that the proposed method improves the adjacent channel power ratio (ACPR) and normalized mean square error (NMSE) by 18.74 dB and 13.23 dB, respectively, and saves about 30% and 80% of RAM and DSP resources, respectively.

2-D orthogonal polynomial model for concurrent dual-band digital predistortion based on complex Gaussian assumption

Two-dimensional (2-D) polynomial models are widely used in digital predistortion (DPD) design for dual-band power amplifier (PA) linearization. However, the conventional polynomial model exhibits numerical instabilities when high-order nonlinearities are included. To solve this problem, a closed-form 2-D orthogonal polynomial DPD model is deduced under the assumption of complex Gaussian processes. Compared with the Legendre orthogonal polynomial for uniform distribution, the complex Gaussian assumption is more coincident with practical communication signals. Cutting down the condition number of the input correlation matrix is the most important objective to deduce the new model, and the experiment results show that the condition number of the new model can be significantly decreased both for the Gaussian signal and the practical OFDM signal. The predistortion performance of the OFDM signal is also investigated. In the presence of 32-bit floating point single precision processing, the proposed model is more stable in the least squares (LS) parameter estimation and yield better adjacent channel power ratio (ACPR) and normalized mean square error (NMSE) improvement when compared with the conventional model and the Legendre model. At the same time, the proposed model has fewer polynomial coefficients compared with the Legendre model and accordingly reduce the complexity of coefficient estimation.

Concurrent Dual-Band Digital Predistortion Using 2-D Lookup Tables With Bilinear Interpolation and Extrapolation: Direct Least Squares Coefficient Adaptation

In this paper, we present a method to implement concurrent dual-band digital predistortion (DPD) models using 2-D lookup tables (LUTs) with bilinear interpolation and extrapolation. We introduce the required set of basis functions to describe this model. The DPD output is expressed as a linear combination of these basis functions and we show how to directly estimate the coefficients using least squares. We introduce a flexible 2-D bilinear extrapolation scheme that is ideally suited to dual-band signals with high peak-to-average power ratio. We show how these are needed when digital predistortion is implemented in conjunction with automatic gain control. We also introduce example dual-band polynomial models with memory and show how to create a similar memory model based on 2-D lookup tables with bilinear interpolation. One such model is the dual-band generalized memory polynomial model. Laboratory experiments are performed using such a 2-D LUT with bilinear interpolation model.

RF Subsampling Feedback Loop Technique for Concurrent Dual-Band PA Linearization

This paper investigates feedback loops using radio-frequency (RF) subsampling analog-to-digital converters as a way to improve the concurrent dual-band transmitters linearization. The feedback loop will be characterized and postcompensated in the digital domain, followed by a new technique for a concurrent dual-band digital predistortion (DPD) scenario where aliasing between both the carriers is allowed to occur. The proposed technique is based on statistical approximated nonoverlapped multisines that permit relaxing the feedback loop requirements. The measurement results in a 2-D-DPD scenario are presented and compared with other state-of-the-art techniques. Metrics such as adjacent channel power ratio and error vector magnitude are evaluated in order to corroborate the correct functioning of the proposed technique.

Concurrent Dual-Band Digital Predistortion With a Single Feedback Loop

This paper proposes a compact and low-cost architecture with only a single feedback loop to implement concurrent dual-band digital predistortion (DPD) of power amplifiers (PAs). This technique is based on a new approach, down-converted carrier co-location $({\rm DC}^{3})$ , in conjunction with a 2-D carrier co-located memory polynomial model in PA forward modeling. The concurrent dual-band DPD models for each band can then be extracted successfully according to the forward modeling results. Experimental tests have been performed for a commercial Mini Circuits amplifier and a 120-W peak power GaN base-station PA. Different signal combinations have been tested for both balanced and unbalanced output power operations in the dual bands. The results validate that the proposed method is able to achieve linearization performances comparable to those of the conventional two parallel feedback loops based technique. Even when a nonideal feedback loop with nonflat frequency responses in the two bands is used, the new method performs well when the feedback loop is calibrated in advance. This single feedback loop based concurrent dual-band DPD architecture is a strong candidate for future broadband dual-band transmitting systems.

FPGA Implementation of Orthogonal 2D Digital Predistortion System for Concurrent Dual-Band Power Amplifiers Based on Time-Division Multiplexing

A concurrent dual-band digital predistortion (DPD) system is presented to compensate for the nonlinearity of the radio-frequency power amplifiers (PAs) driven by a concurrent dual-band signal. Recently, a closed-form orthogonal polynomial basis has been introduced showing stability improvement compared with the conventional polynomial. An experimental test bed employing a field-programmable gate array (FPGA) linked to two mixed-signal system boards has also been presented. Based on the FPGA, this paper focuses on the hardware implementation of the new concurrent dual-band orthogonal DPD forward path using time-division multiplexing. Performances are evaluated with an experimental test setup cascading 1-10 W peak PAs and a dual-band signal center frequency spaced by 310 MHz. The lower side band (LSB) and upper side band (USB) are centered at 1890 and at 2200 MHz, respectively. Two signal scenarios are presented combining alternatively 1-carrier wide-band code-division multiple access (WCDMA) and 10-MHz long-term evolution (LTE) signals to a 5-carrier WCDMA signal. Experimental results show that the proposed time-division-multiplexing implementation approach gives similar performance compared with the software implementation with half of the resources. Adjacent channel power ratios (ACPRs) are reduced below -50 dBc and normalized mean-square error (NMSE) close to -40 dB.

A Generalized 2-D Linearity Enhancement Architecture for Concurrent Dual-Band Wireless Transmitters

A novel generalized two dimensional (2-D) digital predistortion (DPD) architecture for concurrent dual-band transmitters is presented. The proposed architecture is based on simultaneous injection of in-band intermodulation (IM) and cross-modulation (CM) distortion products. A general fundamental-frequency model for concurrent dual-band transmitter is developed theoretically and proofed experimentally. An individual impact of each IM and CM distortion component is theoretically derived and analyzed. It is clearly proven by theoretical analysis and experiments that the proposed predistorter improves the in-band and out-of-band performances of both signals. The simulation and experimental studies are performed using various signal sets. The proposed predistorter does not depend on frequency separation between bands and has low computational complexity in comparison with concurrent dual-band DPD's state-of-the-art. In addition, it is clearly shown in experiments that when using iterative simultaneous injections, a phenomenon known as distortion compensation limit can be reduced. A presence of memory effects and their mitigation in frequency domain for each band of concurrent dual-band transmitter are also demonstrated in experiments.

Dynamic deviation reduction-based concurrent dual-band digital predistortion

This article introduces the concurrent dual-band digital predistortion DPD architecture with only one upconvertion unit, which is suitable for the linearization of wideband power amplifiers PAs excited by concurrent dual-band signals. By extending the conventional dynamic deviation reduction DDR model to the concurrent dual-band mode, we propose two DDR-based concurrent dual-band models, the dual-band DDR DB-DDR model and the simplified dual-band DDR SDB-DDR model. The performance of these two models is experimentally assessed with two types of wideband PAs a GaN Class F PA and a GaN Doherty PA driven by the concurrent dual-band signal, and compared with the prior two-dimensional digital predistortion 2D-DPD model and the two-dimensional modified memory polynomial 2D-MMP model. The results prove the good DPD performance and low computational complexity of the proposed models. © 2013 Wiley Periodicals, Inc. Int J RF and Microwave CAE 24:401-411, 2014.