Computational Power Consumption Research Articles

Image Restoration in Portable Devices: Algorithms and Optimization

Image and video data acquired by portable devices such as mobile phones are degraded by noise and blur due to the small size of optical sensors in these devices. A wide range of image restoration methods exists, yet feasibility of these methods in portable platforms is not guaranteed due to limited hardware resources on such platforms. The paper addresses this problem by focusing on denoising algorithms. We have chosen two representatives of denoising methods with state-of-the-art performance, and propose different parallel implementations and algorithmic simplifications suitable for mobile phones. In addition, an extension to resolution enhancement is presented including both visual and quantitative comparisons. Analysis of the algorithms is carried out with respect to the computation time, power consumption and output image quality.

Optical Versus Electronic Implementation of Probabilistic Graphical Inference and Experimental Device Demonstration Using Nonlinear Photonics

The probabilistic inference model has been widely used in various areas, such as error-control coding, machine learning, speech recognition, artificial intelligence, and statistics. In this paper, we study both computation and communications power consumption of optical-based and electronic-based implementations of the probabilistic inference algorithm used in solving large scale problems. Our analysis indicates that the optical implementation provides substantial reduction for power and area compare to the electronic-based solutions as problems become large. For a network with 1 million nodes and 100 alphabet size, our proposed wavelength multiplexed all-optical implementation requires approximately 200 kilowatts (kW) of power as compared with 1.47 gigawatts (GW) and 1.7 megawatts (MW) using CPU-based and subthreshold VLSI-based systems, respectively. The optical-based solution is tolerant to shot noise and imperfections of optical modules used in the architecture as well. We also performed an all-optical experimental verification of a graphical inference as the proof of concept and have demonstrated the essential mathematical operations, multiplication, and normalization (division), in photonics operations using nonlinear bulk materials. The normalization and multiplication are shown optically through a pump-probe saturation process and a logarithm-summation-exponential (log-sum-exp) operation, respectively. We used single mode silicon waveguide and single-wall carbon nanotube (SWCNT) as nonlinear optical materials to implement logarithm and exponential operations, respectively. The SWCNT is also used as the nonlinear component in the pump-probe saturation experiment to implement the normalization function.

Web Load Balancing Based on DNS Coordination and Reducing Energy Consumption Strategy

With the massive application of Web services and streaming media, Web cluster deployment in a single physical area can no longer meet the network requirements. Currently, with a range of WAN Web cluster deployment, the delegation points can access the nearest Web cluster and reduce the average distance of data flow, thus reducing network latency. Therefore, it is particularly important for cluster load balancing to quickly obtain access node information and redirect Web clusters that need to be accessed by the nodes. At the same time, the power consumption of computers and the power consumption of multi-area deployment of Web clusters are huge, and more computer resources are wasted in the low-access period, so it is also essential to reduce the power consumption of the entire load balancing. In order to solve the above two problems, this paper proposes a web load balancing method which can reduce the energy consumption of the cluster and DNS collaboration. It provides information for accessing the nodes to the load balancing and uses the cosine distance to quickly locate the web clusters that the nodes need to access. Meanwhile, Cluster energy consumption strategy to reduce the energy consumption of the entire cluster.

Design and Digital Implementation of Fast and Recursive DCT II–IV Algorithms

Using the proposed factorizations of discrete cosine transform (DCT) matrices, fast and recursive algorithms are stated. In this paper, signal flow graphs for the n-point DCT II and DCT IV algorithms are introduced. The proposed algorithms yield exactly the same results as with standard DCT algorithms but are faster. The arithmetic complexity and stability of the algorithms are explored, and improvements of these algorithms are compared with previously existing fast and stable DCT algorithms. A parallel hardware computing architecture for the DCT II algorithm is proposed. The computing architecture is first designed, simulated, and prototyped using a 40-nm Xilinx Virtex-6 FPGA and thereafter mapped to custom integrated circuit technology using 0.18- $$\upmu $$ m CMOS standard cells from Austria Micro Systems. The performance trade-off exists between computational precision, chip area, clock speed, and power consumption. This trade-off is explored in both FPGA and custom CMOS implementation spaces. An example FPGA implementation operates at clock frequencies in excess of 230 MHz for several values of system word size leading to real-time throughput levels better than 230 million 16-point DCTs per second. Custom CMOS-based results are subject to synthesis and place-and-route steps of the design flow. Physical silicon fabrication was not conducted due to prohibitive cost.

A rapid local backlight dimming method for interlaced scanning video

AbstractThis paper presents a rapid local backlight dimming method for interlaced video to improve the efficiency of displaying interlaced video. In the proposed method, we combine the line average deinterlacing algorithm with the local backlight dimming algorithm. In order to reduce the computational complexity and the backlight power consumption, three novel methods are proposed. The first is to add the sparse method to process the deinterlaced image. Second, the improved dynamic threshold method is used to calculate the dimming factor. And third, the odd field and even field of the same frame use the same backlight brightness to do backlight dimming. The simulation results show that the proposed method can reduce the computational complexity and power consumption, and the experiment results verify that the method can provide high display effect.

On-chip implementation of a low-latency bit-accurate reciprocal square root unit

Many applications such as gaming, digital signal processing and communications systems, require computation of the reciprocal square root operation (RSR). Although several architectures have been reported for computing the RSR operation, these are mainly focused on accelerating high-precision floating-point units. In mobile-device implementations, fixed-point (FxP) units are preferred due to their low computational cost and power consumption. This article presents an on-chip implementation of a bit-accurate, FxP-RSR unit using a 130 nm CMOS process. The proposed architecture is based on a piecewise-polynomial approximation in a reduced range of the RSR function and the Newton-Raphson method. Experimental results show that the manufactured chip exhibits lower latency and less power consumption than existing standard-cell-based implementations. These characteristics make the proposed chip a useful silicon intellectual property suitable for embedded applications where low power, low latency, and low hardware cost is required.

Effect of buoyancy on dynamical responses of coflow diffusion flame under low-frequency alternating current

ABSTRACTThe dynamical responses of a small coflow diffusion flame to low-frequency alternating current (AC) were investigated under voltages (Vac) and frequencies (fac) in the range of 0–5 kV and of 0–200 Hz, respectively. As high voltages were applied to the fuel nozzle, a frequency-multiplication mode was identified from the flame oscillations at fac < 8 Hz using high-speed imaging. This mode was characterized by bulk flame oscillations at multiples of fac until fac = 12 Hz, close to the frequency of the natural buoyancy-driven oscillation with the burner configuration used in this study. As fac increased past 12 Hz, the bulk flame oscillated at fac, resulting in a ‘lock-in’ mode. The results of experiments using a counterflow diffusion flame configuration with negligible buoyancy confirmed that it was the coupling between buoyancy-driven flows and AC-driven ionic winds that caused the frequency-multiplication phenomenon. For fac > 32 Hz, the bulk flame ceased to oscillate, and a spectral analysis found that ionic winds dominated the dynamic flame responses. The distinctions between AC forcing and acoustic forcing were highlighted. Particle image velocimetry (PIV) experiments at a kHz repetition rate were conducted to reveal the time-resolved flow fields. Electrical diagnostics captured the electrical signals; the calculated power consumption of the applied AC, with respect to the flame-heating power, was about 10–6.

Power Consumption and Calculation Requirement Analysis of AES for WSN IoT.

Because of the ubiquity of Internet of Things (IoT) devices, the power consumption and security of IoT systems have become very important issues. Advanced Encryption Standard (AES) is a block cipher algorithm is commonly used in IoT devices. In this paper, the power consumption and cryptographic calculation requirement for different payload lengths and AES encryption types are analyzed. These types include software-based AES-CB, hardware-based AES-ECB (Electronic Codebook Mode), and hardware-based AES-CCM (Counter with CBC-MAC Mode). The calculation requirement and power consumption for these AES encryption types are measured on the Texas Instruments LAUNCHXL-CC1310 platform. The experimental results show that the hardware-based AES performs better than the software-based AES in terms of power consumption and calculation cycle requirements. In addition, in terms of AES mode selection, the AES-CCM-MIC64 mode may be a better choice if the IoT device is considering security, encryption calculation requirement, and low power consumption at the same time. However, if the IoT device is pursuing lower power and the payload length is generally less than 16 bytes, then AES-ECB could be considered.

Performance analysis on DPSK modulation using symbol repetition and interleaving

SummaryIt is well known that the differential phase shift keying (DPSK) transmission does not require a reference phase and reduces the computational complexity and power consumption of the receiver at the cost of the transmission reliability. To improve the reliability of transmission under such scenario, we use a symbol repetition scheme to the DPSK modulation, such as the IEEE 802.15.6 wireless body area network and the ITU‐T G.9903. However, the message symbol repetition with interleaving in conventional manner as in coherent modulation schemes may degrade the receiver performance because of the noise characteristic of the differential demodulation structure. In this work, we analyze the performance of repeated DPSK system with and without the interleaver and demonstrate which scenario is suitable for each modulation order. We propose a proper transmission setting, which achieves noticeable performance improvement at the receiver as well as enhances the energy efficiency of the communication system. Since it can be implemented with very small modification to existing systems, our results are highly applicable with negligible modification of the hardware structure and thus enable substantially low‐cost implementation in future communication systems including wireless body area network internet of things applications.

VIRTUAL PCA LINE CONSTRUCTED FOR SIMULATION OF TIME SERIES CHANGES OF POWER CONSUMPTION CONSIDERING THE EFFECT OF PRODUCT FLOW

The Digital Eco-Factory proposed by the authors evaluates the production conditions including environmental indicators from an equipment and product view by executing a simulation using a virtual production line. In this paper, the Digital Eco-Factory for PCA (Printed Circuit Assembly) is discussed. The virtual PCA line is constructed by multi equipment agents which are generated based on equipment models. Production conditions are evaluated about power consumption of entire line from the product viewpoint. The equipment models include behaviour descriptions as states and their transitions. Each state is embedded with equations for calculating power consumption. The equipment agent includes communication functions with a PCB agent for controlling of product flow to manage the timing of the input of the product to each equipment on the virtual line. Experimental executions of a simulation using the constructed virtual PCA line show the effect of product flow.

Flexible feature-space-construction architecture and its VLSI implementation for multi-scale object detection

Feature extraction techniques are a cornerstone of object detection in computer-vision-based applications. The detection performance of vison-based detection systems is often degraded by, e.g., changes in the illumination intensity of the light source, foreground-background contrast variations or automatic gain control from the camera. In order to avoid such degradation effects, we present a block-based L1-norm-circuit architecture which is configurable for different image-cell sizes, cell-based feature descriptors and image resolutions according to customization parameters from the circuit input. The incorporated flexibility in both the image resolution and the cell size for multi-scale image pyramids leads to lower computational complexity and power consumption. Additionally, an object-detection prototype for performance evaluation in 65 nm CMOS implements the proposed L1-norm circuit together with a histogram of oriented gradients (HOG) descriptor and a support vector machine (SVM) classifier. The proposed parallel architecture with high hardware efficiency enables real-time processing, high detection robustness, small chip-core area as well as low power consumption for multi-scale object detection.

Methodology for calculating power consumption of planetary mixers

The paper presents the methodology and equations for calculating the power consumption necessary to overcome the resistance of a dry mixture caused by the movement of cylindrical rods in the body of a planetary mixer, as well as the calculation of the power consumed by idling mixers of this type. The equations take into account the size and physico-mechanical properties of mixing material, the size and shape of the mixer's working elements and the kinematics of its movement. The dependence of the power consumption on the angle of rotation in the plane perpendicular to the axis of rotation of the working member is presented.

Performance evaluation of Grain family and Espresso ciphers for applications on resource constrained devices

Abstract A secure stream cipher is an effective security solution for applications running on resource-constrained devices. The Grain family of stream ciphers (Grain v1, Grain-128, and Grain-128a) is a family of stream ciphers designed for low-end devices. Similarly, Espresso is a lightweight stream cipher that was developed recently for 5G wireless mobile communication. The randomness of the keystream produced by a stream cipher is a good indicator of its security strength. In this study, we have analyzed the randomness properties of the keystreams produced by both the Grain Family and Espresso ciphers using the statistical packages DieHarder and NIST STS. We also analyzed their performances in two constrained devices (ATmega328P and ESP8266) based on three attainable parameters, namely computation time, memory, and power consumption.

Optimal HEVC Configuration for Wireless Video Communication Under Energy Constraints

High Efficiency Video Coding (HEVC) provides a doubling in coding efficiency compared with the H.264/AVC at the expense of increased computational complexity. However, mobile devices that perform video encoding and communication over wireless networks have limited energy supply. A video encoding system which has the ability to adjust its computational complexity and power consumption could be used to prolong the lifetime of these devices. In this paper, we develop a framework, which selects the optimal HEVC encoding configuration in order to optimize the performance of the wireless video communication system under energy constraints. More specifically, in this paper, we develop an analytic HEVC encoder behavior model based on the extensive analysis of key HEVC encoding tools. We use the developed model for the performance optimization of the HEVC encoder under energy constraints. We propose an adaptive algorithm to estimate the HEVC encoder model parameters and perform online encoder coding configuration optimization. We show that using the proposed framework, the video encoder is able to select appropriate coding tools to automatically adjust its coding efficiency and complexity to match the available power budget with the maximum possible video quality. The proposed HEVC encoder model provides a guideline for optimized tool selection in the energy constrained wireless video communication.

Micro Hand Gesture Recognition System Using Ultrasonic Active Sensing

In this paper, we propose a micro hand gesture recognition system and methods using ultrasonic active sensing. This system uses micro dynamic hand gestures for recognition to achieve human-computer interaction (HCI). The implemented system, called hand-ultrasonic gesture (HUG), consists of ultrasonic active sensing, pulsed radar signal processing, and time-sequence pattern recognition by machine learning. We adopt lower frequency (300 kHz) ultrasonic active sensing to obtain high resolution range-Doppler image features. Using high quality sequential range-Doppler features, we propose a state-transition-based hidden Markov model for gesture recognition. This method achieves a recognition accuracy of nearly 90\% by using symbolized range-Doppler features and significantly reduces the computational complexity and power consumption. Furthermore, to achieve higher classification accuracy, we utilize an end-to-end neural network model and obtain a recognition accuracy of 96.32\%. In addition to offline analysis, a real-time prototype is released to verify our method's potential for application in the real world.

An adaptive task allocation technique for green cloud computing

The rapid growth of todays IT demands reflects the increased use of cloud data centers. Reducing computational power consumption in cloud data center is one of the challenging research issues in th...

Analysis of partial diffusion recursive least squares adaptation over noisy links

Partial diffusion-based recursive least squares (PDRLS) is an effective way of lowering computational load and power consumption in adaptive network implementation. In this method, every single node distributes a fraction of its intermediate vector estimate with its immediate neighbours at each iteration. In this study, the authors examine the steady-state performance of PDRLS algorithm in the presence of noisy links by means of an energy conservation argument. They consider the mean-square-deviation (MSD) as the performance metric in the steady-state and derive a theoretical expression for PDRLS algorithm with noisy links. The authors' analysis reveals that unlike the established statements on PDRLS scheme under ideal links, the trade-off between MSD performance and the number of selected entries of the intermediate estimate vectors, as a sign of communication cost, is mitigated. They further examine the convergence behaviour of the PDRLS algorithm. The obtained results show that under certain statistical assumptions for the measurement data and noise signals, under noisy links the PDRLS algorithm is stable in both mean and mean-square senses. Finally, they present some simulation results to verify the theoretical findings.

Autonomous Context-Based Service Optimization in Mobile Cloud Computing

As the concept of merging the capabilities of mobile devices and cloud computing is becoming increasingly popular, an important question arises: how to optimally schedule services/tasks between the device and the cloud. The main objective of this paper is to investigate the possibilities for using a decision module on mobile devices in order to autonomously optimize the execution of services within the framework of Mobile Cloud Computing while taking context into account. A novel model of the decision module with learning capabilities, service-oriented architecture, and service selection optimization algorithm are proposed to solve this problem. To achieve autonomous, online learning on mobile devices, we apply supervised learning. Information about the context, task description, the decision made and its results such as calculation time or power consumption are stored and form training data for a supervised learning algorithm, which updates the knowledge used by the decision module to determine the optimal place for the execution of a given type of task. To verify the solution proposed, service-oriented mobile processing systems for multimedia file conversion have been developed and series of experiments have been executed. Results show that the decision module has become more efficient in assigning the task to either the mobile device or cloud resources.

SURVEY ON CLUSTER BASED DATA AGGREGATION IN WIRELESS SENSOR NETWORK

Different data aggregation protocols are required in wireless sensor network (WSN) to reduce computational and communication power consumption of various nodes to enhance battery lifetime of the nodes. Recent advances in WSN have led to many new protocols specifically designed to conserve the energy of the nodes and increase the lifetime of the nodes. This paper presents an overview of what WSN is and why data aggregation is required and it also focuses on reducing the power consumption of WSN by using clustered based approached protocols namely LEACH by taking certain Clustering Parameters into consideration like number of nodes, overlapping, algorithm complexity.

A microfluidic concentrator for cyanobacteria harvesting

The dilute conditions under which microalgae suspensions are cultured have negatively impacted economical routes for cell harvesting using conventional approaches. A promising alternative has arisen, for which a microfluidic concentration approach has been developed for harvesting Cyanobacterium Synechocystis sp. PCC 6803. This method uses passive hydrodynamic forces that include inertial focusing and Dean flow, and has a number of advantages over existing methods for concentrating dilute suspensions of microalgae; the method is truly passive, and does not require additional reagents, or external fields or electronics. After injecting a cyanobacteria suspension into an optimized microchannel configuration at a pre-determined flow rate, intrinsic inertial forces generated from the structure and geometry of the microfluidic network move the cyanobacteria laterally toward a known equilibrium position in the channel cross-section. Once focused, the cyanobacteria stream can be readily separated from culture medium to obtain a concentrated product. The system design and materials used in the new device are chosen with an eye toward low-cost, large-scale commercial manufacture. The operating parameters for inertial focusing of the cyanobacteria suspension have been optimized to achieve high-throughput and high-efficiency harvesting. The maximum recovery efficiency achieved in a single microchannel device is 98.4±0.2% (mean±standard deviation). For those conditions, initial results yield a concentration factor of 3.28 for a single pass, which is 98.5% of the maximum possible value for the current design. In addition, the calculated power consumption is less than or equal to that of tradition harvesting methods for a wide range of concentration factors. It is anticipated that this highly parallelizable, robust harvesting approach will prove to be economically feasible for concentrating microalgae/cyanobacteria at commercial scales.