Abstract This research presents a circuit-level hybrid CMOS memristor architecture for constructing Bidirectional Associative Memory (BAM). Initially, a synaptic circuit structure was built by employing a voltage threshold memristor in a crossbar architecture. This synaptic structure is adaptable and flexible for generating a wide range of synaptic weights. It is then deployed in the BAM network to perform an associative function. To aid in better name recall, this BAM network has been trained to associate Greek and mathematical symbols with their first letters in English, and vice versa. The designed circuit was validated using MATLAB and the EDA (Electronic Design Automation) Tool: Cadence Virtuoso. The addition of noise further evaluates the performance of the BAM network. When tested with noise levels of 10%, 20%, and 30%, the input patterns were retrieved at 100% in both directions. Furthermore, the proposed synaptic circuit is validated for variations in RON, ROFF and its performance is compared with other memristor models. It is also found that the average power consumption of the proposed synaptic circuit is 1.22mW. These results, which were experimentally confirmed, demonstrate the precision and noise isolation of the proposed BAM design. With appropriate tuning of memristor, the synaptic weights can be mapped easily with the memristor conductance value. This circuit can be effectively used in the field of image processing, neural network, and neuromorphic computation, which helps to associate and restore original or damaged binary images, showing strong robustness and accuracy.
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