Computational Units Research Articles

INFORMATION AND COMMUNICATION TECHNOLOGY COORDINATORS COMPETENCY SKILLS AND CLIENTS SATISFACTION

Information and communication technology (ICT) undoubtedly changes the lives of people, especially in this time of pandemics. Almost all the communications strategies of the different agencies have adopted the technology. ICT has posed a lot of benefits from making communication faster and circulating information. ICT brings impact to the educational field through rapid development and positive changes. The Department of Education designated ICT Coordinators to oversee the duties and functions of technological assistance in the school.This study determined the Information and Communication Technology Coordinators competency skills and clients satisfaction involving a total of 297 respondents including the ICT coordinators of each school.Employing the descriptive correlational research design, this study had utilize a researcher developed questionnaire to gather the data from the ICT coordinators and teachers from the elementary schools in the Division of Biliran. The results found that the ages of the respondents have ranged from 22 to 45 years, most of them are female, married, Masters Degree holders, mostly 10 to 14 years in the service, and have attended local training and seminars. The level of competency skills of ICT coordinators in terms of computer system servicing was moderately competent, and in terms of preventive maintenance was highly competent.Therewas a high level of clients satisfaction. The sex and number of years in the service have a significant relationship to clients satisfaction, while the age, educational attainment, and training and seminars attended have no significant relationship to clients satisfaction. There was also significant relationship between the competency skills of ICT coordinators and clients satisfaction.Moreover, results also indicated that ICT coordinators have encountered problems while rendering their services to their clients such as: no available funds allocated for the maintenance of the computers due to limited allocation of Maintenance and Other Operating Expenses (MOOE) ICT Coordinators were assigned to various school activities and under regular teaching hours and some computer units were no longer functional.The school administrators shall conduct training and workshops which should focused on computer servicing to enhance the level of competency skills of ICT coordinators andfund may also be allocated for the maintenance of computer units and to upgrade the internet connectivity to improve the level of clients satisfaction.

The Lived Experiences of the Graduate School Students in using Off-Campus Internet Facilities as an Alternative Source for Research Activities: A Phenomenological Inquiry

The objective of this study was to examine and explore the lived experiences of the graduate school students who frequently used off-campus internet facilities for their research activities. It utilized the qualitative method by means of phenomenological inquiry. A total of 21 participants were interviewed, ten for in-depth and eleven for focus group discussions. Use was made of research questions carefully formulated to elicit more responses from the interviewees. Both positive and negative aspects of their experiences were highlighted in this paper's findings. The accessibility to all websites, availability, longer use of the internet, and comfort in using facilities and gadgets emerged as favorable while expensive facility services; noisy, crowded and unsafe environment; unreliability of information; vulnerability of computer units to viruses that could infect flash drives; susceptibility to power interruption; and lack of privacy appeared to be their unfavorable experiences. These results implied the urgency of creating a deeper study on the lived experiences of the students to include the actual conditions of the university on-campus internet facility as a sequel to this investigation.

Energy efficient ternary computation unit using differential spin Hall effect MRAM

Recent advances in quantized neural networks (QNNs) have paved the way for energy efficient hardware architectures for machine learning tasks. Binary and ternary QNNs are suitable for image classification and recognition applications on highly resource constrained hardware. Binary neural networks have low precision thus suffer a significant accuracy loss for dense networks and large datasets. This issue can be resolved through ternary neural networks (TNNs) with higher weight precision and better resource utilization. TNN implementation using conventional complementary metal oxide semiconductor and memristive devices show limited improvement in area and energy efficiency. Spintronics based magnetic random access memory (MRAM) devices are the most prominent choice amongst the various non-volatile memories for neural networks. This work presents the implementation of differential spin Hall effect (DSHE) MRAM-based two and three input ternary computation units (TCUs) for TNN. Furthermore, a multilayer perceptron architecture with synaptic crossbar array using the proposed TCU is implemented for Modified National Institute of Standards and Technology data classification. The results show that DSHE-based TCU is 30% more energy efficient as compared with spin-transfer torque (STT)-MRAM based design. Furthermore, DSHE-MRAM based TNN shows improvement in energy and area by 82% and 9%, respectively, when compared to STT-based TNN.

Origin of the efficiency of spike timing-based neural computation for processing temporal information

Although the advantage of spike timing-based over rate-based network computation has been recognized, the underlying mechanism remains unclear. Using Tempotron and Perceptron as elementary neural models, we examined the intrinsic difference between spike timing-based and rate-based computations. For more direct comparison, we modified Tempotron computation into rate-based computation with the retention of some temporal information. Previous studies have shown that spike timing-based computation are computationally more powerful than rate-based computation in terms of the number of computational units required and the capability in classifying random patterns. Our study showed that spike timing-based and rate-based Tempotron computations provided similar capability in classifying random spike patterns, as well as in text sentiment classification and spam text detection. However, spike timing-based computation is superior in performing a task involving discriminating forward vs. reverse sequence of events, i.e., information mainly temporal in nature. Further studies revealed that this superiority required the asymmetry in the profile of the postsynaptic potential (PSP), and that temporal sequence information was converted to biased spatial distribution of synaptic weight modifications during learning. Thus, the intrinsic PSP asymmetry is a mechanistic basis for the high efficiency of spike timing-based computation for processing temporal information.

The Matrix Model of Discrete Matching Elements for HF Computational Automatic Tuning Units

The article is devoted to a new and relevant direction in the HF communication technology - the construction of high-speed computational antenna tuning units (ATU). The implementation of automatic ATU requires the designing of power circuits models adequate, as practice shows, the construction of models to physical reality in order to ensure their controllability. Practically powerful device elements are not in fact concentrated, the distributed nature of their parameters is noticeably manifested in the HF range. Matching ATU on the base of antenna input impedance measuring involves forming of accurate control commands for the elements, especially in conditions where the settings are narrow-band. A new approach to the description of a power circuit discrete elements transforming properties using the theory of linear passive four-pole and matrices, which has the ultimate accuracy, is proposed. A method to form a matrix description of on-off discrete elements of a power circuit based on the results of characteristic field measurements of the mounted device is presented. This approach made it possible to significantly reduce the amount of tabulated data describing the functional dependences of the complex coefficients of wave transmission matrices and to “smooth out” the experimental error. Complex cases are considered, which are of the greatest interest for practice - options for a four-pole cascade and parallel connection of reactive elements in the branches of the power circuit. The current state of computer technology makes it possible to sharply increase the complexity of the mathematical models used. The matrix model takes into account a significant variety of operating factors and does not require them to be “customized” to existing analytical methods. The adequacy, in this simulation, is determined by practical needs that arise in the design of power circuits of matching antenna devices and their tuning algorithms. In fact, the model is considered adequate if the errors in the calculation of the response function according to the model do not exceed the errors in its experimental determination. The proposed matrix approach made it possible to significantly improve the accuracy of modeling, while the error does not exceed 1 %. Also, this approach allows to find several options for setting a given quality and choose the best one for any parameter, while reducing the duration of the process up to 25 times. At the additional metrological advantages appeared in such devices serial production.

About one approach to increasing the security of computer systems against intrusion

The article considers an approach to increasing the security of computer systems from intrusion. The importance of the problem of information security and cybersecurity is substantiated. Strategies of attack and destructive actions used by intruders (hackers) are considered. 16 different attack and intrusion strategies are identified. The reasons for the vulnerability of computer systems are analyzed. Two groups of reasons are considered: objective reasons depending on the hardware and software components of the computer system and subjective reasons depending on the human factor. It is noted that one of the main reasons that objectively complicate the protection of a computer from intrusion is that the same computer is assigned the solution of two unrelated problems: the direct solution of tasks, which are essentially an internal problem, and the tasks of communication, which can be seen as an external problem. An approach is proposed to increase the security of computer systems from intrusion through hardware redundancy, in particular, instead of one computer, use a computer unit consisting of two computers – internal and external. The internal computer is used for the direct solution of tasks. The external computer is responsible for performing communication tasks. Additionally, the issues of physical protection of computer systems are considered.

Parallel Subdomain Synthesis of Cell Mapping for Capturing Global Invariant Sets in Higher-Dimensional Dynamical Systems

Unaffordable computational cost and memory storage induced by the curse of dimensionality has become the bottleneck of numerical methods in different fields. In the global analysis of nonlinear dynamical systems, the capability of numerical methods, like cell mapping methods, are mostly feasible only to a system dimension less than four. Although cell mappings are naturally parallelizable that may be used to greatly enhance the computational efficiency, it is still not enough to release the computational burden on a higher-dimensional system of greater than seven, not to mention the memory in dealing with millions of billion cells. In this paper, the subdomain synthesis method, which partitions the chosen region in state space into subdomains suitable for operating in a computational unit and then synthetizes the so-called virtual invariant sets to get the underlying global invariant sets, is promoted to be parallelizable on the subdomains so as to build a two-layer massively parallel architecture in both cell and subdomain levels. The proposed approach can be implemented by GPU Cluster that can maximize the powerful computation capability of hardwares. Examples with global invariant sets in very fine distances of a Jerk system and in bifurcations of a twelve-dimensional nonsmooth rotor system are presented for the first time to demonstrate then the feasibility of the proposed approach.

AIMCU-MESO: An In-Memory Computing Unit Constructed by MESO Device

Traditional CMOS-based von-Neumann computer architecture faces the issue of memory wall that the limitation of bus-bandwidth and the speed mismatch between processor and memory restrict the efficiency of data processing along with an irreducible energy consumption conducted by data movement, especially in some data-intensive applications. Recently, some novel in-memory computing (IMC) paradigms developed by utilizing the characteristics of different non-volatile memories provide promising ways to overcome the bottleneck of memory wall. Here, we propose a new IMC unit based on a memory array with the core element of magnetoelectric spin-orbit logic (MESO) device (AIMCU-MESO), in which the characteristics of the MESO device are exploited to achieve several in-memory logic operations with the functions of NAND, NOR, and XOR in the MESO-based memory array. With the aid of some transistor-based switches, these logic operations can be achieved between any two MESOs in the array. Furthermore, the computing process of a 1-bit full adder (FA) is achieved in AIMCU-MESO by the in-memory logic manner to demonstrate the ability of logic cascading. The result of SPICE simulation for achieving the 1-bit FA using MESO devices is demonstrated, and the performances are compared with other designs of spintronics-based devices. Compared to multilevel voltage-controlled spin-orbit torque–based magnetic memory, the proposed design demonstrates 71.4% and 49.2% reductions in terms of storage delay and logic delay, respectively.

Lanthanide Encoded Logically Gated Micromachine for Simultaneous Detection of Nucleic Acids and Proteins by Elemental Mass Spectrometry.

DNA-based logic computing potentially for analysis of biomarker inputs and generation of oligonucleotide signal outputs is of great interest to scientists in diverse areas. However, its practical use for sensing of multiple biomarkers is limited by the universality and robustness. Based on a proximity assay, a lanthanide encoded logically gated micromachine (LGM-Ln) was constructed in this work, which is capable of responding to multiplex inputs in biological matrices. Under the logic function controls triggered by inputs and a Boolean "AND" algorithm, it is followed by an amplified "ON" signal to indicate the analytes (inputs). In this logically gated sensing system, the whole computational process does not involve strand displacement in an intermolecular reaction, and a threshold-free design is employed to generate the 0 and 1 computation via intraparticle cleavage, which facilitates the computation units and makes the "computed values" more reliable. By simply altering the affinity ligands for inputs' biorecognition, LGM-Ln can also be extended to multi-inputs mode and produce the robust lanthanide encoded outputs in the whole human serum for sensing nucleic acids (with the detection limit of 10 pM) and proteins (with the detection limit of 20 pM). Compared with a logically gated micromachine encoded with fluorophores, the LGM-Ln has higher resolution and no spectral overlaps for multiple inputs, thus holding great promise in multiplex analyses and clinical diagnosis.

Advances in Computational Combustion Research in China: A Brief Review

Computational combustion modeling was introduced in China in the early 1980s. Specifically, after the first computational fluid dynamics (CFD) lecture in China given by Brian Spalding, Professor of Heat Transfer and Head of the Computational Fluid Dynamics Unit at Imperial College, London, under the invitation from Professor Wei-Cheng Fan of University of Science and Technology of China, Anhui, China, in 1984. This paper presents the development history of computational combustion research led by Fan in China. During the early stages of CFD development in the 1980s and 1990s, numerous innovative models, methods, and computational tools were proposed and developed by Fan's research group to advance computational combustion research in China. Throughout the evolution of computational combustion technologies, the State Key Laboratory of Fire Science, founded and led by Fan, has played a leading role in the development and deployment of these technologies in China. Recent progress in low-pressure combustion and battery fire research and combustion modeling technologies are described.

Computation Power and Energy Optimized Task Allocation in Internet of Things

The aim of most Internet of Things (IoT) networks is to allow different devices with various capabilities to share their resources and cooperate to perform a demanded task. Most of IoT objects are heterogeneous and are equipped with limited energy and computational capabilities. Therefore, distributing tasks to these objects represents a big challenge. In the literature, most of the existing works use heuristic optimizations to deal with different aspects of task allocation problem without considering the heterogeneity nature of the objects and the effect of their limited resources. In this paper, we first model the problem of task allocation in Internet of Things by adopting the concept of task groups and virtual objects. Then, we develop a multi-objective optimization algorithm to solve the task allocation problem. The algorithm simultaneously optimizes two contradictory objectives: computational power and energy efficiency. The first objective considers the fact that virtual objects are the basic units of computations and attempts to maximize the mean value of the computational power of virtual objects. On the other hand, the second objective aims to minimize the total dissipated energy in the network to ensure maximum operational and stability periods. In order to verify and test the effectiveness of the proposed algorithm, we performed extensive MATLAB based analysis as well as application layer simulations, based on OMNeT++, with various scenarios and compared our results with the most relevant algorithm in the literature.

PIMulator-NN: An Event-Driven, Cross-Level Simulation Framework for Processing-In-Memory-Based Neural Network Accelerators

Processing-in-memory (PIM) architecture has been proposed to accelerate state-of-the-art neuro-inspired algorithms, such as deep neural networks. In this article, we present PIMulator-NN, an event-driven, cross-level simulation framework for PIM-based neural network accelerators. By employing an event-driven simulation mechanism, PIMulator-NN is able to model architecture details and capture design details of the architecture. Moreover, we integrate the main-stream circuit-level simulation framework with PIMulator-NN to accurately simulate the area, latency, and energy consumption of analog computation units. To demonstrate the usage of PIMulator-NN, we implement several PIM designs with PIMulator-NN and perform detailed simulation. The simulation results show that memory access and interconnects make considerable impacts on system-level performance and energy. Note that such results are hard to be captured by conventional performance model-based estimations. We found some anti common-sense results while modeling the architecture details with PIMulator-NN. With several architecture templates, PIMulator-NN provides the users with a platform to build up their PIM architecture quickly. PIMulator-NN is able to capture the impacts of different design choices (e.g., dataflow, interconnect, data parallelism, etc.), and this could enable users to explore their design space efficiently.

A Novel Fully Hardware-Implemented SVD Solver Based on Ultra-Parallel BCV Jacobi Algorithm

Efficient FPGA-based floating-point singular value decomposition (SVD) is challenging for its enormous complexity with the rapid growth of the matrix dimension. Numerous hardware architectures have been proposed to improve the performance of SVD by increasing capacity of computation units, reusing data, and enhancing bandwidth. These designs, however, are not optimum due to their low parallelism, poor data access efficiency, and inferior iterations scheduling. In this express, we propose a block column vector Hestenes-Jacobi (BCV Jacobi) algorithm that decomposes an arbitrary large matrix into several blocks, enhances the access efficiency by customizing the distinctive data structure, and improves the system-level parallelism by simplifying the iteration scheduling. The proposed BCV Jacobi algorithm also achieves better scalability and efficiency. Experimental results show that the performance of the proposed FPGA based SVD processor is superior to other SVD implementations in terms of parallelism, data access efficiency, matrix size, and execution time. When compared with state of the art SVD accelerator engine, the proposed algorithm speeds up the runtime over <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2{\times }$ </tex-math></inline-formula> on average.

Brian2Loihi: An emulator for the neuromorphic chip Loihi using the spiking neural network simulator Brian.

Developing intelligent neuromorphic solutions remains a challenging endeavor. It requires a solid conceptual understanding of the hardware's fundamental building blocks. Beyond this, accessible and user-friendly prototyping is crucial to speed up the design pipeline. We developed an open source Loihi emulator based on the neural network simulator Brian that can easily be incorporated into existing simulation workflows. We demonstrate errorless Loihi emulation in software for a single neuron and for a recurrently connected spiking neural network. On-chip learning is also reviewed and implemented, with reasonable discrepancy due to stochastic rounding. This work provides a coherent presentation of Loihi's computational unit and introduces a new, easy-to-use Loihi prototyping package with the aim to help streamline conceptualization and deployment of new algorithms.

Convolutional neural networks reveal differences in action units of facial expressions between face image databases developed in different countries.

Cultural similarities and differences in facial expressions have been a controversial issue in the field of facial communications. A key step in addressing the debate regarding the cultural dependency of emotional expression (and perception) is to characterize the visual features of specific facial expressions in individual cultures. Here we developed an image analysis framework for this purpose using convolutional neural networks (CNNs) that through training learned visual features critical for classification. We analyzed photographs of facial expressions derived from two databases, each developed in a different country (Sweden and Japan), in which corresponding emotion labels were available. While the CNNs reached high rates of correct results that were far above chance after training with each database, they showed many misclassifications when they analyzed faces from the database that was not used for training. These results suggest that facial features useful for classifying facial expressions differed between the databases. The selectivity of computational units in the CNNs to action units (AUs) of the face varied across the facial expressions. Importantly, the AU selectivity often differed drastically between the CNNs trained with the different databases. Similarity and dissimilarity of these tuning profiles partly explained the pattern of misclassifications, suggesting that the AUs are important for characterizing the facial features and differ between the two countries. The AU tuning profiles, especially those reduced by principal component analysis, are compact summaries useful for comparisons across different databases, and thus might advance our understanding of universality vs. specificity of facial expressions across cultures.

DLS: A Fast and Flexible Neural Network Training System With Fine-grained Heterogeneous Device Orchestration

Neural network accelerators (e.g., TPUs) have become mainstream devices in computing systems. Unfortunately, the existing accelerator-based systems for neural networks fail to fully leverage the acceleration opportunities due to the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">limited flexibility</i> . Specifically, the majority of the accelerators focus on only the compute-intensive operations of neural networks (e.g., convolution and fully-connected layers). However, we identify that sub-optimal handling of <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">auxiliary operations</i> such as embedding and compression can incur non-trivial loss in terms of accuracy, training speed, and adaptability to new domains. The problem persists considering that recent advancements in neural networks often come from auxiliary operations. To effectively handle rapidly evolving auxiliary operations and maximize acceleration opportunities, we propose DLS, a holistic neural network acceleration system using heterogeneous computing devices. The key idea is to distribute compute-intensive operations on highly specialized ASICs for maximum performance, and auxiliary operations on flexible devices (e.g., FPGA, GPU) for better adaptability. We emphasize that a naïve integration of different devices fails to deliver high performance due to high communication overheads. To address this communication inefficiency, we propose an efficient FPGA-based device orchestration utilizing direct device-to-device communication and fine-grained operation scheduling. In this way, our system alleviates the communication overhead between heterogeneous devices by removing expensive kernel stack traversal and leveraging computation units and communication links in parallel. The evaluation using popular neural networks with emerging auxiliary operations shows that our system achieves both flexibility and high performance for various cases from single-accelerator training to distributed training (2.6–8.9× speedup).

Cooperative MEC With Non-Uniform User Density: Resource Planning and State Control Optimization

Mobile edge computing (MEC) allows mobile devices to offload computationally intensive tasks to nearby base stations equipped with computational resources. MEC also provides a solution for supporting low latency responses. However, MEC increases the system power consumption by adding extra computational units. It is important to carefully plan computational resources to achieve a balance between quality of service (QoS) and power consumption. Moreover, the MEC system control should shut down unused resources when traffic rates fall to further decrease the power consumption. In this letter, we investigate a workload-based core power state control for cooperative MEC systems and a heterogeneous resource planning method. We also formulate a joint resource planning and workload-threshold optimization problem for power consumption minimization. The problem is solved using a hybrid method using metaheuristic and heuristic algorithms. The problem is first solved for an equivalent uniform system using integer gaining and sharing knowledge (IGSK). The resources are then redistributed over the base stations using a heuristic that considers the effect of power state control on core distribution. The results show that the iterative algorithm can accomplish a satisfactory QoS with the same number of resources obtained by other approaches or less. Additionally, threshold control reduced the system power consumption by 19.6%.

Bayesian Sparse Regression for Mixed Multi-Responses with Application to Runtime Metrics Prediction in Fog Manufacturing

Fog manufacturing can greatly enhance traditional manufacturing systems through distributed Fog computation units, which are governed by predictive computational workload offloading methods under different Industrial Internet architectures. It is known that the predictive offloading methods highly depend on accurate prediction and uncertainty quantification of runtime performance metrics, containing multivariate mixed-type responses (i.e., continuous, counting, binary). In this work, we propose a Bayesian sparse regression for multivariate mixed responses to enhance the prediction of runtime performance metrics and to enable the statistical inferences. The proposed method considers both group and individual variable selection to jointly model the mixed types of runtime performance metrics. The conditional dependency among multiple responses is described by a graphical model using the precision matrix, where a spike-and-slab prior is used to enable the sparse estimation of the graph. The proposed method not only achieves accurate prediction, but also makes the predictive model more interpretable with statistical inferences on model parameters and prediction in the Fog manufacturing. A simulation study and a real case example in a Fog manufacturing are conducted to demonstrate the merits of the proposed model.

Experimental Evaluation of Sensor Fusion of Low-Cost UWB and IMU for Localization under Indoor Dynamic Testing Conditions.

Autonomous systems usually require accurate localization methods for them to navigate safely in indoor environments. Most localization methods are expensive and difficult to set up. In this work, we built a low-cost and portable indoor location tracking system by using Raspberry Pi 4 computer, ultra-wideband (UWB) sensors, and inertial measurement unit(s) (IMU). We also developed the data logging software and the Kalman filter (KF) sensor fusion algorithm to process the data from a low-power UWB transceiver (Decawave, model DWM1001) module and IMU device (Bosch, model BNO055). Autonomous systems move with different velocities and accelerations, which requires its localization performance to be evaluated under diverse motion conditions. We built a dynamic testing platform to generate not only the ground truth trajectory but also the ground truth acceleration and velocity. In this way, our tracking system's localization performance can be evaluated under dynamic testing conditions. The novel contributions in this work are a low-cost, low-power, tracking system hardware-software design, and an experimental setup to observe the tracking system's localization performance under different dynamic testing conditions. The testing platform has a 1 m translation length and 80 μm of bidirectional repeatability. The tracking system's localization performance was evaluated under dynamic conditions with eight different combinations of acceleration and velocity. The ground truth accelerations varied from 0.6 to 1.6 m/s2 and the ground truth velocities varied from 0.6 to 0.8 m/s. Our experimental results show that the location error can reach up to 50 cm under dynamic testing conditions when only relying on the UWB sensor, with the KF sensor fusion of UWB and IMU, the location error decreases to 13.7 cm.

A neuronal prospect theory model in the brain reward circuitry

Prospect theory, arguably the most prominent theory of choice, is an obvious candidate for neural valuation models. How the activity of individual neurons, a possible computational unit, obeys prospect theory remains unknown. Here, we show, with theoretical accuracy equivalent to that of human neuroimaging studies, that single-neuron activity in four core reward-related cortical and subcortical regions represents the subjective valuation of risky gambles in monkeys. The activity of individual neurons in monkeys passively viewing a lottery reflects the desirability of probabilistic rewards parameterized as a multiplicative combination of utility and probability weighting functions, as in the prospect theory framework. The diverse patterns of valuation signals were not localized but distributed throughout most parts of the reward circuitry. A network model aggregating these signals reconstructed the risk preferences and subjective probability weighting revealed by the animals’ choices. Thus, distributed neural coding explains the computation of subjective valuations under risk.