Computation Tree Logic Formulas Research Articles

Submodel Enumeration for CTL Is Hard

Expressing system specifications using Computation Tree Logic (CTL) formulas, formalising programs using Kripke structures, and then model checking the system is an established workflow in program verification and has wide applications in AI. In this paper, we consider the task of model enumeration, which asks for a uniform stream of output systems that satisfy the given specification. We show that, given a CTL formula and a system (potentially falsified by the formula), enumerating satisfying submodels is always hard for CTL--regardless of which subset of CTL-operators is considered. As a silver lining on the horizon, we present fragments via restrictions on the allowed Boolean functions that still allow for fast enumeration.

Business Process Modeled with BPMN and CTL Model Checking

Despite the richness of the BPMN language and its advantages for the specification of business processes, it remains a semi-formal language that does not allow rigorous verification of the specifications produced with it, and does not offer any methodological support to cover the verification phase. Therefore, several works have been proposed with the aim of describing the semantics of the BPMN language by a mathematical formalism. In this paper we address the issue of verifying BPMN models with an approach based on model-checking, where we focus on soundness, fairness, and safety properties. Thus by having a business process modeled by BPMN, a formal semantics for BPMN models based on Kripke structure will be provided for a formal verification of correctness. The properties are expressed with CTL (Computation Tree Logic) formulas. At the end, the model checker NuSMV is used for the verification of the formula.

A formal verification approach for composite smart contracts security using FSM

Many of today's companies use Smart Contracts to represent and execute their business processes. Smart contracts are self-executed programs running over blockchain. In this context, composite smart contracts are used to represent collaborative business processes. A composite smart contract is a smart contract that needs to execute other contracts using external calls to achieve its tasks. Composite smart contracts, through the use of external calls and the execution of other smart contracts that might belong to other owners or companies, bring many challenges with regard to security requirements. As a result, special efforts must be done to ensure composite smart contracts security verification. In this paper, we propose a novel approach to verify the security and the correctness of the composite smart contracts written in solidity in Ethereum blockchain. This approach is based on the finite state machine models and model checking method for modeling and verifying the composite smart contracts respectively. We consider seven security properties as well as the security issues that depend on the contract context to be checked in the composite smart contract. For this, we provide two different yet complementary types of verification. The first type of verification is applied to all smart contracts with properties called in our approach “standard properties” that represent the generic ones, while the second type considers the context-dependent properties that we called “specific properties” varying from one smart contract to another. Finally, we express all properties using computation tree logic formulae and we use the nuXmv symbolic model checker to verify the model against all properties. This approach is validated using a different set of solidity smart contracts.

Model-checking ecological state-transition graphs.

Model-checking is a methodology developed in computer science to automatically assess the dynamics of discrete systems, by checking if a system modelled as a state-transition graph satisfies a dynamical property written as a temporal logic formula. The dynamics of ecosystems have been drawn as state-transition graphs for more than a century, ranging from state-and-transition models to assembly graphs. Model-checking can provide insights into both empirical data and theoretical models, as long as they sum up into state-transition graphs. While model-checking proved to be a valuable tool in systems biology, it remains largely underused in ecology apart from precursory applications. This article proposes to address this situation, through an inventory of existing ecological STGs and an accessible presentation of the model-checking methodology. This overview is illustrated by the application of model-checking to assess the dynamics of a vegetation pathways model. We select management scenarios by model-checking Computation Tree Logic formulas representing management goals and built from a proposed catalogue of patterns. In discussion, we sketch bridges between existing studies in ecology and available model-checking frameworks. In addition to the automated analysis of ecological state-transition graphs, we believe that defining ecological concepts with temporal logics could help clarify and compare them.

Computation Tree Logic Formula Model Checking Using DNA Computing

Computation tree logic model checking is a formal verification technology that can ensure the correctness of systems. The vast storage density of deoxyribonucleic acid (DNA) molecules and the massive parallelism of DNA computing offer new methods for computation tree logic model checking. In this study, we propose a computation tree logic model checking method based on DNA computing. First, a system to-be-checked and a computation tree logic formula are encoded by single-stranded DNA molecules. Second, these singlestranded DNA molecules are mixed to spontaneously hybridize and form partial or complete double-stranded molecules. Finally, a series of molecular manipulations are applied to detect the double-stranded molecules so that the result whether the system satisfies the computation tree logic formula is obtained. Biological simulations confirm the validity of the new method.

An Automata‐Theoretic Approach to L ‐valued Computation Tree Logic Model Checking

Translating computation tree logic formulas into Buchi tree automata has been proven to be an effective approach for implementing branching-time model checking. For a more generalized class of lattice-valued (L-valued, for short) computation tree logic formulas, the revelent study has not proceeded yet. We introduce the notion of L-valued alternating Buchi tree automata and achieve the goal of associating each L-valued computation tree logic formula with an L-valued Buchi tree automaton. We show that a satisfiability problem for an L-valued computation tree logic formula can be reduced to one for the language accepted by an L-valued Buchi tree automaton. L-valued alternating Buchi tree automata are the key to the automata-theoretic approach to L-valued computation tree logics, and we also study their expressive power and closure properties.

Safety Verification of a Train Interlocking Timed Automaton Model

This paper presents an application of formal methods based on model checking techniques for safety verification of a railway interlocking system. The proposed model checking techniques are implemented on a timed automaton model of the considered interlocking systems and with respect to safety operational specification that are expressed as computation tree logic formulas. The freely available UPPAAL model checker is used to perform the model checking task and simulation results of the performed verification are presented.

Safety-Assured Model-Driven Design of the Multifunction Vehicle Bus Controller

In this paper, we present a formal model-driven design approach to establish a safety-assured implementation of multifunction vehicle bus controller (MVBC), which controls the data transmission among the devices of the vehicle. First, the generic models and safety requirements described in International Electrotechnical Commission Standard 61375 are formalized as time automata and timed computation tree logic formulas, respectively. With model checking tool Uppaal, we verify whether or not the constructed timed automata satisfy the formulas and several logic inconsistencies in the original standard are detected and corrected. Then, we apply the code generation tool Times to generate C code from the verified model, which is later synthesized into a real MVBC chip, with some handwriting glue code. Furthermore, the runtime verification tool RMOR is applied on the integrated code, to verify some safety requirements that cannot be formalized on the timed automata. For evaluation, we compare the proposed approach with existing MVBC design methods, such as BeagleBone, Galsblock, and Simulink. Experiments show that more ambiguousness or bugs in the standard are detected during Uppaal verification, and the generated code of Times outperforms the C code generated by others in terms of the synthesized binary code size. The errors in the standard have been confirmed and the resulting MVBC has been deployed in the real train communication network.

Performing CTL model checking via DNA computing

The computation using deoxyribonucleic acid (DNA) molecules provides an enormous parallel method that breaks through the limitations of the efficiency of traditional electronic computers. Model checking is a standard formal verification technique, which has been widely used in many fields of computation. It is also a well-known complex problem in computing theory. Until now, there is only one basic formula in the computation tree logic (CTL), for which model checking via DNA computing can be conducted. To this end, Adleman’s model based on DNA computing is used in this paper, based on which a series of DNA-computing-based model-checking algorithms to check the four basic CTL formulas are proposed. As a result, a core of the DNA version of the CTL model-checking problem is solved. The simulated experimental results show that the new algorithms are valid and can be properly implemented in molecular biology.

Model Checking Temporal Logic Formulas Using Sticker Automata.

As an important complex problem, the temporal logic model checking problem is still far from being fully resolved under the circumstance of DNA computing, especially Computation Tree Logic (CTL), Interval Temporal Logic (ITL), and Projection Temporal Logic (PTL), because there is still a lack of approaches for DNA model checking. To address this challenge, a model checking method is proposed for checking the basic formulas in the above three temporal logic types with DNA molecules. First, one-type single-stranded DNA molecules are employed to encode the Finite State Automaton (FSA) model of the given basic formula so that a sticker automaton is obtained. On the other hand, other single-stranded DNA molecules are employed to encode the given system model so that the input strings of the sticker automaton are obtained. Next, a series of biochemical reactions are conducted between the above two types of single-stranded DNA molecules. It can then be decided whether the system satisfies the formula or not. As a result, we have developed a DNA-based approach for checking all the basic formulas of CTL, ITL, and PTL. The simulated results demonstrate the effectiveness of the new method.

Formally Modeling and Analyzing the Reliability of Cloud Applications

Cloud computing has become an important, useful paradigm for building applications with cloud services. However, cloud services exist in heterogeneous environments on the Internet. It is challenging to guarantee the reliability of cloud applications. Although there are efforts studying cloud and grid service reliability, very few have considered the modeling and analysis of the reliability of cloud applications. To address this emerging, important problem, we propose the first systematic approach that considers both cloud application elements and their running environment so as to faithfully model the dynamics of cloud computing. First, we present a formal description language to model the different components of a cloud application, and use it to analyze the static and dynamic factors affecting the reliability of cloud applications. Second, we propose reliability assurance strategies to ensure that cloud applications dynamically meet their required reliability. Third, Computation Tree Logic (CTL) is used to convert the reliability assurance strategy into the CTL formulas. We present operational semantics and related theories of Petri nets for establishing the correctness of our proposed method. Finally, a series of simulations are performed to evaluate the efficiency of our proposed approach.

Distributed CTL model checking using MapReduce: theory and practice

SummaryThe recent extensive availability of ‘cloud’ computing platforms is very appealing for the formal verification community. In fact, these platforms represent a great opportunity to run massively parallel jobs and analyze ‘big data’ problems, although classical formal verification tools and techniques must undergo a deep technological transformation to take advantage of the available powerful architectures. A distributed approach to verification of computation tree logic formulas on very large state spaces is described. The approach exploits and integrates our parametric state–space builder, designed to ease the adoption of ‘big data’ platforms. The whole framework adopts a MAPREDUCEapproach as the core computational model and can be tailored to different modeling formalisms. This paper includes proofs of correctness, a short theoretical discussion about complexity, and reports a practical experience with some benchmarking Petri net models. The outcomes of several tests are presented, thus showing the convenience of the proposed approach. Copyright © 2015 John Wiley & Sons, Ltd.

CTL Model Repair for Bounded and Deadlock Free Petri Nets

Abstract: In dependable system design, formal techniques such as model checking are useful to perform property analysis of system models. Computation tree logic (CTL) model repair is an approach that complements model checking for obtaining new admissible models that can represent the correct behaviour of systems. In this paper a CTL model repair method for bounded and deadlock free Petri nets (PN) is presented. First, CTL semantics is defined for dealing with PN and a set of basic PN structure transformation operations are introduced. Then an algorithm to repair PN models for fulfilling CTL formulae is presented. The method is illustrated through an example regarding a system which must hold a safety property.

Computation tree logic model checking based on possibility measures

In order to deal with the systematic verification with uncertain information in possibility theory, Li and Li (2013) introduced model checking of linear-time properties in which the uncertainty is modeled by possibility measures. Xue, Lei and Li (2011) defined computation tree logic (CTL) based on possibility measures, which is called possibilistic CTL (PoCTL). This paper is a continuation of the above work. First, we study the expressiveness of PoCTL. Unlike probabilistic CTL, it is shown that PoCTL (in particular, qualitative PoCTL) is more powerful than CTL with respect to their expressiveness. The equivalent expressions of basic CTL formulae using qualitative PoCTL formulae are presented in detail. Some PoCTL formulae that cannot be expressed by any CTL formulae are presented. In particular, some qualitative properties of repeated reachability and persistence are expressed using PoCTL formulae. Next, adapting CTL model-checking algorithm, a method to solve the PoCTL model-checking problem and its time complexity are discussed in detail. Finally, an example is given to illustrate the PoCTL model-checking method.

Aspect-oriented design method for embedded systems based on timed statecharts

The formal modelling and verification method has become an effective way of improving the reliability and correctness of complex, safety-critical embedded systems. Statecharts are widely used to formally model embedded applications, but they do not realise the reasonable separation of system concerns, which would result in code scattering and tangling. Aspect-Oriented Software Development (AOSD) technology could separate crosscutting concerns from core concerns and identify potential problems in the early phase of the software development life cycle. Therefore, the paper proposes aspect-oriented timed statecharts (extended timed statecharts with AOSD) to separately model base functional requirements and other requirements (e.g., scheduling, error handling), thereby improving the modularity and development efficiency of embedded systems. Furthermore, the dynamic behaviours of embedded systems are simulated and analysed to determine whether the model satisfies certain properties (e.g., liveness, safety) described by computation tree logic formulae. Finally, a given case demonstrates some desired properties processed with respect to the aspect-oriented timed statecharts model.

CTL-RP: A computation tree logic resolution prover

In this paper, we present a resolution-based calculus R CTL >,S for Computation Tree Logic (CTL) as well as an implementation of that calculus in the theorem prover CTL-RP. The calculus R CTL >,S requires a transformation of an arbitrary CTL formula to an equi-satisfiable clausal normal form formulated in an extension of CTL with indexed path formulae. The calculus itself consists of a set of resolution rules which can be used for an EXPTIME decision procedure for the satisfiability problem of CTL. We give a formal semantics for the clausal normal form, provide proof sketches for the soundness and completeness of the resolution rules, discuss the complexity of the decision procedure based on R CTL >,S, and present an approach to implementing the calculus R CTL >,S using first-order techniques. Finally, we give a comparison between CTL-RP and a tableau theorem prover for CTL.

Symbolic Algorithmic Analysis of Rectangular Hybrid Systems

This paper investigates symbolic algorithmic analysis of rectangular hybrid systems. To deal with the symbolic reachability problem, a restricted constraint system called hybrid zone is formalized for the representation and manipulation of rectangular automata state-spaces. Hybrid zones are proved to be closed over symbolic reachability operations of rectangular hybrid systems. They are also applied to model-checking procedures for verifying some important classes of timed computation tree logic formulas. To represent hybrid zones, a data structure called difference constraint matrix is defined. These enable us to deal with the symbolic algorithmic analysis of rectangular hybrid systems in an e±cient way.

Learning to verify branching time properties

We present a new model checking algorithm for verifying computation tree logic (CTL) properties. Our technique is based on using language inference to learn the fixpoints necessary for checking a CTL formula instead of computing them iteratively as is done in traditional model checking. This allows us to analyze infinite or large state-space systems where the traditional iterations may not converge or may take too long to converge. We allow fairness constraints to be specified for verification of various liveness properties. The main challenge in developing a learning based model checking algorithm for CTL is that CTL properties express nested fixpoints. We overcome this challenge by developing a new characterization of CTL properties in terms of functions that have unique fixpoints. We instantiate our technique to systems in which states are encoded as strings and use a regular inference algorithm to learn the CTL fixpoints. We prove that if the fixpoints have a regular representation, our procedure will always terminate with the correct answer. We have extended our Lever tool to use the technique presented in this paper and demonstrate its effectiveness by verifying a number of parametric and integer systems.

An Efficient Specification for System Verification

In design of complex and large scale systems, system verification has played an important role. In this article, we focus on specification process of model checking in system verifications. Modeled systems are in general specified by temporal formulas of computation tree logic, and users must know well about temporal specification because the specification might be complex. We propose a method by which specifications with temporal formulas are obtained inductively. We will show verification results using the proposed temporal formula specification method, and show that amount of memory, OBDD nodes, and execution time are reduced.

Formal verification of statecharts using finite-state model checkers

This brief concerns the formal verification of properties of statecharts, a hierarchical state machine formalism for designing control-system logic. Various semantics have been defined for statecharts in terms of the microsteps that determine the transitions between statechart configurations. We show how computation tree logic (CTL) specifications for a statechart can be verified using a finite-state model checker such as SMV. The inputs to the model checker are a model and an associated expansion of the CTL formula that reflect the semantics. A Kripke structure with marked states provides the formal relationship between the expanded model and the original statechart structure and CTL specification. The results apply to a general class of semantics and statecharts with bounded behaviors. The approach is illustrated with a small example