Compression-encryption Scheme Research Articles

Image compression and encryption scheme using fractal dictionary and Julia set

An efficient and secure environment is necessary for data transmission and storage, especially for large-column multimedia data. In this study, a novel compression–encryption scheme is presented using a fractal dictionary and Julia set. For the compression in this scheme, fractal dictionary encoding not only reduces time consumption, but also gives good quality image reconstruction. For the encryption in the scheme, the key has large key space and high sensitivity, even to tiny perturbation. Besides, the stream cipher encryption and the diffusion process adopted in this study help spread perturbation in the plaintext, achieving high plain sensitivity and giving an effective resistance to chosen-plaintext attacks.

Image compression and encryption scheme based on 2D compressive sensing and fractional Mellin transform

Most of the existing image encryption techniques bear security risks for taking linear transform or suffer encryption data expansion for adopting nonlinear transformation directly. To overcome these difficulties, a novel image compression–encryption scheme is proposed by combining 2D compressive sensing with nonlinear fractional Mellin transform. In this scheme, the original image is measured by measurement matrices in two directions to achieve compression and encryption simultaneously, and then the resulting image is re-encrypted by the nonlinear fractional Mellin transform. The measurement matrices are controlled by chaos map. The Newton Smoothed l0 Norm (NSL0) algorithm is adopted to obtain the decryption image. Simulation results verify the validity and the reliability of this scheme.

Comments on "A Novel Compression and Encryption Scheme Using Variable Model Arithmetic Coding and Coupled Chaotic System

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> Recently, Bose and Pathak proposed a joint compression-encryption scheme by incorporating an adaptive arithmetic coder with a coupled chaotic system <citerefgrp> <citeref refid="ref1"/></citerefgrp>. In this comment, we first show that the scheme proposed by Bose and Pathak <citerefgrp><citeref refid="ref1"/> </citerefgrp> is not decodable. It is due to the fact that the current symbol to be encoded is swapped with a randomly selected symbol in the model prior to encoding it, making it impossible for the decoder to mirror the encoder's operations. We then suggest a natural solution to solve the undecodability problem by using the last encoded symbol to swap. Unfortunately, it can be shown that this modified scheme is vulnerable against a chosen-plaintext attack. </para>

Cryptanalysis of an image encryption scheme

We present cryptanalysis of an image encryption scheme, which is based on the base-switching (BS) lossless compression algorithm. The following conclusions are reached: 1. the size of the key space, i.e., the security against brute-force attacks, was greatly overestimated by the designers; and 2. the scheme is not secure against known/chosen-plaintext/ciphertext attacks. A real example is given to show the feasibility of a proposed chosen-plaintext attack. In addition, some other minor problems of the joint compression-encryption scheme are also pointed out.

Improving the compression and encryption of images using FPGA-based cryptosystems

Compression and encryption technologies are important to the efficient solving of network bandwidth and security issues. A novel scheme, called the Image Compression Encryption Scheme (ICES), is presented. It combines the Haar Discrete Wavelet Transform (DWT), Significance-Linked Connected Component Analysis (SLCCA), and the Advance Encryption Standard (AES). Because of above reason the ICES efficiently reduce the overall processing time. This study develops a novel hardware system to compress and encrypt an image in real-time using an image compression encryption scheme. The proposed system exploits parallel processing to increase the throughout of the cryptosystem for Internet multimedia applications to implement the ICES. Using hardware acceleration for encryption and decryption, the FPGA implementation of DWT, SLCCA and the AES algorithm can be used. Using a pipeline structure, a very high data throughput of 330 Mbit/s at a clock frequency of 40 MHz was obtained. Therefore, the ICES is secure, fast and suited to high speed network protocols such as ATM (Asynchronous Transfer Mode), FDDI (Fiber Distributed Data Interface) or Internet multimedia applications.