Complexity Of Motion Estimation Research Articles

An All-Zero Block Mode Decision Algorithm for H.264/AVC Optimization

The H.264/AVC standard achieves significantly high coding efficiency if multiple block size Motion Estimation is adopted. However, the complexity of Motion Estimation and DCT is dramatically increased as a result. In previous work we propose an early mode decision algorithm to control the complexity, based on all-zero-blocks detection in 16×16 size. In this paper, we improve the algorithm. Firstly, we propose to detect all-zero blocks in 16×16, 8×8 and 4×4 sizes to simplify the course of mode decision. Secondly, we define the thresholds which are used to terminate motion estimation and mode decision in advance for these sizes. Last, we present the whole proposed algorithm. Experiments show that about 77% encoding time and 85% motion estimation time can be saved on average, which is better than state-of-the-art approaches.

Low-Complexity Motion Estimation for H.264/AVC Through Perceptual Video Coding

This paper presents a low-complexity algorithm for an H.264/AVC encoder. The proposed motion estimation scheme determines the best coding mode for a given macroblock (MB) by finding motion-blurred MBs; identifying, before motion estimation, an early selection of MBs; and hence saving processing time for these MBs. It has been observed that human vision is more sensitive to the movement of well-structured objects than to the movement of randomly structured objects. This study analyzed permissible perceptual distortions and assigned a larger inter-mode value to the regions that are perceptually less sensitive to human vision. Simulation results illustrate that the algorithm can reduce the computational complexity of motion estimation by up to 47.16% while maintaining high compression efficiency.

High performance fractional motion estimation in h.264/avc based on one-step algorithm and 8×4 element block processing

Conventional two-step algorithm, long latency of interpolation and various motion vectors are three factors that mainly induce high computation complexity of fractional motion estimation and also prevent it from encoding high-definition video. In order to overcome these obstacles, a high performance fractional motion engine is proposed in this paper with three techniques. First, based on high correlation between motion vector of a block and its up-layer as well as relationship of integer candidates, one-step algorithm is proposed. Second, an 8×4 element block processing is adopted, which not only eliminates almost redundancies in interpolation, but also still ensures hardware reusability. Finally, a scheme of processing 4×4 and 4×8 block with free of cycles is presented, so that the number of motion vectors can be reduced up to 59%. Experimental results show that the proposed design just needs 50% of gate count and 56% of cycles when compared with previous design while nearly maintaining the coding performance.

FAST BLOCK MOTION ESTIMATION WITH EDGE ALIGNMENT ON H.264 VIDEO CODING

This paper presents a novel block matching scheme with edge alignment strategy on H.264 video coding. which uses multiple references and multiple block Sizes for motion estimation in order to improve the rate-distortion performance. In H.264. the computational complexity is linearly dependent on the number of allowed reference frames and block sizes using the full exhaustive search. Many fast block-matching algorithms reduce the computational complexity of motion estimation by carefully designing the search patterns with different shapes or sites which have significant impact on the search speed and distortion performance. However, the search speed and the distortion performance conflict often with each other for these methods. In this paper. given a block in the current frame. we first apply a fast approximate method based on edge alignment to obtain a good initial motion vector as well as a tight initial hound of distortion measure. Then, considering the edge orientation of the block, a modified hexagon search is used to fine tune the motion vector in low computation complexity. The proposed algorithm also pays attentions to the characteristics of multiple reference frames and multiple block sizes in H.264. Computer simulation results show that the proposed method gives good performance and pans a new way to design a cost-effective real-time video coding system.

Activity-Based Motion Estimation Scheme for H.264 Scalable Video Coding

This paper proposes a motion estimation scheme to reduce the computational complexity of multilayer motion estimation for scalable video coding. Based on the result of the motion estimation of the lower resolution layer referred to as base layer, we developed a new approach for exploring the search range of the enhancement layer with high coding efficiency. This approach is based on the activity defined as the absolute difference between the motion vector predictor and the final motion vector. Based on the correlation of the activities between neighboring layers, an inter-layer activity model was developed using a curve-fitted linear equation to exploit the activity in the base layer for deciding the search center and the search range of the enhancement layer. Each activity pair in the neighboring layers is used to associate the relevant macroblock to one of two groups; boundary region and interior region. The base-layer motion vector predictor is basically selected over all the activity regions; for each activity region, the proposed motion estimation algorithm decides whether to include the median motion vector predictor or not. Minimal sufficient search range is also decided from the inter-layer activity prediction factor that is adjusted to the given sequence. The proposed scheme reduced the execution time of motion estimation by 99.26% at the cost of 1.56% bit-rate increase and 0.048 dB peak signal-to-noise ratio (PSNR) decrease on average compared with the conventional full-search algorithm. The fast full-search block matching algorithm can also be incorporated to obtain the extra CPU time reduction in the motion estimation process. By adopting the fast full-search block matching algorithm (FFSBMA) in JSVM reference software, the CPU time was reduced by up to 91.84% and the memory bandwidth was reduced by 90% at the sacrifice of 1.27% bit-rate increase and 0.041 dB PSNR decrease on average compared with the FFSBMA only.

Subsampled Block-Matching for Zoom Motion Compensated Prediction

Motion compensated prediction plays a vital role in achieving enormous video compression efficiency in advanced video coding standards. Most practical motion compensated prediction techniques implicitly assume pure translational motions in the video contents for effective operation. Some attempts aiming at more general motion models are usually too complex requiring parameter estimation in practical implementation. In this paper, zoom motion compensation is investigated to extend the assumed model to support both zoom and translation motions. To accomplish practical complexity, a novel and efficient subsampled block-matching zoom motion estimation technique is proposed which makes use of the interpolated reference frames for subpixel motion estimation in a conventional hybrid video coding structure. Specially designed subsampling patterns in block matching are used to realize the translation and zoom motion estimation and compensation. No zoom parameters estimation and additional frame buffers are required in the encoder implementation. The complexity of the decoder is similar to the conventional hybrid video codec that supports subpixel motion compensation. The overall increase in memory requirement and computational complexity is moderate. Experimental results show that the new technique can achieve up to 9.89% bitrate reduction using KTA2.2r1 reference software implementation.

Bit plane matching based variable block size motion estimation method and its hardware architecture

Variable Block Size Motion Estimation (VBSME) is one of the most important features of state-of-theart video encoders. In the H.264/AVC encoder, the computational complexity of integer motion estimation is about 75%. Therefore, reducing this complexity is one of the key points to provide low power video encoding. In this paper, a reconfigurable bit plane matching based VBSME method and a runtime reconfigurable hardware architecture are proposed to allow low-power consumer electronic devices to make a trade-off between power requirements and motion estimation (ME) accuracy. The proposed ME method is the only low complexity ME algorithm proposed in the literature so far that can provide compatible ME accuracy for lower block sizes compared to the sum of absolute difference (SAD) criterion. A new data path for the computation of the matching criterion in the proposed hardware architecture which has a fully arithmetic structure is proposed to improve the previously utilized LUT based architectures by having a fully arithmetic structure.

Error concealment for motion-compensated interpolation

Motion-compensated interpolation is usually employed at the receiver end in order to improve the quality of the video, when a low-bit-rate video is encoded in conjunction with frame dropping. The authors propose a scheme that can exploit the block-based motion vector field available at the decoder to avoid the complex motion estimation. The scheme is based on an iterative refinement technique that employs the finite-element method to efficiently conceal the interpolation errors caused by unfilled holes or overlapped pixels in the predicted frames. As a consequence, no pixel classification is needed in the proposed scheme, thus reducing substantially the computational complexity. The scheme is capable of concealing the errors in the homogeneous regions as well as in regions containing sharp edges. The proposed scheme is simulated with the original frames of a number of test sequences, as well as implemented with the H.264/AVC decoded frames. The results from these extensive simulations show that the proposed scheme results in reconstructed frames having a better visual quality and a lower computational complexity than the existing schemes.

Low bit depth representation motion estimation algorithms: a comparative study

A comparative study of low complexity motion estimation algorithms is presented. The algorithms included in the study are the 1-bit transform, the 2-bit transform, the constrained 1-bit transform and the multiplication free 1-bit transform which are using different motion estimation strategies compared to standard exhaustive search algorithm-mean absolute difference or similar combinations. These techniques provide better performance in terms of computational load compared to traditional algorithms. Although the accuracy of motion compensation is only slightly lower comparing to the other techniques, results in terms of objective quality (peak signal-to-noise ratio) and entropy are comparable. This fact, nominates them as suitable candidates for inclusion in embedded devices applications where lower complexity translates to lower power consumption and consequently improved device autonomy.

Macroblock-level adaptive search range algorithm for motion estimation in multiview video coding

Multiview video coding (MVC) is an ongoing standard. In the working draft, motion estimation and disparity estimation are both employed in the encoding procedure. It achieves the highest possible coding efficiency, but results in extremely large encoding time, which obstructs it from practical applications. We propose a macroblock (MB) level adaptive search range algorithm utilizing inter-view correlation for motion estimation in MVC to reduce the complexity of the coder. For multi-view sequences, the motion vectors of the corresponding MBs in previously coded view are first extracted to analyze motion homogeneity. On the basis of motion homogeneity, MBs are classified into three types (MB in the region with homogeneous motion, with medium homogeneous motion, or with complex motion), and search range is adaptively determined for each type MB. Experimental results show that our algorithm can save 75% average computational complexity of motion estimation, with negligible loss of coding efficiency.

Multi-resolution motion estimation and compensation based on adjacent prediction of frame difference in wavelet domain

Aiming at the higher bit-rate occupation of motion vector encoding and more time load of full-searching strategies, a multi-resolution motion estimation and compensation algorithm based on adjacent prediction of frame difference was proposed. Differential motion detection was employed to image sequences and proper threshold was adopted to identify the connected region. Then the motion region was extracted to carry out motion estimation and motion compensation on it. The experiment results show that the encoding efficiency of motion vector is promoted, the complexity of motion estimation is reduced and the quality of the reconstruction image at the same bit-rate as Multi-Resolution Motion Estimation (MRME) is improved.

Fast reference frame selection algorithm for H.264/AVC

The H.264/AVC video coding standard newly adopted multiple reference frame motion estimation to improve video coding performance. However, these features result in a considerable increase in encoder complexity. Therefore, we propose a fast reference frame selection algorithm based on information from the reference region for a motion estimation process. Experimental results show that the proposed algorithm effectively reduces the complexity of multiple reference frame motion estimation. The reduction in the coding gain is negligible.

Two-bit transform based block motion estimation using second derivatives

Binary motion estimation algorithms reduce the computational complexity of motion estimation, but, sometimes generate an inaccurate motion vector. This paper proposes a novel two-bit representation, called twobit transform-second derivatives (2BT-SD) which improves the efficiency of image binarization and the accuracy of motion estimation by making use of the positive and negative second derivatives independently in the derivation of the second bit plane. The second derivatives are also used to detect flat or background regions, avoiding expensive motion vector search operations for macroblocks in these areas, and deriving the motion vectors by prediction from neighboring blocks. In applying the proposed 2BT-SD in the H.264/AVC standard, a further reduction of motion estimation complexity with a minor accuracy reduction is achieved by using 2BT-SD representation for secondary motion estimation while using the full resolution representation for the primary motion estimation. A hardware cost analysis shows that about 209 K gates of hardware logics and 2.7 K bytes of memory are reduced by 2BT-SD for motion estimation of 1280times720 size videos when compared with the full resolution motion estimation. Experiments show that the proposed 2BT-SD achieves better motion estimation accuracy than other binary motion estimations and provides faster processing time in flat or background regions with an acceptable bit-rate increase.

Adaptive Global Elimination Algorithm for Low Power Motion Estimation

Motion estimation typically consumes 50% to 70% of total power in video encode application. Optimizing the power consumption of motion estimation process is of great importance to low power video applications. Power dissipation increases with computational complexity. Reduction in motion estimation complexity is usually associated with increase in bit rate and a loss of quality. We explore a set of algorithms that reduce the complexity of motion estimation by adaptively changing the matching complexity based on macro-block features yet have only a modest cost in terms of bit rate increase and quality loss. The adaptive techniques are applied to the global elimination algorithm, which is a well known motion estimation algorithm. The global elimination algorithm uses fixed partition sizes and shapes irrespective of the nature of the macro-block. We show that by adapting the partition sizes and shapes according to the macro-block features such as variance and Hadamard coefficients, the computational complexity of global elimination algorithm can be significantly reduced with only a small increase in bit rate. We also propose a novel center-biased search order that uses early termination method designed to work with the global elimination algorithm. The adaptive match and center-biased search together result in around 57% reduction in computational complexity and 50% reduction in power dissipation compared to the original global elimination algorithm.

B 슬라이스의 압축 효율 향상을 위한 개선된 양방향 대칭 예측 부호화 방법

H.264/AVC의 B 슬라이스의 부호화 효율 향상과 두 개의 움직임벡터를 탐색하는데 소요되는 계산량 감소를 위하여 양방향 대칭(Bi-directional Symmetric) 기법이 개발된 바 있다. 이 기법은, 전방향과 역방향 참조영상 각각에 대하여 움직임 벡터를 구하고 이 두 개를 각각 다 전송하는 종래의 양방향 예측기법과는 달리, 전방향 참조영상에 대해 움직임 벡터를 찾는 동시에 역방향 참조영상에 대한 역방향 움직임 벡터를 전방향 참조영상, 역방향 참조영상, 그리고 현재 영상간의 상대적 거리를 고려한 대칭(Symmetric) 구조로 동시에 계산하여 추정하는 방법이다. 이 기법에 따르면, 전방향 움직임 벡터가 정해지면, 역방향 움직임벡터는 이와 대칭적으로 계산하여 얻어지므로 움직임벡터 추정 복잡도를 반으로 줄이고, 전방향 움직임벡터만을 전송하도록 하여 부호화할 움직임벡터의 양도 줄일 수 있다. 그러나 이 방법은 항상 전방향 움직임 벡터를 기준으로 역방향 움직임 벡터를 계산하여 얻다 보니, 장면전환등의 경우 오히려 역방향 움직임벡터를 기준으로 전방향 움직임벡터를 추산하는 것이 더욱 효율적인 경우도 있다. 본 논문에서는 전방향 참조영상에 대한 움직임 벡터를 중심으로 역방향 움직임 예측벡터를 추정하는 방법을 일반화시켜, 역방향 움직임 벡터를 중심으로 전방향 움직임 벡터를 추산하여 사용하는 방법을 제안하고 아울러 기존 방법과 제안 방법을 율왜곡 관점에서 최적으로 선택하여 사용하는 방법을 제안한다. A bi-directional symmetric prediction technique has been developed to improve coding efficiency of B-slice and to reduce the computational complexity required to estimate two motion vectors. On the contrary to the conventional bi-directional mode which encodes both forward and backward motion vectors, it only encodes a single forward motion vector, and the missing backward motion vector is derived in a symmetric way from the forward motion vector using temporal distance between forward/backward reference frames to and from the current B picture. Since the backward motion vector is derived from the forward motion vector, it can halve the computational complexity for motion estimation, and also reduces motion vector data to encode. This technique always derives the backward motion vector from the forward motion vector, however, there are cases when the forward motion vector is better to be derived from the backward motion vector especially in scene changes. In this paper, we generalize the idea of the symmetric coding with forward motion vector coding, and propose a new symmetric coding with backward motion vector coding and adaptive selection between the conventional symmetric mode and the proposed symmetric mode based on rate-distortion optimization.

Robust multiple description distributed video coding using optimized zero-padding

Distributed video coding (DVC) arouses high interests due to its property of low-complexity encoding. This paper proposes a robust multiple description DVC (MDDVC) under the constraint of low-complexity encoding. In MDDVC, zeros are padded to each frame and the resulting big-size video is divided into multiple descriptions. Then, each description is compressed by a hybrid DVC (HDVC) codec and transmitted over different channel. When one channel does not work, the lost HDVC description is estimated by the received from other channel, which guarantees the robustness of the system; MDDVC moves the complex motion estimation totally to the decoder so it features low-complexity encoding. In the pre-processing, an optimized zero-padding is also proposed to improve the performance. Experimental results exhibit that the proposed MDDVC scheme achieves better rate-distortion performance and robustness than the referenced especially when packet-loss rate is high.

Probabilistic fusion-based parameter estimation for visual tracking

In object tracking, visual features may not be discriminative enough to estimate high dimensional motion parameters accurately, and complex motion estimation is computationally expensive due to a large search space. To tackle these problems, a reasonable strategy is to track small components within the target independently in lower dimensional motion parameter spaces (e.g., translation only) and then estimate the overall high dimensional motion (e.g., translation, scale and rotation) by statistically integrating the individual tracking results. Although tracking each component in a lower dimensional space is more reliable and faster, it is not trivial to combine the local motion information and estimate global parameters in a robust way because the individual component motions are frequently inconsistent. We propose a robust fusion algorithm to estimate the complex motion parameters using variable-bandwidth mean-shift. By employing correlation-based uncertainty modeling and fusion of individual components, the motion parameter that is robust to outliers can be detected with variable-bandwidth density-based fusion (VBDF) algorithm. In addition, we describe a method to update target appearance model for each component adaptively based on the component motion consistency. We present various tracking results and compare the performance of our algorithm with others using real video sequences.

Content-Aware Prediction Algorithm With Inter-View Mode Decision for Multiview Video Coding

3-D video will become one of the most significant video technologies in the next-generation television. Due to the ultra high data bandwidth requirement for 3-D video, effective compression technology becomes an essential part in the infrastructure. Thus multiview video coding (MVC) plays a critical role. However, MVC systems require much more memory bandwidth and computational complexity relative to mono-view video coding systems. Therefore, an efficient prediction scheme is necessary for encoding. In this paper, a new fast prediction algorithm, content-aware prediction algorithm (CAPA) with inter-view mode decision, is proposed. By utilizing disparity estimation (DE) to find corresponding blocks between different views, the coding information, such as rate-distortion cost, coding modes, and motion vectors, can be effectively shared and reused from the coded view channel. Therefore, the computation for motion estimation (ME) in most view channels can be greatly reduced. Experimental results show that compared with the full search block matching algorithm (FSBMA) applied to both ME and DE, the proposed algorithm saves 98.4-99.1% computational complexity of ME in most view channels with negligible quality loss of only 0.03-0.06 dB in PSNR.

Segmentation of tracking sequences using dynamically updated adaptive learning.

The problem of segmentation of tracking sequences is of central importance in a multitude of applications. In the current paper, a different approach to the problem is discussed. Specifically, the proposed segmentation algorithm is implemented in conjunction with estimation of the dynamic parameters of moving objects represented by the tracking sequence. While the information on objects' motion allows one to transfer some valuable segmentation priors along the tracking sequence, the segmentation allows substantially reducing the complexity of motion estimation, thereby facilitating the computation. Thus, in the proposed methodology, the processes of segmentation and motion estimation work simultaneously, in a sort of "collaborative" manner. The Bayesian estimation framework is used here to perform the segmentation, while Kalman filtering is used to estimate the motion and to convey useful segmentation information along the image sequence. The proposed method is demonstrated on a number of both computed-simulated and real-life examples, and the obtained results indicate its advantages over some alternative approaches.

A Modified Spiral Search Algorithm and Its Embedded System Architecture Design

One of the most growing areas in the embedded community is multimedia devices. Multimedia devices incorporate a number of complicated functions for their operation, like motion estimation. A multitude of different implementations have been proposed to reduce motion estimation complexity, such as spiral search. We have studied the implementations of spiral search and identified areas of improvement. We propose a modified spiral search algorithm, with lower computational complexity compared to the original spiral search. We have implemented our algorithm on an embedded ARM based architecture, with custom memory hierarchy. The resulting system yields energy consumption reduction up to 64% and performance increase up to 77%, with a small penalty of 2.3 dB, in average, of video quality compared with the original spiral search algorithm.