Chip Complexity Research Articles

Low Complexity 54–63-GHz Transmit/Receive 64- and 128-element 2-D-Scanning Phased-Arrays on Multilayer Organic Substrates With 64-QAM 30-Gbps Data Rates

This article presents 64- and 128-element transmit/receive phased-arrays built using SiGe 2 $\times $ 2 quad-chips flipped on a multilayer organic printed-circuit board (PCB). The arrays cover 54–63 GHz with 40–45-dBm effective isotropic radiated power (EIRP) in the TX mode. The antenna elements are stacked microstrip antennas spaced at $0.5\lambda $ in the horizontal plane and $0.7\lambda $ in the vertical plane at 60 GHz, resulting in a scan range of ±50° in azimuth and ±15° in elevation. A 64-QAM 30-Gbps communication link is achieved in the transmit mode when using its full instantaneous bandwidth. This article shows that it is possible to build phased-arrays at 60 GHz and beyond using simple 2 $\times $ 2 quad-chips with low antenna distribution loss, and not using complex chips with 16–32 antenna connections and high distribution loss. Applications include high data-rate point-to-multipoint links, reconfigurable mesh networks, and automotive radars.

Electroplated Gold Microstuds for Thermocompression Bonding of UV LED Chips

A bonding technology using electroplated Au microstuds for ultraviolet (UV) light-emitting diodes (LEDs) has been investigated. Au studs with diameter, height, and pitch of about 15, 8, and $30~\mu \text{m}$ , respectively, were electroplated on standard UV LED chips on wafer level. The parameters for the thermocompression bonding (temperature, force, and time) were varied, and a critical temperature for bonding was identified. The electroplating process, in particular the plating base, strongly influences the adhesion of the Au microstuds and, therefore, the strength of the bond. Electro-optical measurements of bonded UVB LEDs as well as thermal resistance measurements and simulations of the devices show that Au–Au thermocompression bonding, using Au microstuds, can result in devices whose performance is similar to those fabricated using the conventional bonding technology of soldering with Au–Sn paste. Hence, the use of Au microstuds is an interesting alternative for bonding UV LED chips due to the ease of implementation, the stability of the bond, the comparable thermal resistance to Au–Sn, as well as the possibility to realize more complex and smaller chip geometries.

Evaluation of Stuck-at Faults in a FIR Filter Design

The development of integrated circuits becomes more complex and gets more susceptible to manufacturing errors as technology nodes get smaller. Along with that, the observability of more complex chips gets reduced, making it harder and more expensive to test. Therefore, the impact of different faults must be observed on the design as early as possible, in order to reduce the time to market and the cost of the fault to the project.Since many designs depend on Digital Signal Processing applications, this project proposes a case study of the implementation of a FIR filter design in Verilog and the analysis and comparison of its response by inserting stuck-at faults in its shift registers via test bench simulation.

An optimal analytical solution for maximizing expected battery lifetime using the calculus of variations

The exponential growth in the semiconductor industry and hence the increase in chip complexity, has led to more power usage and power density in modern processors. On the other hand, most of today's embedded systems are battery-powered, so the power consumption is one of the most critical criteria in these systems. Dynamic Voltage and Frequency Scaling (DVFS) is known as one of the most effective energy-saving methods. In this paper, we propose the optimal DVFS profile to minimize the energy consumption of a battery-based system with uncertain task execution time under deadline constraints using the Calculus of Variations (CoV). The contribution of this work is to analytically calculate the lower bound of expected battery charge consumption for a given task with uncertain execution time. Most of the research in dynamic voltage and frequency scaling tends to discretize time and value factors. This is presumably because of the context of embedded systems which is mainly based on digital design and algorithms. However, important factors in power and energy, such as supply voltage, supply current, and operational frequency, are continuous functions of time. The CoV is a branch of mathematics, where system parameters are considered as continuous functions of time. So, for dealing with this kind of problems, which system parameters are continuous functions of time, we can use the CoV as a powerful way to solve continuous optimization problems. In this paper, we obtain the exact analytical solution for maximizing battery lifetime, which is applicable to any convex power model.

Subthreshold Region based Linear Feedback Shift Register

Growing demand for portable devices and fast increases in complexity of chip cause power dissipation is an important parameter. Power consumption and dissipation or generations of more heat possess a restriction in the direction of the integration of more transistors. Several methods have been proposed to reduce power dissipation from system level to device level. Subthreshold circuits are widely used in more advanced applications due to ultra low-power consumption. The present work targets on construction of linear feedback shift registers (LFSR) in weak inversion region and their performance observed in terms of parameters like power delay product (PDP). In CMOS circuits subthreshold region of operation allows a low-power for ample utilizations but this advantage get with the penalty of flat speed. For the entrenched and high speed applications, improving the speed of subthreshold designs is essential. To enhance this, operate the devices at maximum current over capacitance. LFSR architectures build with various types of D flip flop and XOR gate circuits are analyzed. Circuit level Simulation is carried out using 130 nm technologies.

On-board control of wax valve on active centrifugal microfluidic chip and its application for plasmid DNA extraction

For the realization of bioassay with complex fluidic manipulation and logic operation on lab-on-a-disc platform, we present an active integrated centrifugal microfluidic chip based on the on-board control of wax valves within a multilayer complex chip. The multilayer hybrid structure including a microfluidic layer and a printing circuit board (PCB) layer utilizes the digital logic of electronic system to control the logic of liquid flow in microfluidic layer. The coupling mechanism between both layers is based on heat transfer, namely, the heating resistors in PCB layer are used to melt and open the paraffin wax valves in microfluidic layer. Without the limitation of surface tension-dependent valves, the application of active valve could be freely designed, which can largely extend the ability of integration on microfluidic chip. Many complex functional units including liquid sequential loading and switching of liquid flow are demonstrated. As an application, we also present a multilayer complex chip for plasmid DNA extraction based on our platform. In a word, our active centrifugal microfluidic platform provides a solution for the integration of complex bioassay on rotating disc, which has great potential in the applications of point-of-care diagnostics (POC).

Silicon Technology Inspired Test Structures and Methodology for SFQ Model-to-Hardware Correlation

A test structure suite to measure circuit delays, power, and operating margins of single flux quantum (SFQ) circuits and to derive key parameters directly from dc testable high-speed circuits is described. This suite comprises a set of ring oscillators and a time-differential experiment as well as isolated circuit components. Measured data are compared to the results obtained from circuit simulations conducted in a design environment used for more complex chip designs. This approach, which enables tracking of process technology and validation of device and circuit models in a self-consistent manner, is inspired by a similar methodology for silicon technology deployed successfully by IBM and its alliance partners.

Entegris pushes deeper into materials

Thwarted in its effort to acquire the electronic materials giant Versum Materials, Entegris is expanding its materials business by snapping up smaller suppliers instead. Entegris announced plans in January to merge with Versum, but Merck KGaA swooped in with a $6 billion cash offer and eventually won the backing of Versum’s board. Entegris retreated and in April revealed that it had acquired Digital Specialty Chemicals (DSC), a Canadian maker of organometallic precursors used to deposit thin films during semiconductor fabrication. Now, in a follow-up deal, Entegris has spent $165 million to acquire MPD Chemicals, a Pennsylvania-based firm that produces raw materials for specialty chemicals, electronics, and the life sciences. Together, Entegris says, the deals expand its capability to produce new organosilane and organometallic materials. CEO Bertrand Loy says the firm wants to meet growing demand for precursors used to deposit thin films on complex chips. MPD’s owner, Addison Capital Partners,

Semiconductor Quantum Dots for Integrated Quantum Photonics

AbstractQuantum mechanics promises to have a strong impact on many aspects of research and technology, improving classical analogues via purely quantum effects. A large variety of tasks are currently under investigation, for example, the implementation of quantum computing, sensing, metrology, and communication. From a general perspective, in a similar way as classical computing benefited by the reduction of the device footprint, enabling the realization of highly complex chips, a range of quantum applications will sensibly improve thanks to the successful realization of on‐chip quantum photonics. Conversely to bulky table‐top experiments, it would be very advantageous to transfer all required functionalities on the same quantum photonic chip. The key elements for quantum photonic circuits are on‐demand nonclassical light sources, a versatile photonic logic, the ability to store quantum information, and highly efficient detectors, directly integrated on‐chip. Among several systems capable of the efficient generation of single‐ and indistinguishable photons, quantum dots are rapidly establishing as one of the most appealing candidates. This paper reviews the recent progress in the on‐chip integration of quantum‐dot‐based nonclassical light sources as well as in the development of the main building blocks, either integrated monolithically or hybridly on a compact and scalable platform.

A newly developed transparent and flexible one-transistor memory device using advanced nanomaterials for medical and artificial intelligence applications.

Background: Artificial intelligence (AI) integrated circuits (IC) have memory devices as the key component. Due to more complex algorithms and architectures required by neuroscience and other medical applications, various memory structures have been widely proposed and investigated by involving nanomaterials, such as memristors.Methods: Due to reliability issues of mass production, the dominant memory devices in many computers are still dynamic random access memory (DRAM). A DRAM has one transistor and one capacitor, and so it contains two devices and requires a more compact design to replace.Results: A one-transistor memory device which is more compact than DRAM is proposed. As far as the authors know, this is the first/novel flexible and transparent one-transistor memory device without any additional process to make a typical transistor and which is based on polyvinyl alcohol. By using indium-titanium-oxide (ITO) as the metal gate, PVA as the dielectric layer and In-Ga-Zn-O (IGZO) as the channel, the memory is implemented mainly based on amorphous oxides and transparent flexible nanomaterials. The charge storage for the memory function was investigated here and is attributed to the mechanism of charge trapping between the ITO/IGZO junctions. It shows typical artificial synaptic transmission behaviors such as EPSC (excitatory postsynaptic currents).Conclusion: Such a first flexible and transparent one-transistor memory device based on PVA has one capacitor less than DRAM and could be a potential and promising candidate as an alternative for DRAM, especially in the highly complex AI chips needed for numerous medical applications. The flexible memory nanodevice based on flexible dielectrics such as PVA, which shows typical memory and artificial synaptic behaviors, could also be suitable for portable, flexible, transparent or skin-like medical applications.

Microfluidic single valve oscillator for blood plasma filtration

Microfluidic chips analogous to electronic circuits have potential to significantly reduce the reliance of dynamic off-chip controllers for parallel, multiple biochemical fluidic processing. However, even an oscillator for timing reference and biochemical waveform synthesis requires the interaction of multiple on-chip components, substantially increasing formational complexity and internal pressure drop of the total chip. Here, we present a constant flow-driven oscillator consisting of a single microvalve. Without the interaction of other cascaded on-chip components, the microvalve periodically opens and closes, thereby converting the constant inflow into pulsatile outflows. The adjustment of modular mechanical membranes enabled the control of the oscillation periods in the range of 0.4 s–30 min, with duty cycles of 0.03–0.8. We also demonstrate the ability of the microvalve oscillator in performing pulsatile blood plasma filtrations. The device could continuously filter plasma, without being significantly affected by filter clogging by red blood cells, for 1 h. Our microvalve oscillator without any cascaded multiple elements can be used for parallel and multiple biochemical fluidic processing.

Execution allowance based fixed priority scheduling for probabilistic real-time systems

Real-time systems tend to be probabilistic in nature because of the performance variations of complex chips. We present an execution allowance based fixed priority scheduling scheme for probabilistic real-time systems. This scheme consists of a probabilistic Worst Case Execution Time reshaping algorithm and a fixed priority scheduling strategy. It assigns a specific execution allowance to each task and schedules tasks under the Rate Monotonic policy. We present a schedulability analysis and show how to determine an appropriate execution allowance for each task. Evaluation shows that our proposed scheme can significantly outperform the existing approaches.

Digital Loop-Mediated Isothermal Amplification on a Commercial Membrane.

In this work, we report digital loop-mediated isothermal amplification (LAMP) or reverse-transcription LAMP (RT-LAMP) on a commercial membrane, without the need for complex chip fabrication or use of specialized equipment. Due to the pore size distribution, the theoretical error for digital LAMP on these membranes was analyzed, using a combination of Random Distribution Model and Multivolume Theory. A facile peel-off process was developed for effective droplet formation on the commercial track-etched polycarbonate (PCTE) membrane. Each pore functions as an individual nanoreactor for single DNA amplification. Absolute quantification of bacteria genomic DNA was realized with a dynamic range from 11 to 1.1 × 105 copies/μL. One-step digital RT-LAMP was also successfully performed on the membrane for the quantification of MS2 virus in wastewater. With the introduction of new probes, the positive pores can be easily distinguished from negative ones with 100 times difference in fluorescence intensities. Finally, the cost of a disposable membrane is less than $0.10/piece, which, to the best of our knowledge, is the most inexpensive way to perform digital LAMP. The membrane system offers opportunities for point-of-care users or common laboratories to perform digital quantification, single cell analysis, or other bioassays in an inexpensive, flexible, and simplified way.

Workload-aware harmonic partitioned scheduling for fixed-priority probabilistic real-time tasks on multiprocessors

Abstract Multiprocessor platforms bring the probabilistic characteristic to real-time systems because of the performance variations of complex chips. We present a harmonic partitioned scheduling scheme with workload awareness for periodic probabilistic real-time tasks on multiprocessors under the fixed-priority scheduling policy. A harmonic index is defined to quantify the harmonicity among probabilistic real-time tasks. The proposed scheme first sorts tasks with respect to the workload, then packs them to processors one by one aiming at minimizing the increase of harmonic index caused by the task deployment. Evaluation shows that our proposed scheme can significantly outperform the existing harmonic partitioned probabilistic real-time scheduling algorithms.

Test results and prospects for RD53A, a large scale 65 nm CMOS chip for pixel readout at the HL-LHC

The CERN RD53 collaboration was founded to tackle the extraordinary challenges associated with the design of pixel readout chips for the innermost layers of particle trackers at future high energy physics experiments. Around 20 institutions are involved in the collaboration, which has the support of both ATLAS and CMS experiments. The goals of the collaboration include the comprehensive understanding of radiation effects in the 65 nm technology, the development of tools and methodology to efficiently design large complex mixed signal chips and, ultimately, the development of a full size readout chip featuring a 400 × 400 pixel array with 50μm pitch. In August 2017, the collaboration submitted the large scale chip RD53A, integrating a matrix of 400 × 192 pixels and embodying three different analog front-end designs. This work discusses the characteristic of the RD53A chip, with some emphasis on the analog processors, and presents the first test results on the pixel array.

Grinding of WC-Co cermets using hexagonal boron nitride nano-aerosol

WC-Co cermets (ceramic-metal composites) were ground by a resin bonded diamond grinding wheel using hexagonal boron nitride (hBN) nano-aerosol to improve the grindability. This is a new generation grinding fluid and was produced by dispersing nano-sized hBN platelets in deionized water. Small quantity cooling-lubrication (SQCL) technology was employed to deliver hBN nanofluid in the form of nano-aerosol so that volumetric consumption rate could be kept at a very low value of 200 ml/h. The nanofluid, when separately characterized, demonstrated good lubrication and heat dissipation capability in reference with soluble oil, which is a commonly used cutting fluid for grinding. The superior tribological characteristics of hBN nanofluid were more pronounced at a high sliding speed of 1 m/s, as observed during a ball-on-disc test. However, the beneficial effect of using hBN nanofluid could be extracted more efficiently only in aggressive grinding condition. A clear drop in specific energy, favourable values of residual stress indicate the same. Prevalence of low grinding zone temperature was reflected through low specific energy values and finer but complex chip micromorphology. Overall the aqueous hBN nanofluid was proven to be a high performing grinding fluid suitable for SQCL application and WC-Co cermet grinding.

Dynamics and Stability of Turn-Milling Operations With Varying Time Delay in Discrete Time Domain

Turn-milling machines are widely used in industry because of their multifunctional capabilities in producing complex parts in one setup. Both milling cutter and workpiece rotate simultaneously while the machine travels in three Cartesian directions leading to five axis kinematics with complex chip generation mechanism. This paper presents a general mathematical model to predict the chip thickness, cutting force, and chatter stability of turn milling operations. The dynamic chip thickness is modeled by considering the rigid body motion, relative vibrations between the tool and workpiece, and cutter-workpiece engagement geometry. The dynamics of the process are governed by delayed differential equations by time periodic coefficients with a time varying delay contributed by two simultaneously rotating spindles and kinematics of the machine. The stability of the system has been solved in semidiscrete time domain as a function of depth of cut, feed, tool spindle speed, and workpiece speed. The stability model has been experimentally verified in turn milling of Aluminum alloy cut with a helical cylindrical end mill.

Ultra-thin TiO2 films by atomic layer deposition and surface functionalization with Au nanodots for sensing applications

The massive application requests for high-performance sensors indicate on the importance of precise controlling of the semiconducting oxide characteristics. The sensor longevity needed for the remote areas in harsh environments is mandatory and can benefit greatly from self-cleaning abilities. To serve this demand, we present in our work ultra-thin TiO2 films deposited with different thicknesses down to 15 nm on glass substrates using atomic layer deposition (ALD). The morphological, chemical, topographic, electronic and chemical properties of the fabricated films were investigated in detail, showing the presence of the anatase phase. As it is known by the literature, the UV and gas sensing properties are highly dependent on the thickness of the films, however fully reversible and capable of long term detection. Thinner films (15 nm) showed higher UV and gas sensing performances than thicker films (45 nm), which was related to the film thickness comparable to the Debye length. Further improvement in the UV sensing properties was achieved by surface functionalization of TiO2 films with Au nanoparticles. The UV response increased by about one order of magnitude after the surface functionalization with Au nanoclusters/nanoparticles. All TiO2 ultra-thin films demonstrated good selectivity to hydrogen gas, independent of the thickness. The samples with 15 nm thickness showed a response of ~ 600% to 100 ppm of H2 at 250 °C operating temperature. The presented study demonstrates the importance of the film thickness and surface functionalization with noble metals nanoclusters for sensing applications of ultra-thin TiO2 layers. Such ultra-thin films could be used for the development of a series of integrated detectors and chemical field effect transistors (chemFETs) directly on highly complex chips.

Controlled and tunable polymer particles\u2019 production using a single microfluidic device

Microfluidics technology offers a new platform to control liquids under flow in small volumes. The advantage of using small-scale reactions for droplet generation along with the capacity to control the preparation parameters, making microfluidic chips an attractive technology for optimizing encapsulation formulations. However, one of the drawback in this methodology is the ability to obtain a wide range of droplet sizes, from sub-micron to microns using a single chip design. In fact, typically, droplet chips are used for micron-dimension particles, while nanoparticles’ synthesis requires complex chips design (i.e., microreactors and staggered herringbone micromixer). Here, we introduce the development of a highly tunable and controlled encapsulation technique, using two polymer compositions, for generating particles ranging from microns to nano-size using the same simple single microfluidic chip design. Poly(lactic-co-glycolic acid) (PLGA 50:50) or PLGA/polyethylene glycol polymeric particles were prepared with focused-flow chip, yielding monodisperse particle batches. We show that by varying flow rate, solvent, surfactant and polymer composition, we were able to optimize particles’ size and decrease polydispersity index, using simple chip designs with no further related adjustments or costs. Utilizing this platform, which offers tight tuning of particle properties, could offer an important tool for formulation development and can potentially pave the way towards a better precision nanomedicine.

Rebooting Computers to Avoid Meltdown and Spectre

Security vulnerabilities such as Meltdown and Spectre demonstrate how chip complexity grew faster than our ability to manage unintended consequences. Attention to security from the outset should be part of the rememdy, yet complexity must be controlled at a more fundamental level.