Complementary Metal Oxide Semiconductor Platform Research Articles

Large-scale fabrication of meta-axicon with circular polarization on CMOS platform

Abstract Metasurfaces, consisting of arrays of subwavelength structures, are lightweight and compact while being capable of implementing the functions of traditional bulky optical components. Furthermore, they have the potential to significantly improve complex optical systems in terms of space and cost, as they can simultaneously implement multiple functions. The wafer-scale mass production method based on the CMOS (complementary metal oxide semiconductor) process plays a crucial role in the modern semiconductor industry. This approach can also be applied to the production of metasurfaces, thereby accelerating the entry of metasurfaces into industrial applications. In this study, we demonstrated the mass production of large-area meta-axicons with a diameter of 2 mm on an 8-inch wafer using DUV (Deep Ultraviolet) photolithography. The proposed meta-axicon designed here is based on PB (Pancharatnam–Berry) phase and is engineered to simultaneously modulate the phase and polarization of light. In practice, the fabricated meta-axicon generated a circularly polarized Bessel beam with a depth of focus (DoF) of approximately 2.3 mm in the vicinity of 980 nm. We anticipate that the mass production of large-area meta-axicons on this CMOS platform can offer various advantages in optical communication, laser drilling, optical trapping, and tweezing applications.

Combining n-MOS Charge Sensing with p-MOS Silicon Hole Double Quantum Dots in a CMOS platform.

Holes in silicon quantum dots are receiving attention due to their potential as fast, tunable, and scalable qubits in semiconductor quantum circuits. Despite this, challenges remain in this material system including difficulties using charge sensing to determine the number of holes in a quantum dot, and in controlling the coupling between adjacent quantum dots. We address these problems by fabricating an ambipolar complementary metal-oxide-semiconductor (CMOS) device using multilayer palladium gates. The device consists of an electron charge sensor adjacent to a hole double quantum dot. We demonstrate control of the spin state via electric dipole spin resonance. We achieve smooth control of the interdot coupling rate over 1 order of magnitude and use the charge sensor to perform spin-to-charge conversion to measure the hole singlet-triplet relaxation time of 11 μs for a known hole occupation. These results provide a path toward improving the quality and controllability of hole spin-qubits.

III–V Microwires with Reversed Ridge Waveguides Selectively Grown on Pre-Patterned Si Substrates

To construct functional photonic integrated circuits, an efficient and compact laser is expected to be incorporated into the complementary metal–oxide–semiconductor platform. Monolithic integration of III–V lasers on pre-patterned Si substrates by the aspect ratio trapping method is a promising solution. Here, microwires with reversed ridge waveguides (RRWs) on pre-patterned Si substrates were reported. By metal–organic chemical vapor deposition, high-quality InP microwires with RRWs were obtained, and InGaAs/InGaAsP multi-quantum-well structures with InGaAsP separate confinement hetero structure (SCH–MQW) were successfully achieved. The SCH–MQW structure was buried in the InP microwire, which was beneficial for transferring the heat generated in the active region. The micron size also contributes to the efficiency of thermal diffusion. Further, simulation results showed that the metal absorption loss could be less than 4 dB/cm by properly controlling the contact area between metal electrodes and microwires. This proposed structure opens up an alternative pathway for electrically driven III–V lasers seamlessly interfaced with Si-photonics.

Heterogeneous Integration of Atomically Thin Semiconductors for Non-von Neumann CMOS.

Atomically thin, 2D, and semiconducting transition metal dichalcogenides (TMDs) are seen as potential candidates for complementary metal oxide semiconductor (CMOS) technology in future nodes. While high-performance field effect transistors (FETs), logic gates, and integrated circuits (ICs) made from n-type TMDs such as MoS2 and WS2 grown at wafer scale have been demonstrated, realizing CMOS electronics necessitates integration of large area p-type semiconductors. Furthermore, the physical separation of memory and logic is a bottleneck of the existing CMOS technology and must be overcome to reduce the energy burden for computation. In this article, the existing limitations are overcome and for the first time, a heterogeneous integration of large area grown n-type MoS2 and p-type vanadium doped WSe2 FETs with non-volatile and analog memory storage capabilities to achieve a non-von Neumann 2D CMOS platform is introduced. This manufacturing process flow allows for precise positioning of n-type and p-type FETs, which is critical for any IC development. Inverters and a simplified 2-input-1-output multiplexers and neuromorphic computing primitives such as Gaussian, sigmoid, and tanh activation functions using this non-von Neumann 2D CMOS platform are also demonstrated. This demonstration shows the feasibility of heterogeneous integration of wafer scale 2D materials.

Real-Time Detection of Self-Assembled Monolayer Formation Using CMOS-Based Nanocapacitor Arrays

A sensing platform based on array of nanoelectrodes is used for high-frequency impedance measurements that allow detecting analytes beyond the electric double layer [1,2]. The massively parallelized architecture is based on complementary metal-oxide-semiconductor (CMOS) nanocapacitors. The small dimensions of the electrodes and associated readout circuitry on the CMOS chip yield minimal parasitic capacitance, which allows applying AC frequencies up to 50 MHz. Herein we will demonstrate the measurement of self-assembled monolayer (SAM) formation in real time on the array of nanoelectrodes fabricated on this CMOS platform. The average response of the thiol formation on the nanoelectrode was monitored at frequencies ranging from 1.6 MHz to 50 MHz. The measurements at different frequencies provides complementary information on the assembly process.

Extended infrared responses in Er/O-hyperdoped Si at room temperature.

Silicon photonics has become the preferred candidate for technologies applicable to multifarious fields. However, the applications are strictly limited by the intrinsic in-band photo effect of silicon. Herein, near-infrared photodetectors that break through the silicon bandgap by Er/O hyperdoping are fabricated, potentially extending their applications into telecommunications, low-light-level night vision, medical treatment, and others. Er/O-hyperdoped silicon was achieved as an infrared light absorption layer through ion implantation. The lattice damage caused by ion implantation was repaired by a deep cooling process in which high-temperature samples were cooled by helium flushing cooled by liquid nitrogen. Traditional junction and metallization processes were performed to form a photodiode. We demonstrate that the device has a spectral range up to the wavelength of 1568 nm, a maximum responsivity of 165 µA/W at 1310 nm, and 3 dB cutoff bandwidth up to 3 kHz. Finally, temperature-dependent optical-electrical characteristics were measured to demonstrate the activation mechanism of Er/O in silicon. This Letter proves silicon's potential in realizing extended infrared detection at room temperature, and it provides a possible way to fabricate infrared optoelectronics and signal processing integrated chips on a CMOS (complementary metal-oxide-semiconductor) platform.

Metasurface-based subtractive color filter fabricated on a 12-inch glass wafer using a CMOS platform

Optical color filters are widely applied in many areas including display, imaging, sensing, holography, energy harvest, and measurement. Traditional dye-based color filters have drawbacks such as environmental hazards and instability under high temperature and ultraviolet radiation. With advances in nanotechnology, structural color filters, which are based on the interaction of light with designed nanostructures, are able to overcome the drawbacks. Also, it is possible to fabricate structural color filters using standard complementary metal-oxide-semiconductor (CMOS) fabrication facilities with low cost and high volume. In this work, metasurface-based subtractive color filters (SCFs) are demonstrated on 12-inch (300-mm) glass wafers using a CMOS-compatible fabrication process. In order to make the transmissive-type SCF on a transparent glass wafer, an in-house developed layer transfer process is used to solve the glass wafer handling issue in fabrication tools. Three different heights of embedded silicon nanopillars (110, 170, and 230 nm) are found to support magnetic dipole resonances. With pillar height and pitch variation, SCFs with different displayed colors are achieved. Based on the resonance wavelength, the displayed color of the metasurface is verified within the red-yellow-blue color wheel. The simulation and measurement results are compared and discussed. The work provides an alternative design for high efficiency color filters on a CMOS-compatible platform, and paves the way towards mass-producible large-area metasurfaces.

Homogeneous 3D Vertical Integration of Parylene‐C Based Organic Flexible Resistive Memory on Standard CMOS Platform

Abstract3D integration of vertical resistive random access memory (VRRAM) with organic materials is promising for ultra‐high density flexible data storage. However, it is extremely challenging to heterogeneously fabricate an organic 3D VRRAM due to complicated issues such as chemical/thermal robustness, compatibility of organic/inorganic materials, and processes of stacking/patterning multi‐layer organic/metal films. Herein, an organic flexible 3D VRRAM based on parylene‐C is experimentally demonstrated on a standard complementary metal oxide semiconductor platform for the first time. The proposed 3D VRRAM can be homogenously fabricated based solely on parylene‐C (except the metal electrodes), significantly facilitating the 3D integration owing to chemical stability and compatibility with standard photolithography patterning. The flexible 3D organic memory arrays demonstrate great memory characteristics including retention time >105 s, endurance cycles >300, and resistance ON/OFF ratio >10. Further, a finite element analysis is established to model and investigate the scaling potential of the organic 3D VRRAM. The simulation results indicate the elevated temperature during programming could be catastrophic for ultra‐high density 3D VRRAM if the feature size approaches ≈100 nm or below, urging the containment of programming power to avoid thermal issues as well as to save energy consumption.

Ge quantum wire memristor

Despite being known of for decades, the actual realization of memory devices based on the memristive effect is progressing slowly, due to processing requirements and the need for exotic materials which are not compatible with today’s complementary-metal-oxide-semiconductor (CMOS) technology. Here, we report an experimental study on a Ge quantum wire device featuring distinct signatures of memristive behavior favorable for integration in CMOS platform technology. Embedding the quasi-1D Ge quantum wire into an electrostatically modulated back-gated field-effect transistor, we demonstrate that individual current transport channels can be addressed directly by controlling the surface trap assisted electrostatic gating. The resulting quantization of the current represents the ultimate limit of memristors with practically zero off-state current and low footprint. In addition, the proposed device has the advantage of non-destructive successive reading cycles capability. Importantly, our findings provide a framework towards fully CMOS compatible ultra-scaled Ge based memristors.

Bacteria electrical detection using 3D silicon nanowires based resistor

Resistors based on silicon nanowires (SiNWs) are developed for the direct detection of Escherichia coli bacteria. The devices are manufactured using conventional silicon technology. The SiNWs are synthesized by the vapor liquid solid process (VLS) using gold as the catalyst. The electrodes of the device consist of highly in situ doped polycrystalline silicon. The results show that the corresponding resistances can be potentially used for the detection of bacteria by electrical measurements, using SiNWs as sensitive units. The bacteria are preferentially hooked in the SiNWs network, which causes a drastic reduction in the electrical resistance of the component. Such resistor manufactured in a simple and low-cost CMOS (Complementary Metal Oxide Semiconductor) technology acts as proof of concept. This device offers promising potentialities taking advantages of integration into CMOS platform for alternative direct electrical detection of bacteria to monitor the contamination in environment for hygiene applications.

High-Mobility Helical Tellurium Field-Effect Transistors Enabled by Transfer-Free, Low-Temperature Direct Growth.

The transfer-free direct growth of high-performance materials and devices can enable transformative new technologies. Here, room-temperature field-effect hole mobilities as high as 707 cm2 V-1 s-1 are reported, achieved using transfer-free, low-temperature (≤120 °C) direct growth of helical tellurium (Te) nanostructure devices on SiO2 /Si. The Te nanostructures exhibit significantly higher device performance than other low-temperature grown semiconductors, and it is demonstrated that through careful control of the growth process, high-performance Te can be grown on other technologically relevant substrates including flexible plastics like polyethylene terephthalate and graphene in addition to amorphous oxides like SiO2 /Si and HfO2 . The morphology of the Te films can be tailored by the growth temperature, and different carrier scattering mechanisms are identified for films with different morphologies. The transfer-free direct growth of high-mobility Te devices can enable major technological breakthroughs, as the low-temperature growth and fabrication is compatible with the severe thermal budget constraints of emerging applications. For example, vertical integration of novel devices atop a silicon complementary metal oxide semiconductor platform (thermal budget <450 °C) has been theoretically shown to provide a 10× systems level performance improvement, while flexible and wearable electronics (thermal budget <200 °C) can revolutionize defense and medical applications.

3D integrated monolayer graphene\u2013Si CMOS RF gas sensor platform

Integration of a complementary metal-oxide semiconductor (CMOS) and monolayer graphene is a significant step toward realizing low-cost, low-power, heterogeneous nanoelectronic devices based on two-dimensional materials such as gas sensors capable of enabling future mobile sensor networks for the Internet of Things (IoT). But CMOS and post-CMOS process parameters such as temperature and material limits, and the low-power requirements of untethered sensors in general, pose considerable barriers to heterogeneous integration. We demonstrate the first monolithically integrated CMOS-monolayer graphene gas sensor, with a minimal number of post-CMOS processing steps, to realize a gas sensor platform that combines the superior gas sensitivity of monolayer graphene with the low power consumption and cost advantages of a silicon CMOS platform. Mature 0.18 µm CMOS technology provides the driving circuit for directly integrated graphene chemiresistive junctions in a radio frequency (RF) circuit platform. This work provides important advances in scalable and feasible RF gas sensors specifically, and toward monolithic heterogeneous graphene–CMOS integration generally.

Low Temperature Epitaxial Barium Titanate Thin Film Growth in High Vacuum CVD

Barium titanate is a promising perovskite material, exhibiting numerous materials properties advantageous for a range of applications, such as ferroelectricity, piezoelectricity, a high dielectric constant, and large electrooptic coefficients. It represents a potential candidate for the implementation of high bandwidth and low energy consuming modulators for optical communication in future integrated systems. Integration of the optical components with electronic circuits on silicon requires, however, suitable low temperature deposition processes for the growth of high quality epitaxial BaTiO3 films, which are still missing. For integration of novel materials into the complementary metal–oxide–semiconductor platform, a variety of prerequisites must be fulfilled; among them there is a strict limitation of the thermal budget of the growth process. Furthermore, high growth rates are desirable for enhanced throughput. Many chemical vapor deposition (CVD) processes allow growing thin films at high rates, but epitaxial BaTiO3 film formation typically requires high substrate temperatures. It is demonstrated that high vacuum CVD is capable of growing epitaxial barium titanate films on magnesium oxide, strontium titanate, and strontium titanate buffered silicon substrates at process temperatures of 400 °C and growth rates of up to 100 nm h−1 without the need of an additional annealing step; this is the lowest substrate temperature reported for a CVD processes.

High Temperature Coupling of IR Inactive CC Mode in Complementary Metal Oxide Semiconductor Metamaterial Structure

High temperature (up to 400 °C) coupling of infrared (IR) inactive &gt;CC&lt; mode is reported in complementary metal oxide semiconductor (CMOS)‐compatible refractory metamaterial filter and absorber structure by leveraging the carbon defects in tetraethyl orthosilicate obtained plasma enhanced chemical vapor deposition SiO2 thin film. Here, the role of strain gradient induced dipole moment in high stress configuration on the activation of otherwise inactive &gt;CC&lt; vibration at IR is confirmed. The unusual suppression of the transition is also observed in the absorber structure when the cavity mode strongly overlaps with it. Finally, 14 times better modulation of resonance spectrum is reported by such coupling in absorber configuration that supports thin film interference. The numerical and analytical study of the effect is found to be qualitatively in agreement with the experimental results. The study can set new paths toward more efficient design of spectrally selective thermophotovoltaic energy emitter at mid‐IR and novel mechanism for high temperature sensing on the ubiquitous CMOS platform.

A CMOS silicon spin qubit.

Silicon, the main constituent of microprocessor chips, is emerging as a promising material for the realization of future quantum processors. Leveraging its well-established complementary metal–oxide–semiconductor (CMOS) technology would be a clear asset to the development of scalable quantum computing architectures and to their co-integration with classical control hardware. Here we report a silicon quantum bit (qubit) device made with an industry-standard fabrication process. The device consists of a two-gate, p-type transistor with an undoped channel. At low temperature, the first gate defines a quantum dot encoding a hole spin qubit, the second one a quantum dot used for the qubit read-out. All electrical, two-axis control of the spin qubit is achieved by applying a phase-tunable microwave modulation to the first gate. The demonstrated qubit functionality in a basic transistor-like device constitutes a promising step towards the elaboration of scalable spin qubit geometries in a readily exploitable CMOS platform.

Microstructural characterization of Au-free Si/Ti/Al/Cu ohmic contacts in an AlGaN/GaN heterostructure

A complementary metal-oxide semiconductor (CMOS)-compatible Au-free Si/Ti/Al/Cu ohmic metallization scheme has been developed for AlGaN/GaN power transistors epitaxially grown on Si substrates. The Si/Ti/Al/Cu metallization exhibited a low specific contact resistance of 3.5×10−6Ωcm2 after optimizing the Si interface layer. The ohmic metal surface was smooth with a root-mean-square roughness of 24nm. Physical characterization confirmed that Cu diffusion into the semiconductor was suppressed because locally segregated TiSix alloys acted as a barrier. Shallow interfacial reactions of localized TiN alloys occurred in the AlGaN/GaN heterostructure. Without a designated diffusion barrier as in conventional Au-based metallization, the contact resistivity and surface morphology in Si/Ti/Al/Cu improved significantly, which helps address critical challenges associated with the fabrication of AlGaN/GaN power transistors on a Si CMOS platform.

Carbon nanomaterials field-effect-transistor-based biosensors

Carbon nanomaterials field-effect transistor (FET)-based electrical biosensors provide significant advantages over the current gold standards, holding great potential for realizing direct, label-free, real-time electrical detection of biomolecules in a multiplexed manner with ultrahigh sensitivity and excellent selectivity. The feasibility of integrating them with current complementary metal oxide semiconductor platform and a fluid handling module using standard microfabrication technology opens up new opportunities for the development of low-cost, low-noise, portable electrical biosensors for use in practical future devices. In this article, we review recent progress in the rapidly developing area of biomolecular interaction detection using FET-based biosensors based on the carbon nanomaterials single-walled carbon nanotubes (SWNTs) and graphene. Detection scenarios include DNA–DNA hybridization, DNA–protein interaction, protein function and cellular activity. In particular, we will highlight an amazing property of SWNT- or graphene-FETs in biosensing: their ability to detect biomolecules at the single-molecule level or at the single-cell level. This is due to the size comparability and the surface compatibility of the carbon nanomaterials with biological molecules. We also summarize some current challenges the scientific community is facing, including device-to-device heterogeneity and the lack of system integration for uniform device array mass production. The detection of biological events is crucial in many life science applications such as disease diagnosis and the analysis of biological systems. Song Liu and Xuefeng Guo from the Beijing National Laboratory for Molecular Sciences and Peking University now review the use of field-effect transistors (FET) based on carbon nanomaterials for biosensing applications. Biosensors made from graphene or carbon nanotubes-based FETs have several advantages. They are very sensitive to environmental parameters such as surface charges or pH values. Furthermore, these nanostructures are very good charge conductors, allowing for a fast response to external changes. In particular sensors based on transistor geometries are of benefit, as biological reactions taking place at their surface directly influence the charge transport through the device. Although reliability remains an issue, such carbon-derived biosensors have already shown protein reactions and detection down to the single molecule level, clearly establishing their potential for practical applications. In this article, we review recent progress in the rapidly developing area of biomolecular interaction detection with excellent selectivity and ultrahigh sensitivity, such as DNA-DNA hybridization, DNA-protein interaction, protein function, and cellular activity, using FET-based biosensors based on the carbon nanomaterials single-walled carbon nanotubes (SWNTs) and graphenes. We also summarize some current challenges the scientific community is facing, including device-to-device heterogeneity and the lack of system integration for uniform device array mass-production.

Improved extinction ratio of Mach-Zehnder based optical modulators on CMOS platform

Silicon based optical modulators with improved extinction ratio (ER) of 25 dB were demonstrated on complementary metal oxide semiconductor (CMOS) platform. It was proposed that the effect of optical absorption due to free carriers accumulated in silicon should be considered in the analysis of device configuration. Experimental results presented in this study were identical with the proposed analyses. The modulators were operated with the data transmission rate of 3.2 Gbps.

Memristor−CMOS Hybrid Integrated Circuits for Reconfigurable Logic

Hybrid reconfigurable logic circuits were fabricated by integrating memristor-based crossbars onto a foundry-built CMOS (complementary metal-oxide-semiconductor) platform using nanoimprint lithography, as well as materials and processes that were compatible with the CMOS. Titanium dioxide thin-film memristors served as the configuration bits and switches in a data routing network and were connected to gate-level CMOS components that acted as logic elements, in a manner similar to a field programmable gate array. We analyzed the chips using a purpose-built testing system, and demonstrated the ability to configure individual devices, use them to wire up various logic gates and a flip-flop, and then reconfigure devices.

Coupling efficiency of monolithic, waveguide-integrated Si photodetectors

A waveguide-integrated photodetector provides a small-footprint, low-capacitance design that overcomes the bandwidth-efficiency trade-off problem of free space optics. High performance silicon devices are critical to the emergence of electronic-photonic integrated circuits on the complementary metal oxide semiconductor platform. We have fabricated vertical p-i-n silicon photodetectors that are monolithically integrated with compact silicon oxynitride channel waveguides. We report over 90% coupling efficiency of 830 nm light from the silicon oxynitride (SiOxNy) channel waveguide to the silicon photodetector. We analyze the dependence of coupling on waveguide index by comparing coupling from low index-contrast waveguides and high index-contrast waveguides.