Common-mode Voltage Research Articles

Bearing Electrical Erosion Signal Detection Technique Based on Current Signal Analysis for Electric Motors

Abstract In modern industries, enhancing the efficiency and performance of electric motors is a critical requirement. Pulse width modulation (PWM) inverters utilized to enhance the energy efficiency of electric motors generate complex shaft voltages and bearing currents, leading to bearing electrical erosion. This study proposes a new method for detecting high-frequency (HF) circulating current and electric discharge machining (EDM) current signals in bearings for electric motors. The proposed method utilizes common mode voltage (CMV) and bearing current data, analyzing the relationship between these signals. Subsequently, it applies filtering techniques and differentiation for signal preprocessing. The Interquartile Range (IQR) method is used to detect outliers, classify HF circulating current and EDM current signals, and perform time-series data clustering to determine the occurrence frequency and timing of EDM signals. Finally, the implementation outcomes of the proposed method are validated, and its classification efficacy is evaluated and benchmarked against established methodologies through a comprehensive performance analysis. The proposed technique is anticipated to be applicable to the maintenance and prediction of modern electric motors in future developments, contributing to enhanced durability and reliability.

Optimal Space Vector-Based Hybrid PWM Scheme in Terms of Common-Mode Voltage and Line Current Ripple

Optimal Space Vector-Based Hybrid PWM Scheme in Terms of Common-Mode Voltage and Line Current Ripple

An extendable switched‐capacitor based three‐phase multilevel inverter with boosting capability

AbstractThe increasing demand for integrating renewable energy sources necessitates inverter topologies with boosting capabilities. Using inverters with boosting capability and a low number of components to integrate renewable energy sources can reduce costs. This study describes a three‐phase multilevel inverter based on extendable switching capacitors. The use of voltage‐doubling modules permits the development of the inverter's capability. By increasing the number of doubling modules, the number of output voltage levels and boost factor are increased. Furthermore, the study introduces and implements a line voltage‐based pulse width modulation approach developed for the proposed inverter. The operation of the proposed multilevel inverter, along with the pulse width modulation scheme, common mode voltage, and power loss analysis are thoroughly discussed. Additionally, a comparative analysis is provided; highlighting the advantage of reducing the number of power switches in the proposed three‐phase inverter compared to other existing topologies. Finally, a laboratory prototype is developed, operating at a 4 kHz switching frequency and with a 120 V DC‐link voltage. The experimental results corroborate the efficiency and performance of the proposed multilevel inverter, thereby validating its practical applicability.

Comparison between Cascaded H-Bridge and Neutral Point Clamped Topologies in Medium-Voltage Systems

Medium voltage motor drives (MVD) come in various topologies that allow designers to choose the best option for their application based on technical and economic considerations. The Neutral Point Clamped (NPC) and Cascade H-Bridge (CHB) are the most particular topologies that have come to the fore. CHB and NPC MVD's primary operating principles, switching stress, topological complexity, and harmonic distortion of the inverter output will be presented in this article, along with a brief review of suitable modules. Even though the number of parts in a cascaded inverter is lower than that of a neutral point-clamped inverter, it has been demonstrated that the stress on the switches in both types of inverters is the same and that the resulting output waveforms are nearly identical in terms of harmonic distortion. The neutral point clamped topology requires less secondary winding from the transformer, fewer voltage-balancing capacitors, the same quantity of switches, and extra clamping diodes. Benefits of NPC include high-power-density inverters, enhanced output quality, reduced number of components, reduced heat losses, increased efficiency, elimination of commonmode voltages and currents thanks to an isolation transformer, and a remote transformer that allows for a more adaptable footprint. Additionally, the NPC drive rectifier system (Transformer and diode H-bridges) has the advantage of more simplicity, ease of assembly, fewer connections, fewer space requirements, and an expensive isolation transformer. The MATLAB simulation for both topologies was carried out, with 3 phase motor 3.8kV, 150 KW motor parameters.

Common Mode and Terminal Voltages With Effect of Device Junction Capacitance in Five-Level Transformerless PV Inverter

Common Mode and Terminal Voltages With Effect of Device Junction Capacitance in Five-Level Transformerless PV Inverter

A Modified Carrier-Based PWM Strategy for Common Mode Voltage Elimination and Neutral Point Voltage Balance in a Unidirectional Three-Level Converter for AC Motor Drives

A Modified Carrier-Based PWM Strategy for Common Mode Voltage Elimination and Neutral Point Voltage Balance in a Unidirectional Three-Level Converter for AC Motor Drives

A common-mode insensitive thyristor-based latch regenerative comparator for low supply voltage applications

Presented in this article is a new two-stage rail-to-rail regenerative comparator circuit designed for low supply voltage applications. This work introduces a thyristor-based latch for the first time, allowing the comparator to operate from rail-to-rail inputs. The proposed comparator has been post-layout simulated using a standard 65 nm CMOS technology. The worst-case simulation results demonstrate that the comparator exhibits a delay of less than 22ns and consumes only 132 nW of power at a supply voltage of 0.6V and a sample rate of 1 MHz across its full common-mode range. Furthermore, the total input-referred offset voltage (3std + mean) remains below 21 mV throughout the entire rail-to-rail common-mode voltage range. Compared to the conventional single-stage comparator, the proposed circuit showcases an improvement of over 87 % in terms of delay and energy efficiency. Given its dignified performance metrics, this comparator is well-suited for use in low supply voltage applications such as biomedical implants, successive approximation registers analog-to-digital converters (SAR ADCs), Internet of Things (IoT).

Comparative Analysis of Space Vector Pulse-Width Modulation Techniques of Three-Phase Inverter to Minimize Common Mode Voltage and/or Switching Losses

Comparative Analysis of Space Vector Pulse-Width Modulation Techniques of Three-Phase Inverter to Minimize Common Mode Voltage and/or Switching Losses

An energy-efficient 16 MS/s 10-bit SAR ADC with MSB-block switching scheme

An energy-efficient MSB-block switching scheme without common-mode voltage variation for successive approximation register (SAR) analog-to-digital converters (ADCs) is proposed. Benefit from a pair of extra switches embedded in the capacitive digital-to-analog converter (CDAC), the proposed MSB-block switching scheme can reduce switching energy without further reducing the capacitor unit. The proposed switching scheme can achieve 93.8 % and 49.9 % savings in switching energy compared with the conventional switching scheme and the Vcm-based switching scheme, and the simulated differential-nonlinearity (DNL) and integrated-nonlinearity (INL) are 0.160 and 0.156LSB, respectively. The proposed switching scheme is verified in a 1.2-V 10-bit 16 MS/s SAR ADC in 65 nm CMOS technology. At maximum sampling rate, the proposed SAR ADC achieves an effective number of bits (ENOB) of 9.50 and a power consumption of 103.5μW, leading to a Figure of Merit of 8.93 fJ/Conversion-step.

Generalized Modulation of Common Mode Voltage Reduction for Current Source Inverter in Balanced and Unbalanced Load Cases

Generalized Modulation of Common Mode Voltage Reduction for Current Source Inverter in Balanced and Unbalanced Load Cases

Common mode voltage mitigation in a three phase 21-level asymmetrical inverter fed induction motor

Common mode voltage mitigation in a three phase 21-level asymmetrical inverter fed induction motor

A Carrier-Based Discontinuous Space-Vector PWM for Common-Mode Voltage Reduction in Dual-Input Three-Level T-Type Inverters With Unbalanced Neutral-Point Voltages

A Carrier-Based Discontinuous Space-Vector PWM for Common-Mode Voltage Reduction in Dual-Input Three-Level T-Type Inverters With Unbalanced Neutral-Point Voltages

An Ultra-Low-Voltage Transconductance Stable and Enhanced OTA for ECG Signal Processing.

In this paper, a rail-to-rail transconductance stable and enhanced ultra-low-voltage operational transconductance amplifier (OTA) is proposed for electrocardiogram (ECG) signal processing. The variation regularity of the bulk transconductance of pMOS and nMOS transistors and the cancellation mechanism of two types of transconductance variations are revealed. On this basis, a transconductance stabilization and enhancement technique is proposed. By using the "current-reused and transconductance-boosted complementary bulk-driven pseudo-differential pairs" structure, the bulk-driven pseudo-differential pair during the input common-mode range (ICMR) is stabilized and enhanced. The proposed OTA based on this technology is simulated using the TSMC 0.18 μm process in a Cadence environment. The proposed OTA consumes a power below 30 nW at a 0.4 V voltage supply with a DC gain of 54.9 dB and a gain-bandwidth product (GBW) of 14.4 kHz under a 15 pF capacitance load. The OTA has a high small signal figure-of-merit (FoM) of 7410 and excellent common-mode voltage (VCM) stability, with a transconductance variation of about 1.35%. Based on a current-scaling version of the proposed OTA, an OTA-C low-pass filter (LPF) for ECG signal processing with VCM stability is built and simulated. With a -3 dB bandwidth of 250 Hz and a power consumption of 20.23 nW, the filter achieves a FoM of 3.41 × 10-13, demonstrating good performance.

A Five-Level Common-Ground Inverter with Dynamic Voltage Boost and Fewer Elements for Photovoltaic Applications

Transformer-less multilevel inverters (TL-MLIs) are the subject of recent research due to their high-voltage or high-power capacity to convert low-voltage output from renewable energy sources into the desired output. They are also less expensive and smaller than traditional varieties. Nevertheless, leakage current is a common problem with these inverters. The proposed inverter aims to address this issue to the maximum extent possible. In the proposed inverter structure, there is a common ground for the input and output terminals. As a result, the overall common mode voltage (CMV) remains constant. This common ground feature short-circuits the Photovoltaic (PV) source to the grid parasitic capacitor, resulting in negligible leakage current. Furthermore, the proposed inverter boosts output voltage using the least amount of power devices and a single voltage source. The proposed inverter can be used modularly, increasing the number of output levels that can be achieved. The simulation results from MATLAB/Simulink and the conclusion of the mathematical analysis for the proposed inverter are shown. The results also demonstrate the output voltage boost capability, zero leakage current, and an appropriate total harmonic distortion for the output voltage and current waveforms.

Finite control set model predictive current control for three phase grid connected inverter with common mode voltage suppression

This research introduces an advanced finite control set model predictive current control (FCS-MPCC) specifically tailored for three-phase grid-connected inverters, with a primary focus on the suppression of common mode voltage (CMV). CMV is known for causing a range of issues, including leakage currents, electromagnetic interference (EMI), and accelerated system degradation. The proposed control strategy employs a system model that predicts the inverter’s future states, enabling the selection of optimal switching states from a finite set to achieve dual objectives: precise current control and effective CMV reduction, a meticulously designed cost function evaluates the potential switching states, balancing the accuracy of current tracking against the necessity to minimize CMV. The approach is grounded in a comprehensive mathematical model that captures the dynamics of CMV within the system, and it utilizes an optimization process that functions in real-time to determine the most suitable control action at each interval, Experimental validations of the proposed FCS-MPCC scheme have demonstrated its effectiveness in significantly improving the performance and durability of three-phase grid-connected inverters, Experimental validations of the proposed (MPC with CMV) scheme have demonstrated its effectiveness in significantly improving the performance and durability of three-phase grid-connected inverters. The proposed method achieved substantial reductions in CMV, notable improvements in current tracking accuracy, and extended system lifespan compared to conventional control methods.

Discontinuous PWM-based common-mode voltage suppression method for three-phase inverter

Discontinuous PWM-based common-mode voltage suppression method for three-phase inverter

DC-Link Voltage Fluctuation Suppression Method for Modular Multilevel Converter Based on Common-Mode Voltage and Circulating Current Coupling Injection under Unbalanced Grid Voltage

Grid voltage imbalance conditions often occur. Modular multilevel rectifiers (MMCs) have high DC-link voltage fluctuation under an unbalanced grid, which affects the normal operation of DC-side equipment. To suppress voltage fluctuation under an unbalanced grid, a coupling injection strategy composed of third zero-sequence common-mode voltage (TZCV) and secondary circulating current (SCC) was designed in this paper. In this paper, we calculated the coupling time-domain expression of the TZCV and SCC under an unbalanced grid voltage. Then, the influence of an SCC and TZCV coupling injection on DC-link voltage fluctuation was analyzed. The converter power flow of different system control objectives under an unbalanced grid was calculated, and the overall control method of the converter based on the arm current was proposed. The advantage of the method proposed in this paper is that it can realize online control under different grid voltages and input power conditions in real time and effectively suppress DC-link voltage fluctuation. The simulation was carried out on the MATLAB/Simulink platform, and a hardware-in-the-loop experimental platform was built; the results verify the effectiveness of the proposed strategy.

Flexible Common-Mode Voltage Modulation Strategy for Differential Boost Inverters

Photovoltaic power generation and energy storage technology are current hotspots in the clean energy industry. As a core piece of equipment, an inverter is subjected to higher demands for its voltage regulation range and output performance. A differential boost inverter features a boosting function not found in traditional inverters, effectively widening the input voltage range, with characteristics of a single-stage structure and simple modulation. However, the differential boost inverter faces the issue of high common-mode voltage. Considering that the magnitude of the common-mode voltage changes with different modulation methods, a novel modulation strategy with a flexible common-mode voltage is proposed, which can effectively suppress the common-mode voltage under the same gain without affecting the output power quality. This article first introduces the topology, working principle, and traditional modulation methods of the differential boost inverter. Then, the new modulation strategy is defined, and the gain equation is derived. The new modulation method’s applicable scenarios are discussed and compared to other modulation methods based on the gain curve, concluding that the new method has advantages in terms of common-mode voltage amplitude and power quality under low boost gain. Finally, the effectiveness of the proposed method is verified through simulation and experiments.

Model predictive control for single-phase cascaded H-bridge photovoltaic inverter system considering common-mode voltage suppression

In this article, a model predictive control (MPC) with common-mode voltage (CMV) suppression is proposed for single-phase cascaded H-bridge (CHB) inverters, which can also simultaneously achieve control objectives of grid-connected current tracking, voltages balancing of different H-bridge submodules on the DC-side and switching frequency reduction. To suppress high-frequency components of the common-mode voltage without additional switching devices, the algorithm proposed designs the predicted and reference values of the CMV and incorporates them in the cost function. At the same time, the capacitor voltages balancing control is integrated in the calculation of the optimal modulation function of the H-bridge, which reduces the complexity of control effectively. Besides, switching times of the MOSFETs are compared in two cycles. The cost function is constructed to represent comprehensive effect of the control. Finally, an experiment is performed on the hardware-in-the-loop experimental platform. The experimental results show that the proposed algorithm can offer a better voltage THD and reduce the times of switch action by nearly half while maintaining high-precision current tracking and maximum power point of photovoltaic modules, which alleviate the potential electromagnetic interference and cabling problem.

Data-Driven Predictive Control Strategy to Improve Robust Performance for Three-Level Inverters With Reduced Common-Mode Voltage

Data-Driven Predictive Control Strategy to Improve Robust Performance for Three-Level Inverters With Reduced Common-Mode Voltage