Common Mode Voltage Generation Research Articles

Comparative Analysis of SVM Techniques for a Five-Phase VSI Based on SiC Devices

Multiphase systems provides benefits compared to three-phase systems, such as improved torque per ampere, high power density, better fault tolerance, lower current per phase (due to power-splitting among a higher number of phases), and lower torque ripple, among others. Depending on the application, the system must meet determined requirements, such as the presence of harmonic content, power losses, and common-mode voltage (CMV) generation. This paper presents a comparative analysis of space vector modulation (SVM) techniques applied to a five-phase voltage source inverter with SiC switches to provide an overview of their performance. The performance of five-phase 2L SVPWM (space vector pulse width modulation), 2L+2M SVPWM, 4L SVPWM techniques, and their discontinuous versions, are analyzed by focusing on harmonic content, power losses, and CMV generation using SiC semiconductor devices. Matlab/Simulink and PLECS simulations are performed to achieve the above mentioned goal. The use of different techniques allows (1) reducing the harmonic distortion when 2L+2M SVPWM and 4L SVPWM are applied, and (2) the switching sequence of the modulation techniques can influence the switching losses. Therefore, the use of SiC switches reduces the switching losses. (3) However, CMV dv/dt increases. Therefore, it is possible to minimize the effects of the CMV dv/dt and amplitude by choosing the adequate technique.

Reduction of Common Mode Voltage and Conducted EMI Through Three-Phase Inverter Topology

This letter presents a three-phase voltage source inverter (VSI) topology to reduce the common mode (CM) voltage and electromagnetic interference (EMI) of electric motor drives. Instead of using filters, active or passive, or specific pulse width modulated (PWM) techniques to reduce the CM voltage, the proposed topology has inherently less CM voltage generation. With the addition of two switches placed in series on the dc lines, this topology effectively reduces the CM voltage during zero switching states by “floating” the inverter from the dc source. This topology can be implemented with any PWM method and does not add any additional complexity to the standard control techniques. The operation and CM reduction capability of the topology is first demonstrated in simulation and then verified with experimental results. A comparison of both common mode voltage and EMI is made to a conventional three-phase VSI to demonstrate the effectiveness of the proposed topology.

Improved space‐vector modulation technique for common mode currents reduction

Modified space-vector modulations (MSVMs) that reduce the variations of common mode voltage (CMV) for decreasing common mode currents (CMCs) are a low cost interesting approach. Unfortunately the lack of full utilisation of the DC bus voltage is a severe drawback that can limit the exploitation of such modulation techniques, unless special overmodulation methods are adopted. In this study, some solutions are presented that make a trade-off between the DC bus voltage exploitation and CMCs reduction and make MSVMs appealing to most electrical drives on the market. Furthermore, the influence of dead time in CMV generation is considered thus modifying the switching patterns according to the sign of the load currents. Experimental results are presented in order to confirm the feasibility of the proposed approach.