Comb Decimation Research Articles

Cost-effective Hogenauer cascaded integrator comb decimator filter design for custom ICs

Cascaded integrator comb (CIC) filters are one of the most economical multirate filters widely used as decimators in digital receivers. Several CIC decimators using different means of arithmetic are evaluated and the designs are synthesised for Altera field programmable gate arrays and cell-based integrated circuits using Synopsys tools. The proposed designs show 53–164% speed improvement and require lower costs (A * T) in most study cases.

Efficient polyphase decomposition of comb decimation filters in Σ△ analog-to-digital converters

A power efficient multirate multistage Comb decimation filter for mono-bit and multi-bit /spl Sigma//spl utri/ A/D converters is presented. Polyphase decomposition in all stages, with high decimation factor in the first stage, is used to significantly reduce the sampling frequency of the Comb filter. Several implementations indicate that proper choice of the first stage decimation factor can considerably improve power consumption, area and maximum sampling frequency. In multibit /spl Sigma//spl utri/ A/Ds, this optimum first stage decimation factor is a function of the input wordlength.

A 16-b 160-kHz CMOS A/D converter using sigma-delta modulation

The design and measured performance of a third-order sigma-delta analog-to-digital (A/D) converter sampling at 10.24 MHz that achieves a 91-dB signal-to-noise-plus-distortion ratio (RMS/RMS) with a 160-kHz output rate are discussed. The converter consists of three cascaded first-order sigma-delta modulators and a fourth-order comb decimation filter. A special autozeroed integrator having low pole error is required to achieve the 10.24-MHz sampling rate and high S/N. The modulator is implemented with fully differential switched-capacitor circuits and is manufactured using a 1.5- μm double-metal double-poly CMOS process.