Coefficient Wordlength Research Articles

High-speed single-board flexible hardware implementation of a wave digital filter

The hardware implementation of a sixth-order wave digital filter on a single printed-circuit board has been described in the literature. In the present paper, a greatly improved hardware design is discussed. By including more parallelism into the architecture, sampling rates of over 500 kHz can be achieved for a fifthorder filter. With the aid of a microprocessor development system, the filter can be programmed for any order up to 15. Once programmed, the filter runs independently. An example is given, which illustrates the hardware performance with various coefficient wordlengths. Attention is also paid to the question of in-band noise.

Two-dimensional discrete filters using spatial integrators

Two-dimensional recursive digital filters may be implemented using spatial integrators, 1/(z1 − 1) and 1/(z2− l), instead of shift operators z1−1 and z2−1. It is shown that such filters allow much shorter multiplier coefficient wordlengths to be used. A numerical example confirms that multiplier coefficient wordlengths can be reduced from approximately 28 bits to 8 bits without loss of accuracy in the frequency response of the filter.

Adaptive Reference Echo Cancellation

The AREC (adaptive reference echo cancellation) algorithm is presented for an echo canceler used in full-duplex two-wire digital transmission on digital subscriber loops. The AREC algorithm incorporates a decision-directed estimation of and compensation for the far-end signal which is a source of interference to the conventional echo canceler adaptation algorithm. The AREC algorithm thus offers much faster convergence and shorter coefficient wordlengths than the conventional algorithm. Analysis and simulation of the performance and convergence of both AREC and conventional echo canceler adaptation algorithms are carried out. Included in the analysis is the effect of receiver delay and coefficient wordlength requirements. A simple and robust startup procedure is proposed and investigated by simulation.

Finite word length FIR filter design using integer programming over a discrete coefficient space

It is demonstrated that the improvement achieved by using integer programming over simple coefficient rounding in the design of finite impulse response (FIR) filters with discrete coefficients is most significant when the discrete coefficient space is the powers-of-two space or when a specification is to be met with a given coefficient word length by increasing the filter length. Both minimax and least square error criteria are considered.

DSP-Based Implementation of a Transmultiplexer Using Wave Digital Filters

The multistep single-path multiplier-free conversion scheme proposed by Fettweis satisfies the requirement of robustness and seems to be attractive for transmultiplexers. This paper describes the implementation of a transmultiplexer based on this method using digital signal processors (DSP's). Since most of the currently available or proposed DSP's have sum-of -products type arithmetic units with fixed coefficient wordlengths and since this is not the most favorable approach for implementing wave digital filters (WDF's), a novel DSP will be proposed which is advantageous for WDF's and other more sophisticated digital signal processing algorithms. This DSP makes the multistep single-path multiplier-free conversion scheme a viable alternative to other schemes, also with respect to hardware efficiency and power consumption. The importance of using various simulation programs (in the frequency and the time domain as well as in real time) for supporting the design of the transmultiplexer will be stressed.

Analysis of digital filters with randomly dithered coefficients

Dithering the coefficients of digital filters enhances the selection of available transfer functions when the coefficient word length is limited. Furthermore, dithering can reduce limit cycle oscillations. However, noise is introduced into the filter. This paper presents a novel analytic technique for determining the noise components introduced by dithering. It uses time-squared transfer functions to produce generalised expressions for the introduced noise. These expressions increase the potential for exploiting the advantages of randomly dithering coefficients in digital filters. Furthermore, the analysis can be applied to continuous systems.

A digital filter structure requiring only m-bit delays, shifters, inverters, and m-bit adders plus simple logic circuitry

digital filter structure is presented which requires only <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</tex> -bit adders, shifters, and inverters, where <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</tex> is the state-variable word length, to exactly realize the arithmetic operations for state equations. It is assumed that the coefficients in the state equations are finite-wordlength binary numbers; the canonical signed digit code is used to simplify these coefficients. All bits (including underflow bits) of the next state variables are computed, using two's complement (2's C) arithmetic, so the only source of roundoff error is the truncation of the exact next-state variables to <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</tex> bits. Simple logic circuitry produces magnitude truncation, which suppresses all zero-input limit cycles if a diagonal Lyapunov function exists. Thus the above structure is applied to state equations derived for wave digital filters, which possess a diagonal Lyapunov function and yield short coefficient word lengths due to low sensitivity properties. A computer-simulated example, a third-order elliptic low-pass filter, is given with unit-sample response and frequency response for <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</tex> equal to 8 and 16 bits.

The digital implementation of control compensators: The coefficient wordlength issue

There exists a number of mathematical procedures for designing discrete-time compensators. However, the digital implementation of these designs, with a micro-processor for example, has not received nearly as thorough an investigation. The finite-precision nature of the digital hardware makes it necessary to choose an algorithm (computational structure) that will perform 'well-enough' with regard to the initial objectives of the design. This paper describes a procedure for estimating the required fixed-point coefficient wordlength for any given computational structure for the implementation of a single-input single-output LQG design. The results are compared to the actual number of bits necessary to achieve a specified performance index.

Minimization of sensitivities in digital filters by coefficient conversion

AbstractIn digital filters, the response involves the error due to the finiteness of coefficient word lengths. This error is related to the coefficient sensitivity. In this paper, low‐sensitivity transfer functions are derived. With the smallest number of multipliers, the coefficients of the transfer function are derived as functions of multiplier coefficients using constant mij. Then the sensitivity of the amplitude characteristics for the multiplier coefficients is obtained as functions of real frequencients and constant mij and multiplier coefficients are determined by minimizing this sensitivity. Several low‐sensitivity transfer functions are derived and their circuits are presented.

Design of optimal finite wordlength FIR digital filters using integer programming techniques

The application of a general-purpose integer-programming computer program to the design of optimal finite wordlength FIR digital filters is described. Examples of two optimal low-pass FIR finite wordlength filters are given and the results are compared with the results obtained by rounding the infinite wordlength coefficients. An analysis of the approach based on the results of more than 50 design cases is presented and the problem of optimal wordlength choice is discussed.

Coefficient sensitivity in recursive digital filters implemented using microprocessors

The sensitivity of the transfer function of a second-order digital filter to the values of its coefficients is evaluated. Two implementations are compared. The delay (z-1) operator as the basis for the block diagram is compared with the addition operator {z/(z - 1)}. The latter is the form convenient to implement using a microprocessor. It is shown that the addition operator gives superior sensitivities, particularly for large sampling rates. This means that, for a given coefficient wordlength, the density of available transfer functions is greater.

Y transform, for the design of recursive digital filters

The Y operator, y = (1-z-1)/T, gives digital differentiation. Recursive digital filters are more conveniently designed using the y rather than the z operator. It relates closely to Laplace transforms and to microprocessor algorithms. 1/y filter elements give improved filter sensitivity to coefficient wordlength. Furthermore, accurate compensation can be made for sampling.

On the problem of designing IIR digital filters with short coefficient word lengths

The paper presents an algorithm for designing IIR digital filters with short coefficient word lengths. The algorithm has the flexibility of obtaining a better design at the expense of investing more computational time. It was found that, by incorporating Crochiere's idea of equalizing passband and stopband statistical word lengths before applying the algorithm, we are capable of obtaining a further reduction in the overall word length when compared with that obtained by applying the algorithm alone. The principle of the algorithm and the concept of statistical word lengths equalization for further word length reduction applies to all IIR digital filters of different structures and passbands, with and without their transfer functions expressed in a closed form.

Design of f.i.r. direct-form digital filters with two quantisation steps

The direct-form realisation of f.i.r. linear-phase digital filters is investigated when the coefficients are separated in two groups with different quantisation steps. It is shown in an example that considerable improvement in coefficient word length can be achieved by this technique.

New integer programming scheme for nonrecursive digital filter design

A new mixed-integer linear programming objective function for optimising an f.i.r. linear-phase digital filter is presented. In comparison with the conventional objective function, the new one has the advantages of reducing the number of delays and/or the coefficient wordlength.

Digital filter design with short word-length coefficients

This paper describes an algorithm for the design of digital filters with short word-length coefficients. Starting with a set of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</tex> optimized <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">z</tex> -plane poles and zeros that meet specifications with some margin, the algorithm sequentially applies a limited search (up to 16 grid points) for the locally optimum grid point in the neighborhood of a particular <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">z</tex> -plane singularity, followed by a global continuous reoptimization of the remaining <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N-1</tex> singularities. As the number of available singularities decreases to zero, the algorithm terminates with a limited search in the neighborhood of the last singularity for the best grid point. The success depends crucially on the sequence in which the singularities are fixed at the locally optimum grid points in the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">z</tex> plane. The sequence itself is an integral part of the algorithm. The algorithm has been applied successfully to the design of high-order filters with stringent specifications, and the solutions obtained show 0- , 1- , or 2-bit improvement in the coefficient word length over the previously published results.

On the design of wave digital lattice filters with short coefficient word lengths and optimal dynamic range

Wave digital lattice filters require, in general, fewer multipliers than other digital realizations and have excellent passband sensitivity properties. Because of the variety of solutions which are possible for the realization of the lattice reactances, these filters can be designed with simple multiplier coefficients in spite of the high sensitivity in the stopband. The filter structure which offers the optimal dynamic range is determined by means of the equivalences between parallel and series adaptors and by means of scaling with coefficients equal to powers of two. This is illustrated by some specific examples.

A Microprocessor Log PCM/ADPCM Code Converter

A microprocessor has been used to translate between Log PCM and ADPCM (Adaptive Differential PCM) code forms. This system, in bridging the gap between simulation and prototyping, provides realtime speech processing with user interaction. Continuously coded speech can he subjectively evaluated while switching the values of code word length, step size, or predictor coefficients. Translations of additional code forms such as Δ-Mod, NIC, or Tree Codes could easily be implemented with the micro-codable system. The processor is configured as a stand-alone device competitive with special purpose hardware in size, speed, and cost.

Digital filtering by polyphase network:Application to sample-rate alteration and filter banks

The digital filtering process can be achieved by a set of phase shifters with suitable characteristics. A particular set, named polyphase network, is defined and analyzed. It permits the use of recursive devices for efficient sample-rate alteration. The comparison with conventional filters shows that, with the same active memory, a reduction of computation rate approaching a factor of 2 can be achieved when the alteration factor increases. A more substantial gain can be obtained in the direct realization of a uniform bank of recursive filters through combination of the polyphase network with a discrete Fourier transform (DFT) computer; savings in hardware also result from the low sensitivity of the structure to coefficient word lengths.

Design of digital filters with severely quantized coefficients

Two simple techniques are described for the design of recursive digital filters in the cascade configuration, which minimize the coefficient word-length. These are intended for cases where a statistical treatment is not valid because of the coarseness of quantization.The derivation of the discrete set of pole positions for the basic second-order section in the form of a z-plane pole grid is reviewed. This concept is fundamental to both techniques. They have been implemented by means of interactive operation on a small computer, but the more sophisticated technique, which is a form of one-at-a-time optimization, could be organized as a batchprocessed algorithm.