CMOS LC Voltage-controlled Oscillator Research Articles

A Subthreshold Low Phase Noise CMOS LC VCO for Ultra Low Power Applications

A subthreshold low power, low phase-noise voltage controlled oscillator (VCO) is demonstrated in a commercial 0.18 mum CMOS process. In subthreshold regime, MOS drain current is dominated by diffusion mechanism resulting in a high ratio of transconductance to drain current and suppressed phase noise. Therefore, low power and low phase noise characteristics are achieved without using nonconventional high passive components. The VCO measures a phase noise of -106 dBc/Hz at 400 kHz offset from 2.63 GHz oscillation frequency with 0.43 mW power dissipation drawn from 0.45 V power supply. Figures of merit for this VCO (power-frequency-normalized of 12 dB and power frequency-tuning-normalized of -10 dB) are among the best reported for CMOS oscillators.

Extraction Technique of Differential Second Harmonic Output in CMOS $LC$ VCO

A technique to extract differential second harmonic output signals in a CMOS LC voltage-controlled oscillator (VCO) is introduced. In a cross-coupled n-type field effect transistor (NFET) and p-channel field effect transistor (PFET) VCO topology, the upper and lower common source nodes of the FET pairs can provide well-balanced differential second harmonic output by resonating the impedances at the common source nodes and operating the VCO in the voltage-limited regime. The idea is verified experimentally by implementing a 5.6-GHz CMOS VCO having a tunable impedance element at the common source node. The error signal power between the differential signals is measured to be -70dBm when properly tuned, which indicates almost perfect differentiality of the second harmonic output signals

Physics-Based Analysis and Simulation of Phase Noise in Oscillators

A technology computer-aided design framework that can predict the phase noise spectrum of an oscillator using nonlinear perturbation analysis is developed. The device-circuit mixed-mode simulation technique based upon the shooting-Newton method is exploited to evaluate the periodic steady-state solution of the oscillator. The influence of noise sources inside the devices on the phase deviation is calculated in an efficient and accurate way using the perturbation projection vector. The period jitter and the output power spectrum can be easily obtained in this framework. As an application, the output power spectrum of a CMOS LC voltage-controlled oscillator is calculated

A low-power low-phase-noise LC VCO with MEMS Cu inductors

A 2-3 GHz CMOS inductance-capacitance (LC) voltage-controlled oscillator (VCO) integrated with high-Q micro-electromechanical systems (MEMS) Cu inductors is reported. While dissipating only 6.3 mW, a phase noise of -121 dBc/Hz at 600 kHz offset from 2.78 GHz carrier is achieved. This MEMS VCO has the largest power-frequency normalized figure-of-merit (12.5 dB) among the Si bipolar and CMOS LC VCOs.

5-GHz CMOS LC VCOs with wide tuning ranges

A 4.8-GHz LC voltage-controlled oscillator (VCO) optimized for maximum tuning range was designed and fabricated using 0.25-/spl mu/m 1P5M CMOS process. The optimized design used an inverse proportionality between the two parasitic capacitances of the inductor and the MOS transistors for minimizing the parasitic capacitance at the oscillation node. The fabricated LC VCO has a wide tuning range of 20.3% from 4.32 GHz to 5.3 GHz with a power dissipation of 7.3 mW. This tuning range performance is comparable to, or better than, those of the reported CMOS LC VCOs in 5-GHz band. The measured phase noise is -82 dBc/Hz and -114.6 dBc/Hz at 100 KHz and 1-MHz offset, respectively.