Foundry CMOS Process Research Articles

Electrical Properties and Noise of Poly SiGe Deposited at Temperatures Compatible With MEMS Integration on Top of Standard CMOS

The rapid development of MicroElectroMechanical Systems (MEMS) implied monolithic integration of these devices with the driving, controlling and signal processing electronics on the same CMOS substrate as this can improve performance, yield and reliability as well as lower the manufacturing, packaging and instrumentation costs. The post-processing route (fabricating MEMS on top of CMOS) is preferred as it avoids introducing any changes in standard foundry CMOS processes. Depending on the specific metallization type and the design requirements, post-processing limits the maximum fabrication temperature of MEMS to 450°C or 520°C [1], as this avoids introducing any damage or degradation to interconnects. This temperature constraint is quite strict for post processing surface micromachined MEMS, as it might affect relevant physical properties of the active element of MEMS such as crystallization, growth rate, mechanical properties, dopant activation, electrical resistivity, etc.. Polycrystalline silicon germanium (poly SiGe) is an attractive material for such applications due to its low amorphous to polycrystalline transition temperature, which can be as low as 400°C (with the appropriate germanium content). Furthermore, the mechanical properties of poly SiGe proved to be suitable for surface micromachining application [2]. In addition it is compatible with standard IC fabrication process, and hence it enables monolithic integration of MEMS with the driving electronics.

A packaged 1.1-GHz CMOS VCO with phase noise of -126 dBc/Hz at a 600-kHz offset

A packaged 1.1-GHz CMOS voltage-controlled oscillator (VCO) with measured phase noise of -92, -112, and -126 dBc/Hz at 10-, 100-, and 600-kHz offsets is demonstrated. According to J. Craninekx et al. (1997), these satisfy the GSM requirements. The extrapolated phase noise at a 3 MHz offset is -140 dBc/Hz. The power consumption is 6.8 and 12.7 mW at V/sub DD/=1.5 and 2.7 V, respectively. The VCO is implemented in a low-cost 0.8-/spl mu/m foundry CMOS process, which uses p+ substrates with a p-epitaxial layer. Buried channel PMOS transistors are exclusively used for lower 1/f noise. The inductors for the LC tanks are implemented using a series combination of an on-chip spiral inductor, four bond wires, and two package leads to increase Q. This technique requires no extra board space beyond that needed for the additional package leads.

A 1.24-GHz monolithic CMOS VCO with phase noise of -137 dBc/Hz at a 3-MHz offset

For the first time, a 1.24-GHz CMOS voltage-controlled oscillator (VCO) with an integrated resonator which satisfies the Global System for Mobile communications (GSM) phase noise requirement at a 3-MHz offset is presented. The measured phase noise is -88, -125, and -137 dBc/Hz at 10-kHz, 600-kHz, and 3-MHz offsets, respectively. The VCO is implemented in a low-cost 0.8-/spl mu/m foundry CMOS process exclusively using pMOS transistors which have greater than one order of magnitude lower 1/f noise than that of nMOS transistors. The tuning range is /spl sim/130 MHz for the control voltages between 0.5 and 3.0 V. The VCO core runs on 22 mA from a 3-V power supply.

Integrated thermal-conductivity vacuum sensor

A thermal-conductivity vacuum sensor with a novel on-chip control system is presented. The sensing structure is a small circuit suspended over a cavity etched in the (100)-oriented silicon substrate. An integrated control system maintains a constant temperature difference between this thermally isolated sensor and the substrate. The control loop allows for a digitally adjustable operating temperature of the sensor. The sensitive range of the prototype vacuum sensor extends from 0.8 Pa (6 mtorr) to approximately 9.2 × 10 4 Pa (690 torr). The system has been fabricated in a completely unmodified foundry CMOS process, provides a current output, dissipates only 5 mW of power, and occupies an area of approximately 0.3 mm 2.

Diode-based thermal r.m.s. converter with on-chip circuitry fabricated using CMOS technology

A high-frequency root-mean-square (r.m.s.) converter composed of two matched thermal elements and on-chip circuitry has been fabricated in a foundry CMOS process with post-process micromachining techniques. An anisotropic undercut etch in conjunction with an electrochemical etch stop is used to form the thermal elements of the r.m.s. converter, which are suspended single-crystal silicon regions containing temperature-sensing diodes heated by polysilicon resistors. One of the elements is heated by the a.c. signal, while an integrated continuous-time feedback network maintains a second element at the same temperature. The converter has a packaging-limited — 3 dB bandwidth of 415 MHz, an r.m.s. dynamic range of 53 dB, nonlinearity of 1%, a quiescent power dissipation under 1 mW, and occupies an area of approximately 400 μm × 400 μm. The thermoelements have a thermal resistance of up to 37 000 K W −1 in air. In addition to the r.m.s. converter itself, an improved wet etchant chemistry is presented. Ammonium persulfate, when added to tetramethyl ammonium hydroxide (TMAH) silicon etchant, improves the silicon etch rate and the (100) surface quality. This etch chemistry should be useful for a broad range of CMOS-compatible micromachining applications.

CMOS foundry implementation of Schottky diodes for RF detection

Schottky diodes for RF power measurement were designed and fabricated using a commercial n-well CMOS foundry process through the MOSIS service. The Schottky diodes are implemented by modifying the SCMOS technology file of the public-domain graphics layout editor, MAGIC, or by explicitly implementing the appropriate CIF layers. The modifications allow direct contact of first-layer metal to the low-doped substrate. Current-voltage measurements showed that only the n-type devices had rectifying properties with a barrier height of 0.78 eV. The I-V results were verified by performing capacitance-voltage measurements on diodes of different contact-areas. The diodes were tested in an RF detector circuit. The cut off frequency of the detector was shown to be 600 MHz.

Silicon MOSFET distributed amplifier

The first reported integrated silicon MOSFET distributed amplifier is presented. A three stage distributed amplifier was fabricated on a standard 0.8 µm silicon CMOS foundry process and packaged in a SSO-24 plastic surface mount package. The required inductance needed for distributed amplification is realised by the parasitic inductance of the bond wires and lead frame inductance inside the plastic surface mount package. The distributed amplifier has a unity gain cutoff frequency of 4.7 GHz, a gain of 5 dB and an input referred third order intercept point of +15 dBm.

A micromachined low-power temperature-regulated bandgap voltage reference

This paper describes a temperature regulated bandgap voltage reference fabricated in a foundry CMOS process. Using a simple post-processing micromachining step, a small portion of the chip containing the reference circuitry is thermally isolated from the rest of the silicon die. Having high thermal resistance and small thermal mass, the reference requires 200 times less power and warms up 160 times faster than previous heated-substrate circuits. The reference, in a standard CMOS process, can be included on-chip with CMOS data converters and mixed-signal products.

CMOS active pixel image sensor

A new CMOS active pixel image sensor is reported. The sensor uses a 2.0 /spl mu/m double-poly, double-metal foundry CMOS process and is realized as a 128/spl times/128 array of 40 /spl mu/m/spl times/40 /spl mu/m pixels. The sensor features TTL compatible voltages, low noise and large dynamic range, and will be useful in machine vision and smart sensor applications.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>