CMOS Compatibility Research Articles

High performance and nearly wake-up free Hf0.5Zr0.5O2 ferroelectric capacitor realized by middle layer strategy with BEOL compatibility

Hf0.5Zr0.5O2(HZO) has drawn great attention owing to its excellent ferroelectricity, sub-10 nm scalability, and CMOS compatibility. With regard to increasingly restrict thermal budget and power consumption, conventional HZO films need further optimization to meet these demands. Here, we propose a middle layer (ML) strategy aiming to enhance ferroelectricity and inhibit wake-up effect of ferroelectric (FE) capacitors compatible with back-end of line under the low operating electric field. ZrO2, HfO2, and Al2O3were integrated into HZO film as different MLs. Among them, the device with ZrO2ML achieves the excellent double remnant polarization (2Pr) of 41.7μC cm-2under the operating electric field of 2 MV cm-1. Moreover, ultralow wake-up ratios of around 0.08 and 0.05 were observed under 2 MV cm-1and 3 MV cm-1, respectively. Additionally, the FE capacitor with ZrO2ML demonstrated an enhanced reliability characterizations, including a stable 2Prof 40.7μC cm-2after 4.3 × 109cycles. This work provides the perspective to optimize both the ferroelectricity and reliability, while maintains the ultralow wake-up ratio in HfO2-based FE through ML engineering.

(Invited) Engineering the Switching Kinetics of Valence Change-Based Memristive Devices for Neuromorphic Computing

Memristive devices based on the valence mechanism are highly interesting candidates for the use as hardware representation of synapses in neuromorphic computing. The memristive model system SrTiO3 exhibit gradual switching and can be tuned between short-term and long-term plasticity. We will discuss the impact of the switching kinetics on the gradual switching mode and provide general guidelines for the design of gradual switching systems. Moreover, we present an approach to accelerate the switching kinetics of SrTiO3 by up to 103 times, or reduce the operating voltage by ≈ 30% to maintain the switching speed.Our approach is to introduce a low thermal conductivity layer inside the active electrode of the active electrode of the devices, which blocks the heat dissipation caused by Joule heating during switching. Our method leaves the switching layer and its interfaces with the electrodes intact, while the use of HfO2 and TaOx as the heat blocking layers ensures ease of fabrication and CMOS compatibility. We will demonstrate that this approach is transferable to other more common material systems.

Effect of electrical stress on time dependent dielectric breakdown (TDDB) tolerate capability of HfO2–ZrO2 ferroelectric films with different thicknesses

HfO2-based ferroelectric materials as the most promising candidate for the ferroelectric memories, have been widely studied for more than a decade due to their excellent ferroelectric properties and CMOS compatibility. In order to realize its industrialization as soon as possible, researchers have been devoted to improving the reliability performance, such as wake up, imprint, limited endurance, et al. Among them, the breakdown characteristic is one of main failure mechanisms of HfO2-based ferroelectric devices, which limits the write/read reliability of the devices. Based on this, we systematically studied the effect of thickness on the time-dependent dielectric breakdown (TDDB) tolerate capability of HfO2–ZrO2 (HZO) FE films under both forward and reverse electrical stress conditions. The thickness of HZO FE film ranged from 6 to 20 nm. Our findings reveal that decreasing the thickness of the HZO FE film leads to an improvement in TDDB tolerance capability which is attributed to the fact that higher density of oxygen vacancies in thinner HZO FE films can effectively inhibit the generation of new oxygen vacancies and the growth of conductive filaments, thus effectively improving the TDDB characteristics. These results provide a potential solution for mitigating breakdown characteristics of HfO2-based ferroelectric devices in memory applications.

Design of mid-wave infrared achromatic double-layer metalens with enhanced efficiency

Achromatic metalenses in the mid-wave infrared (3–5 μm), known for their light weight, CMOS compatibility, and ultra-compactness, offer significant potential in astronomy, security inspections, and health security. However, previous endeavors have been hindered by underdeveloped material technology and relatively low efficiency. To address these challenges, this study introduces an enhanced-efficiency mid-wave infrared achromatic double-layer metalens, featuring a top-layer ZnS nanopillar array and a bottom-layer Si nanopillar array on a Si substrate. Utilizing this approach, we numerically demonstrate both polarization-insensitive and polarization-controlled varifocal broadband achromatic metalenses. For the polarization-insensitive metalens, the double-layer design provides achromatic focusing comparable to the all-Si counterpart, with a focal length of 133 µm, a focal length shift within ± 5.5%, and Strehl ratios above 0.8. However, the average focal efficiency improves from 40.8% (all-Si) to 50.2% (double-layer). Additionally, both all-Si and double-layer polarization-controlled varifocal achromatic metalenses show similar focusing abilities, with focal lengths of about 137 and 173 µm under X and Y linearly polarized light, respectively. Yet, the double-layer varifocal metalens achieves focal efficiencies of 46.4% and 52.7%, an improvement of 13.1% and 17.6% under X and Y linearly polarized light, respectively.

Fully solution-driven charge trapping synaptic transistor with low energy consumption for neuromorphic computing

Brain-inspired neuromorphic computing has garnered significant attention for going beyond the constraint of von Neumann architecture. To emulate the human brain functions, various artificial synaptic devices have been proposed. Due to the high reliability and the CMOS compatibility, the synaptic transistors based on charge trapping (CT) mechanism have been considered to be one of the most promising candidates. However, most of the synaptic transistors based on CT mechanism were fabricated by costly vacuum-based techniques. In this report, based on a fully solution-driven strategy, the InZnO synaptic transistors, with Nd2O3 as the CT layer and ZrO2 as the dielectric layer, were integrated. The typical synaptic behaviors, including excitatory postsynaptic current, inhibitory postsynaptic current, memory enhancement, potentiation, and depression characteristics, were simulated by modulating presynaptic spikes. It is confirmed that the fabricated synaptic transistor shows low channel conductance and low energy consumption of 0.13 pJ per synaptic event. A recognition accuracy of 93.0% was achieved for the MNIST handwritten digital image dataset by an artificial neural network simulation. This study demonstrates the feasibility of solution-processed synaptic transistors, which exhibit significant potential for the neuromorphic applications.

Aberration-corrected hybrid metalens for longwave infrared thermal imaging

Abstract Wide-angle metalenses in the longwave infrared have shown great advantages over the traditional refractive doublets or triplets, due to light weight, CMOS compatibility, and low cost. However, previous endeavors have been plagued by challenges including a narrow waveband, large F-number, distortion, and spherical aberration. To address these problems, this study introduces two dispersive metasurfaces, placed near the front focal plane and upon the rear plane of a plano-convex lens, to correct optical aberrations. Utilizing this methodology, we propose and experimentally demonstrate an aberration-corrected hybrid metalens for thermal imaging in the 8–12 μm waveband, featuring an FOV of 24°, F-number of 1.2, and diameter of 12.2 mm. The developed hybrid metalens rigorously evaluated, exhibits Modulation Transfer Function (MTF) values exceeding 0.2 at 20 Lp/mm across the full FOV, and features an average transmission of 48.7 %, a relative focusing efficiencies of up to 42.1 %, polarization insensitivity and broadband imaging capacity. These results emphasize the potential applications of our system in diverse fields, such as camera lenses, autonomous driving, healthcare, and environmental monitoring.

Phase-matched third-harmonic generation in silicon nitride waveguides.

Third-harmonic generation (THG) in silicon nitride waveguides is an ideal source of coherent visible light, suited for ultrafast pulse characterization, telecom signal monitoring and self-referenced comb generation due to its relatively large nonlinear susceptibility and CMOS compatibility. We demonstrate third-harmonic generation in silicon nitride waveguides where a fundamental transverse mode at 1,596 nm is phase-matched to a TM02 mode at 532 nm, confirmed by the far-field image. We experimentally measure the waveguide width-dependent phase-matched wavelength with a peak-power-normalized conversion efficiency of 5.78 × 10-7 %/W2 over a 660-μm-long interaction length.

Si-CMOS compatible epsilon-near-zero metamaterial for two-color ultrafast all-optical switching

Driven by the escalating demands of advanced technologies, developing integration strategies has kept pace with the realization of ultrafast components during the past two decades. Ultrafast all-optical switches enabled by artificial materials are considered at the forefront of the next generation of photonic integration for communications and high-volume data processing. Encouraged by these advancements, applications, and interest have increased toward all-optical switches based on epsilon-near-zero (ENZ) materials. However, some all-optical switches lack CMOS compatibility, require high energy activation, and are limited in switching speed and working wavelength. Here, we propose and demonstrate a multilayered ENZ metamaterial utilizing Si-compatible titanium nitride and indium-tin-oxide materials with two effective working wavelengths in the visible and near-infrared spectrum. This device enables switching time down to a few hundred femtoseconds utilizing minimal energy at the corresponding ENZ regions induced by intraband pumping. Our approach can enhance the adaptability of designing ENZ metamaterials for new hybrid integrated photonic components for low-power ultrafast all-optical terahertz modulation.

Revealing the Role of Spacer Layer in Domain Dynamics of Hf0.5Zr0.5O2 Thin Films for Ferroelectrics

AbstractHfO2‐based ferroelectrics offer promises for next‐generation nonvolatile nanoscale devices owing to excellent CMOS compatibility and robust ferroelectricity at the nanoscale. However, fundamentally understanding the mechanism of polarization reversal and domain dynamics is challenging because the role of the spacer layer at the domain level in HfO2‐based ferroelectrics remains elusive. Here, it is realized that visualization of time‐resolved dynamics of nanoscale domain configurations in the epitaxial Hf0.5Zr0.5O2 thin films using phase‐field simulations. Scale‐free domain independent switchability (namely, irreducible stable polar domain down to 1 nm lateral size) and sharp domain walls that originate from weak interactions between adjacent domains characterized by the reduced gradient energy coefficient, which unravels the mesoscale mechanism of spacer layer in domain dynamics are demonstrated. Meanwhile, it is revealed that 180° polarization switching is dominated by the nucleation of a new domain with a high nucleation density, well described by the nucleation‐limited switching model. This study not only provides a fundamental mesoscale mechanism of the spacer layer, but also stimulates further studies on the manipulation of ultra‐scaled single domain state for designing high‐density and fast‐speed HfO2‐based ferroelectric memory.

Optimizing the quality factor of InP nanobeam cavities using atomic layer deposition

Photonic crystal nanobeam cavities are valued for their small mode volume, CMOS compatibility, and high coupling efficiency-crucial features for various low-power photonic applications and quantum information processing. However, despite their potential, nanobeam cavities often suffer from low quality factors due to fabrication imperfections that create surface states and optical absorption. In this work, we demonstrate InP nanobeam cavities with up to 140% higher quality factors by applying a coating of Al2O3 via atomic layer deposition to terminate dangling bonds and reduce surface absorption. Additionally, changing the deposition thickness allows precise tuning of the cavity mode wavelength without compromising the quality factor. This Al2O3 atomic layer deposition approach holds great promise for optimizing nanobeam cavities that are well-suited for integration with a wide range of photonic applications.

Silicon photonic neuromorphic accelerator using integrated coherent transmit-receive optical sub-assemblies

Neural networks, having achieved breakthroughs in many applications, require extensive convolutions and matrix-vector multiplication operations. To accelerate these operations, benefiting from power efficiency, low latency, large bandwidth, massive parallelism, and CMOS compatibility, silicon photonic neural networks have been proposed as a promising solution. In this study, we propose a scalable architecture based on a silicon photonic integrated circuit and optical frequency combs to offer high computing speed and power efficiency. A proof-of-concept silicon photonics neuromorphic accelerator based on integrated coherent transmit–receive optical sub-assemblies, operating over 1TOPS with only one computing cell, is experimentally demonstrated. We apply it to process fully connected and convolutional neural networks, achieving a competitive inference accuracy of up to 96.67% in handwritten digit recognition compared to its electronic counterpart. By leveraging optical frequency combs, the approach’s computing speed is possibly scalable with the square of the cell number to realize over 1 Peta-Op/s. This scalability opens possibilities for applications such as autonomous vehicles, real-time video processing, and other high-performance computing tasks.

Enhanced polarization switching characteristics of HfO2 ultrathin films via acceptor-donor co-doping

In the realm of ferroelectric memories, HfO2-based ferroelectrics stand out because of their exceptional CMOS compatibility and scalability. Nevertheless, their switchable polarization and switching speed are not on par with those of perovskite ferroelectrics. It is widely acknowledged that defects play a crucial role in stabilizing the metastable polar phase of HfO2. Simultaneously, defects also pin the domain walls and impede the switching process, ultimately rendering the sluggish switching of HfO2. Herein, we present an effective strategy involving acceptor-donor co-doping to effectively tackle this dilemma. Remarkably enhanced ferroelectricity and the fastest switching process ever reported among HfO2 polar devices are observed in La3+-Ta5+ co-doped HfO2 ultrathin films. Moreover, robust macro-electrical characteristics of co-doped films persist even at a thickness as low as 3 nm, expanding potential applications of HfO2 in ultrathin devices. Our systematic investigations further demonstrate that synergistic effects of uniform microstructure and smaller switching barrier introduced by co-doping ensure the enhanced ferroelectricity and shortened switching time. The co-doping strategy offers an effective avenue to control the defect state and improve the ferroelectric properties of HfO2 films.

Observing ferroelastic switching in Hf0.5Zr0.5O2 thin film

Abstract Hafnium zirconium oxides (HZO), which exhibit ferroelectric properties, are promising materials for nanoscale device fabrication due to their high CMOS compatibility. In addition to piezoelectricity, ferroelectricity, and flexoelectricity, this study reports the observation of ferroelasticity using piezoelectric force microscopy (PFM) and scanning transmission electron microscopy (STEM). The dynamics of 90° ferroelastic domains in HZO thin films are investigated under the influence of an electric field. Switching of the retentive domains is observed through repeated wake-up measurements. This study presents a possibility of enhancing polarization in HZO thin films during wake-up processes.

Unveiling the reliability of negative capacitance FinFET with confrontation of different HfO2-ferroelectric dopants

The CMOS compatibility of Negative Capacitance (NC) FETs has been enhanced tremendously after introducing a thin film-doped HfO2 as a ferroelectric (FE) layer. For a given FE layer, the NC property is governed by specific HfO2 dopants (e.g., La, Zr, Al, Sr, Gd, Y, and Si). Thus, the TCAD simulation considerably depends on the dopant-specific Landau parameters (αx,βx,γx,ρx,gx), and its solidity needs proper attention. Further, the reliability of the NC devices is severely affected by process variations, i.e., interface trap charges, work function variation, random dopant fluctuation, and ambient temperature (external), which modulates the device threshold voltage (Vth); in turn, the device aging. In this paper, using well-calibrated TCAD models, we investigated reliability for the different dopant-specific NC-FinFET, in terms of Vth, ON current (ION), and OFF current (IOFF) modulation induced by: (i) the interface trap variability (ITV) considering the different trap concentration and energy location; (ii) the work function variability (WFV) considering different metal grain sizes (Gr); (iii) the random dopant fluctuations (RDF); and (iv) the ambient temperature. In this way, the device aging is calculated by inspecting Vth shift by ±50mV. These investigations pave the path for realizing a reliable NC-FinFET design.

The stochastic ferroelectric field-effect transistors-based probabilistic-bits: from device physics analysis to invertible logic applications

A probabilistic-bit (p-bit) is the fundamental building block in the circuit network of probabilistic computing (PC), producing a continuous random bitstream with tunable probability. Among the various p-bit designs, the recently proposed ferroelectric FET (FeFET)-based p-bit is found to possess the advantages of both ultralow hardware cost and CMOS compatibility. In this work, we perform a comprehensive analysis of the stochasticity in ferroelectric (FE) material, revealing the mechanisms of domain dynamics and temperature on FE stochasticity. The device-to-device variations of several device/material properties are then evaluated, which affect the probabilistic-curves to different extents. Furthermore, the integer factorization is performed based on the invertible logic circuits comprising of FE p-bits to verify its functionality. The accuracy of integer factorization is found to highly depend on FE p-bits’ stochasticity, and various methods have been implemented to optimize its performance, providing unique insights for future large-scale PC applications.

Non-hermiticity in spintronics: oscillation death in coupled spintronic nano-oscillators through emerging exceptional points

The emergence of exceptional points (EPs) in the parameter space of a non-hermitian (2D) eigenvalue problem has long been interest in mathematical physics, however, only in the last decade entered the scope of experiments. In coupled systems, EPs give rise to unique physical phenomena, and enable the development of highly sensitive sensors. Here, we demonstrate at room temperature the emergence of EPs in coupled spintronic nanoscale oscillators and exploit the system’s non-hermiticity. We observe amplitude death of self-oscillations and other complex dynamics, and develop a linearized non-hermitian model of the coupled spintronic system, which describes the main experimental features. The room temperature operation, and CMOS compatibility of our spintronic nanoscale oscillators means that they are ready to be employed in a variety of applications, such as field, current or rotation sensors, radiofrequeny and wireless devices, and in dedicated neuromorphic computing hardware. Furthermore, their unique and versatile properties, notably their large nonlinear behavior, open up unprecedented perspectives in experiments as well as in theory on the physics of exceptional points expanding to strongly nonlinear systems.

Texture in atomic layer deposited Hf0.5Zr0.5O2 ferroelectric thin films

HfO2-based ferroelectric materials have excellent CMOS compatibility and polarization even in ultrathin films, which is regarded as promising candidate material for memory devices and related electronic devices. However, as the ferroelectric layer thickness scaling down, the consistency of device performance is inevitably affected by the complex polyphase and polycrystalline nature of HfO2-based ferroelectric thin films. Therefore, obtaining and controlling the texture of HfO2-based ferroelectric thin films is extremely important for regulating polarization orientation and improving ferroelectric polarization. In this work, 10 nm Hf0.5Zr0.5O2 (HZO) films were prepared by atomic layer deposition (ALD) on Nb-doped SrTiO3 (NSTO) single crystal substrates. The texture and orientation of HZO films were analyzed through the state-of-the-art spherical aberration corrected transmission electron microscope (Cs-TEM) technique. The domain matching epitaxy between HZO films and NSTO substrate helps eliminate lattice mismatch and residual misfit strain, and ultimately leads to the formation of <112> texture in HZO ferroelectric films. The obtained results represent lattice and interface play an extremely important role in regulating the ferroelectricity of HfO2-based films, which provides a way to design ultra-thin HfO2-based materials with excellent ferroelectric polarization by controlling the crystal structure and orientation.

A Nanoscale Bistable Resistor for an Oscillatory Neural Network.

Coupled oscillators construct an oscillatory neural network (ONN) by mimicking the interactions among neurons in the human brain. This work demonstrates a fully CMOS-based oscillator consisting of a bistable resistor (biristor), which shares a structure identical with that of a metal-oxide-semiconductor field-effect transistor, except for the use of a gate electrode. The biristor-based oscillator (birillator) generates oscillating voltage signals in the form of spikes due to a single transistor latch phenomenon. When two birillators are connected with a coupling capacitor, they become synchronized with a phase difference of 180°. These coupled oscillation characteristics are experimentally investigated for an ONN. As practical applications of the ONN with coupled birillators, edge detection and vertex coloring are conducted by encoding information into phase differences between them. The proposed fully CMOS-based birillators are advantageous for low power consumption, high CMOS compatibility, and a compact footprint area.

High efficiency graphene-silicon hybrid-integrated thermal and electro-optical modulators.

Graphene modulators are considered a potential solution for achieving high-efficiency light modulation, and graphene-silicon hybrid-integrated modulators are particularly favorable due to their CMOS compatibility and low cost. The exploitation of graphene modulator latent capabilities remains an ongoing endeavour to improve the modulation and energy efficiency. Here, high-efficiency graphene-silicon hybrid-integrated thermal and electro-optical modulators are realized using gold-assisted transfer. We fabricate and demonstrate a microscale thermo-optical modulator with a tuning efficiency of 0.037 nm mW-1 and a high heating performance of 67.4 K μm3 mW-1 on a small active area of 7.54 μm2 and a graphene electro-absorption modulator featuring a high speed data rate reaching 56 Gb s-1 and a low power consumption of 200 fJ per bit. These devices show superior performance compared to the state of the art devices in terms of high efficiency, low process complexity, and compact device footage, which can support the realization of high-performance graphene-silicon hybrid-integrated photonic circuits with CMOS compatibility.

Hybrid III-V/Silicon photonic circuits embedding generation and routing of entangled photon pairs

Hybrid photonic devices, harnessing the advantages of multiple materials while mitigating their respective weaknesses, represent a promising solution to the effective on-chip integration of generation and manipulation of non-classical states of light encoding quantum information. We demonstrate a hybrid III-V/Silicon quantum photonic device combining the strong second-order nonlinearity and compliance with electrical pumping of the III-V semiconductor platform with the high maturity and CMOS compatibility of the silicon photonic platform. Our device embeds the spontaneous parametric down-conversion (SPDC) of photon pairs into an Al-GaAs source and their subsequent routing to a silicon-on-insulator circuitry. This enables the on-chip generation of broadband telecom photon pairs by type 0 and type 2 SPDC from the hybrid device, at room temperature and with strong rejection of the pump beam. Two-photon interference with 92% visibility proves the high energy-time entanglement quality characterizing the produced quantum state, thereby enabling a wide range of quantum information applications.