class-D Amplifier Research Articles

A 2.4 GHz Power Receiver Embedded With a Low-Power Transmitter and PCE of 53.8%, for Wireless Charging of IoT/Wearable Devices

This article presents a 2.4 GHz and high-efficiency wireless power receiver (Rx) integrated with a low-power transmitter (Tx) for wireless charging of the Internet-of-Things (IoT) or wearable devices. A single pole double throw (SPDT) circuit isolates the operation of the Rx from Tx, thereby offering the capability of sharing antenna between them. The Rx employs a high-efficiency radio frequency (RF)-dc converter, which is facilitated with threshold voltage cancellation technique for enhancing the efficiency, and adjustable internal impedance matching network to compensate the nonlinear behavior of the input impedance with respect to input power level. In addition, it includes a boost dc-dc converter to charge the storage element with a fixed voltage and current. The Tx utilizes a low-power phase-locked loop (PLL) and a class-D power amplifier (PA). Several techniques are adopted to achieve low power consumption. The chip is implemented in a 180 nm CMOS process with a die size of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2.3\,\,\mathrm {mm} \times 5\,\,\mathrm {mm}$ </tex-math></inline-formula> . The Rx shows the measured RF to dc maximum power conversion efficiency (PCE) of 53.8% at the input power level of 0 dBm. The Tx achieves a variable output power range of −10 to 10 dBm, while consumes 4 and 23 mA at 0 and 10 dBm output power, respectively.

A 6.78 MHz Single-Stage Wireless Power Transmitter Using a 3-Mode Zero-Voltage Switching Class-D PA

A 6.78 MHz single-stage transmitter (TX) using a reconfigurable regulating class-D power amplifier (PA) for wireless power transfer (WPT) applications is presented. Based on a 3-mode modulation scheme, the TX achieves power regulation and transmission with only one power stage. A discontinuous-conduction-mode (DCM) zero-voltage switching (ZVS) scheme is adopted to reduce switching loss. A control loop is set to regulate the output voltage of the WPT receiver (RX) by automatically adjusting the transmitting power. With dual-loop control and a proportional-integral (PI) compensation scheme, the loop achieves tight regulation and fast response. The controller is implemented digitally to benefit from the AirFuel <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">®</sup> embedded Bluetooth communication link. The PA was fabricated with a high-voltage 0.35 μm CMOS process, and the digital controller with a standard 0.35 μm CMOS process, respectively. Measurement results show that the output voltage of the RX was correctly regulated to 11.7 V under a load change of 50mA to 500mA, and the WPT system could deliver a maximum power of 7.3 W to the RX over a distance of 4.0 cm, and achieved TX to RX peak efficiency of 57.3%.

Endocavity Histotripsy for Efficient Tissue Ablation-Transducer Design and Characterization.

A 34-mm aperture transducer was designed and tested for proof of concept to ablate tissues using an endocavity histotripsy device. Several materials and two drivers were modeled and tested to determine an effective piezoelectric-matching layer combination and driver design. The resulting transducer was fabricated using 1.5 MHz porous PZT and PerFORM 3-D printed acoustic lenses and was driven with a multicycle class-D amplifier. The lower frequency, compared to previously developed small form factor histotripsy transducers, was selected to allow for more efficient volume ablation of tissue. The transducer was characterized and tested by measuring pressure field maps in the axial and lateral planes and pressure output as a function of driving voltage. The axial and lateral full-width-half-maximums of the focus were found to be 6.1 and 1.1 mm, respectively. The transducer was estimated to generate 34.5-MPa peak negative focal pressure with a peak-to-peak driving voltage of 1345 V. Performance testing was done by ablating volumes of bovine liver tissues ( n = 3 ). The transducer was found to be capable of ablating tissues at its full working distance of 17 mm.

Five‐level class‐D amplifier employing fourth‐order continuous‐time sigma‐delta modulator

A new closed-loop multi-level Class-D amplifier employing a fourth-order ‘continuous-time sigma-delta modulator’ is proposed and analysed. The proposed amplifier is intrinsically linear and it has approximately the fixed ‘total harmonic distortion plus noise’ against the input frequency. The corresponding circuit is designed and simulated in 180 nm technology (3.3 V), while the post-layout model of the power stage is employed. A total harmonic distortion plus noise of 0.0016%, the quiescent current of 2.6 mA, the maximum efficiency of 94%, the average switching frequency of 400∼500 kHz and an excellent ‘power supply reject ration’ of 120 dB are achieved.

A High-Linearity and Low-EMI Multilevel Class-D Amplifier

This article presents a Class-D audio amplifier for automotive applications. Low electromagnetic interference (EMI) and, hence, smaller LC filter size are obtained by employing a fully differential multilevel output stage switching at 4.2 MHz. A modulation scheme with minimal switching activity at zero input reduces idle power, which is further assisted by a gate-charge reuse scheme. It also achieves high linearity due to the high loop gain realized by a third-order feedback loop with a bandwidth of 800 kHz. The prototype, fabricated in a 180-nm high-voltage BCD process, achieves a minimum THD+N of -107.8 dB/-102 dB and a peak efficiency of 91%/87% with 8- and 4-Ω loads, respectively, while drawing 7-mA quiescent current from a 14.4-V supply. The prototype meets the CISPR 25 Class 5 EMI standard with a 5.7-dB margin using an LC filter with a cutoff frequency of 580 kHz.

Switched Capacitor Compensation of Supply Distortion in Class-D Amplifiers

This paper presents a switched capacitor technique for bus-pumping compensation in a half-bridge class-D amplifier. The proposed approach, in addition to the almost complete reduction of the bus-pumping effect, allows the half-bridge class-D amplifier to preserve maximum energy efficiency. The studied hardware implementation of the proposed technique demonstrates its advantages of high efficiency, simple circuit, and low cost. The principal design and operating principles are analyzed and described. The experimental static characteristics and time-domain waveforms for the proposed technique are shown to verify its feasibility.

Using pulse width modulation with carrier frequency changing for transmission of two separate signals

Pulse width modulation (PWM) is widely used in different applications. PWM transforms the information in the amplitude of a bounded input signal into the pulse width output signal without suffering from quantization noise. The frequency of the output signal is usually constant. In this paper, the new PWM system with frequency changing (PWMFM) is described. In such PWMFM the pulse width and also the carrier frequency are changed. Therefore, two independent pieces of information can be simultaneously transmitted over one channel; hence PWM and frequency modulation (FM) are simultaneously used. But such system needs 2 demodulators, one for PWM and the second for FM. PWMFM can be used in the following applications: LED light intensity control via PWM and several LED block switching by FM PWMFM is highly useful in motor speed control applications by PWM and direction of rotation with FM. PWMFM can be used also in a class-D audio amplifier for power control, e.g. coarse by means of FM and fine by PWM. PWMFM can be used for the simultaneous transmission of two independent information between all, mutual combinations of analog and digital circuits. The analog and digital circuits for modulation and demodulation of PWMF signal are described and measuring results are presented in this work.

A 28-W, −102.2-dB THD+N Class-D Amplifier Using a Hybrid ΔΣM-PWM Scheme

This article presents a 28-W class-D amplifier for automotive applications. The combination of a high switching frequency and a hybrid multibit AΣM-PWM scheme results in high linearity over a wide range of output power, as well as low AM-band EMI. As a result, only a small (150-kHz cutoff frequency), and thus low-cost, LC filter is needed to meet the CISPR-25 EMI average limit (150 kHz-30 MHz) with 10-dB margin. At 28-W output power, the proposed amplifier achieves 91% efficiency while driving a 4-Ω load from a 14.4-V supply. It attains a peak THD+N of 0.00077% (-102.2 dB) for a 1-kHz input signal.

An Energy-Efficient Integration of a Digital Modulator and a Class-D Amplifier

Energy consumption is always a key feature in devices powered by electric accumulators. The power amplifier is the most energy-demanding module in mobile devices, portable appliances, static transceivers, and even nodes used in underwater acoustic networks. These devices incorporate a modulator, typically a pulse-width modulation (PWM) and a class-D power amplifier, for higher efficiency. We propose a technique to integrate the modulator of a transmitter and PW-modulator of a class-D amplifier to improve the overall efficiency of the system. This integrated set operates as an up-converter, phase modulator (PM), and binary phase-shift keying (BPSK) modulator under certain conditions. The theoretical concept is verified using Matlab and a model is designed and simulated in Simulink. For validation purposes, an electronic circuit is built and tested using Multisim. The results obtained by simulations and circuit implementation show that the proposed integrated system is an energy-efficient and cost-effective solution compared to conventional techniques.

Robust Multilayer Model Predictive Control for a Cascaded Full-Bridge NPC Class-D Amplifier With Low Complexity

Model predictive control (MPC) has the advantages of good dynamic performance and the ability to handle multiple control objectives and constraints. However, it suffers from large amount of calculation and high dependence on system model when it is applied to cascaded inverters. In this article, to solve this problem, a robust multilayer MPC (RM-MPC) with strong robustness and less computation is proposed for Class-D amplifier using cascaded full-bridge NPC inverter. A Kalman filter-based disturbance observer is designed to estimate the lumped disturbance caused by the mismatches of the load parameters, which allows to implement robust control by compensating the disturbance to the predictive model during each control period. In the upper layer of the multilayer MPC, the control objectives that are linear with the output level are handled centrally, which allows the optimal level to be obtained directly without repetitive predictions and evaluations. The middle layer is used to allocate the optimal level to each submodule. And the lower layer is used to determine the switching state of each submodule. Finally, the feasibility and validity of the RM-MPC are verified on the designed experimental prototype.

High Efficiency Half Bridge Class-D Audio Amplifier System With Front-End Symmetric Bipolar Outputs LLC Converter

A high efficiency half bridge class-D audio amplifier (HB-CDAA) system with symmetric bipolar outputs LLC converter as front-end power supply is proposed and studied in this article. Symmetric bipolar outputs LLC converter provides symmetric bipolar outputs for the HB-CDAA system. The operation modes of class-D amplifier system with front-end bipolar outputs LLC converter in an audio frequency cycle are analyzed, and the effects of HB-CDAA on the operation of its front-end bipolar outputs LLC converter in a switching cycle are studied. It is found that class-D audio amplifier produces voltage pumping on bipolar output voltages in both positive and negative audio frequency cycle, which seriously affects the operation and the efficiency of its front-end bipolar outputs LLC converter and class-D amplifier. Soft switching of bipolar outputs LLC converter can be realized both in the positive and negative audio frequency cycle, which improves efficiency of the proposed HB-CDAA system. A 100 W prototype is built and experimental results show that front-end bipolar outputs LLC converter can provide symmetric bipolar outputs, and realize soft switching. The experimental results also show that voltage pumping on bipolar outputs seriously affects efficiency of the LLC converter. Efficiency of the LLC converter will increase with the decrease of voltage pumping.

A Fully Integrated Compact Outphasing CMOS Power Amplifier Using a Parallel-Combining Transformer with a Tuning Inductor Method

This work presents a compact on-chip outphasing power amplifier with a parallel-combining transformer (PCT). A series-combining transformer (SCT) and PCT are analyzed as power-combining transformers for outphasing operations. Compared to the SCT, which is typically used for on-chip outphasing combiners, the PCT is much smaller. The outphasing operations of the transformer combiners and class-D switching PAs are also analyzed. A tuning inductor method is proposed to improve the efficiency of class-D power amplifiers (PAs) with power-combining transformers in the out-of-phase mode. The proposed PA was implemented with a standard 0.18 µm CMOS process. The measured maximum drain efficiency is 37.3% with an output power of 22.4 dBm at 1.7 GHz. A measured adjacent channel leakage ratio (ACLR) of less than −30 dBc is obtained for a long-term evolution (LTE) signal with a bandwidth of 10 MHz.

Design of Class D Audio Power Amplifier Suitable to Hearing Aid Devices

An amplifier is an electronic circuit that improves the strength of the signal. Using an amplifier in an audio system is essential to improve the strength of the signal. Based on different applications and specifications different types of amplifiers are used. Generally in an audio system, the input signal is amplified to a minimum required power level and then the speaker is driven by it. Conventionally, the output stage of an audio amplifier uses Class-A or Class-AB operating in a linear transfer region. The power efficiency of the Class-D amplifier has a better output efficiency compared to Class-A and Class-AB amplifiers, and its distortion is lower than that of the Class-C amplifier. This is based on a known fact that the Class D amplifier has a switching action in which the transistors are either completely on or off. As a result, the amplification is achieved with no power dissipation. Hence, the size of the amplifier can be highly reduced and a smaller heat sink is required. This paper focuses on designing a Class-D power amplifier which is suitable for hearing aid devices to deliver 500mW output power and for the THD to be less than 3%. The circuit implementation is done using UMC high voltage 0.18μm technology. This amplifier consists of three stages such as the modulation stage, the driver stage, the bridge stage, and the demodulation stage. Unfortunately, the Class-D power amplifier has inherent non-linear distortion problems, which is more significant than conventional audio power amplifiers. In this thesis, negative feedback is employed to reduce THD. Without feedback, the THD is obtained as above 3%. By employing feedback, the THD was reduced by 1.96dB. This design result is discussed and through to realization; whereupon the effectiveness of each of the implementation is evaluated.

Bipolar Phase Shift Modulation Single-Stage Audio Amplifier Employing a Full Bridge Active Clamp for High Efficiency Low Distortion

Two-stage power conversion of class-D amplifier with front-end switching mode power supply affects the power conversion efficiency of audio amplifier system. Single-stage inverter (SSI) developed from cycloconverter can be used as audio amplifier to improve efficiency. However, current commutation of cycloconverter switches challenges for high efficiency and low total harmonic distortion (THD). In this article, a bipolar phase shift modulation (BPSM) SSI is proposed for high efficiency low distortion audio amplification. Full bridge active clamp (FBAC) circuit is used to clamp the voltage across cycloconverter switches and recycle the energy of filter inductor and leakage inductance. By using active clamp, utilization of magnetizing inductance current and optimization of driving sequence of clamp switches, zero voltage switching of the proposed BPSM FBAC-SSI is achieved over wide range. With BPSM and voltage clamp across cycloconverter switches, low THD of output voltage is also achieved. A 200 kHz prototype with 250 W output power is presented to verify the analysis results of the proposed BPSM FBAC-SSI.

Self-Tuned Class-D Audio Amplifier With Post-Filter Digital Feedback Implemented on Digital Signal Controller

This article describes the designing process of a low-cost class-D audio amplifier with digitized global feedback after the output filter, using a signal microcontroller. Various approaches to the feedback-based distortions elimination of class-D amplifiers are discussed. Hardware architecture of the author’s designed class-D amplifier with digital audio input interface, output voltage feedback path relays on SAR-ADC, and output power stage in multiphase bridge tide load configuration is shown. The selection method of the output low-pass filter parameters and power stage phase count was explained. A model of class-D amplifier with PID digital compensator and control loop interfaces is presented. Efficient high-speed digital PID compensator implementation on fixed-point 16-bit DSP core is exhibited. Procedure for control loop gain and phase plots measurements and self-tuning of PID feeding under damped second-order plants is presented along with simulations of loop properties influences on tuning effects. The results of the prototype device measurements such as Bode plots or output voltage frequency spectrum are presented. A big effort has been put on a useful, complete and transparent description for the development process of the presented class-D amplifier arrangement. The described class-D amplifier is the first solution with single feedback control from the output of LC filter based on a microcontroller with embedded ADC and PWM hardware with ensuring full audio bandwidth reproduction width THD distortion level below 0.25% at 1 kHz. The amplifier has been designed with the solicitude of device cost by using low-volume inductors in the output filter and by utilization of the built-in microcontroller ADC and PWM interfaces.

High-Efficiency Power Amplifier for 1.8 MHz: The Development of a Class-E PA With Components for High Efficiency

High efficiency is especially important for portable equipment and other applications where low power consumption is required. Consequently, power efficiency has been thoroughly discussed and investigated over the past few decades [7]. From this research, a number of different approaches and technologies have evolved for power amplifiers (PAs) and used in many applications that require high RF power, including those involving radar, medicine, space systems, wireless power transfer systems, and ham radio. Class-E and class-F amplifiers, like class-D and Doherty amplifiers, for example, are often chosen to provide high efficiency with relatively few components.

Discrete State Event-Driven Framework With a Flexible Adaptive Algorithm for Simulation of Power Electronic Systems

Accurate and efficient simulation of power electronic systems is challenging due to their hybrid nature consisting of continuous states and discrete events. In this paper, a comprehensive discrete state event-driven (DSED) framework is proposed for offline simulation of such hybrid dynamic systems. Two key elements of the proposed comprehensive DSED simulation framework that contribute to the significant improvements in numerical accuracy and computational efficiency are a flexible adaptive algorithm for flexible integration of continuous states and an event-driven mechanism for efficient locating of discrete events. The proposed DSED simulation framework is applied to a 50-kVA solid-state transformer and a multileg full-bridge Class-D amplifier to verify its accuracy and efficiency by comparisons with experimental waveforms and simulated waveforms of Simulink and PLECS. Up to 100-fold and 10-fold improvements in simulation speed are achieved at the same level of numerical accuracy compared with Simulink and PLECS, respectively.

EMI Reduction in Class-D Amplifiers by Actively Reducing PWM Ripple

Class-D amplifiers switch high voltages and currents at high frequencies and hence produce electromagnetic interference (EMI). This work presents a technique to reduce the high frequency ripple, which is still present after the output filter. A Class-A ripple reduction amplifier is put in parallel to the output of the Class-D amplifier, each having their own feedback loop with digital filters. High ripple reduction loop gain is achieved at the PWM frequency by using a resonator as digital loop filter. Dissipation in the Class-A amplifier is reduced by using a low common-mode signaling technique. Common-mode and differential-mode switching components at the PWM frequency are reduced by 27 dB and 18 dB respectively. Total system efficiency is 79% at 40 W output power.

Robust Two-Layer Model Predictive Control for Full-Bridge NPC Inverter-Based Class-D Voltage Mode Amplifier

Finite control set model predictive control (FCS-MPC) is able to handle multiple control objectives and constraints simultaneously with good dynamic performance. However, its industrial application is limited by its high dependence on system model and the huge computational effort. In this paper, a novel robust two-layer MPC (RM-MPC) with strong robustness is proposed for the full-bridge neutral-point clamped (NPC) voltage mode Class-D amplifier (CDA) aiming at this problem. The errors caused by the parameter mismatches or uncertainties of the LC filter and the load current are regarded as lumped disturbance and estimated by the designed Luenberger observer. The robust control can be achieved by compensating the estimated disturbance to the used predictive model. In order to reduce computation of the controller, a two-layer MPC is proposed for the full-bridge NPC inverter with an LC filter. The first layer is used to calculate the optimal output level which minimizes the tracking error of the output voltage. The second layer is used to determine the switching state for the purpose of capacitor voltage balancing. The experimental results show that the lumped model error is observed centrally through only one observer with low complexity. The two-layer MPC further reduced the computation without affecting the dynamic performance.

A Reconfigurable Cross-Connected Wireless-Power Transceiver for Bidirectional Device-to-Device Wireless Charging

This paper presents a reconfigurable cross-connected (CC) wireless power transceiver (TRX) operating at 6.78 MHz and implemented for bidirectional device-to-device (D2D) charging with high efficiency and small system volume. We propose, for the first time, a CC topology applied to a differential class-D power amplifier for significant switching loss reduction. Two delay-locked loops (DLLs) for each power NMOS transistor form the reconfigurable controller, realizing the adaptive deadtime control in the transmitter (TX) mode and the off-delay compensation in the receiver (RX) mode, leading to high power conversion efficiency and safe operation. To realize the inductive load for the TX mode in the whole coupling range at the resonant frequency, we use an on-chip tunable capacitor. Furthermore, we also study the power link efficiency in the D2D direct charging system and verify that the near-maximum power link efficiency can be inherently achieved in this scenario. The proposed wireless power TRX, fabricated in a 0.35- $\mu \text{m}$ CMOS process with 5-V devices, measured a peak D2D total efficiency of 77.2% when the output power is 0.7 W. The maximum charging power is 2.74 W with a total efficiency of 62.7% and the maximum transmission distance is 24 mm, both measured.