Circular Spiral Inductors Research Articles

Accurate modeling of monolithic inductors using conformal meshing for reduced computation

Accurate component modeling is a key factor to successful wireline and wireless circuit design in Si/SiGe BiCMOS and RF CMOS. This article presents the application of two planar electromagnetic simulation methods for reducing the memory and computation time requirement for accurate simulation of inductors fabricated with thick analog metal layers. First, a conformal subsectioning technique is briefly discussed in the context of reducing the numerical complexity of octagonal and circular spiral inductor analysis. Second, this article discusses a method for determining if more than a two-sheet model of thick metals is needed for accurate inductor simulation. Finally, the conformal mesh is applied to a 3.3-nH inductor fabricated using the IBM 0.13-/spl mu/m RF CMOS process technology. The simulated and measured results are compared.

Polydimethylsiloxane-based pattern transfer process for the post-IC integration of MEMS onto CMOS chips

This paper presents a novel pattern transfer process of LIGA and UV-LIGA MEMS onto CMOS chips using polydimethylsiloxane (PDMS) replication and electroplating-based post-IC integration techniques. An array of cylindrical posts was fabricated by the standard LIGA process and an inverse replica was made using a PDMS replication technique. The replicated PDMS mold was used to transfer the LIGA MEMS onto a CMOS chip using electroplating. For the pattern transfer of UV-LIGA MEMS onto CMOS chips, double-layered circular spiral inductors were fabricated using the UV-LIGA technique as metallic master molds. Inverse replicas of the inductors were built in PDMS as double-layered PDMS electroplating mold (PEM). This PEM was aligned and attached onto the chips, and electroplating was performed to transfer the metallic UV-LIGA MEMS inductors onto the chips. The transferred inductors showed a self-resonant frequency of 7.5 GHz, an inductance of 2.11 nH, and a Q-factor of 78.9 at 0.6 GHz.

High Performance RF Passive Integration on a Si Smart Substrate for Wireless Applications

To achieve cost and size reductions, we developed a low cost manufacturing technology for RF substrates and a high performance passive process technology for RF integrated passive devices (IPDs). The fabricated substrate is a conventional 6' Si wafer with a 25 μm thick Sio 2 surface. This substrate showed a very good insertion loss of 0.03 dB/mm at 4 GfIz, including the conductive metal loss, with a 50 Ω coplanar transmission line (W=50 μm, G=20 μm). Using benzo cyclo butene (BCB) interlayers and a 10 μm Cu plating process, we made high Q rectangular and circular spiral inductors on Si that had record maximum quality factors of more than 100. The fabricated inductor library showed a maximum quality factor range of 30-120, depending on geometrical parameters and inductance values of 035-35 nH. We also fabricated small RF IPDs on a thick oxide Si substrate for use in handheld phone applications, such as antenna switch modules or front end modules, and high-speed wireless LAN applications. The chip sizes of the wafer-level-packaged RF IPDs and wire-bondable RF IPDs were 1.0-1.5 mm 2 and 0.8-1.0 mm 2 , respectively. They showed very good insertion loss and RF performances. These substrate and passive process technologies will be widely utilized in hand-held RF modules and systems requiring low cost solutions and strict volumetric efficiencies.

High-performance inductors

In this paper, we describe the design, test data, and analysis of several circular spiral inductors fabricated on GaAs substrates using the multifunction self-aligned gate multilayer process. Various factors such as high inductance, high-quality and, high current handling capacity, and compactness are studied. Several configurations for inductors were investigated to optimize the inductor geometry such as the linewidth, spacing between the turns, conductor thickness, and inner diameter. It includes measured effects of various parameters on inductor performance, such as linewidth, spacing, inner diameter, metal thickness, underlying dielectric, and dielectric thickness. It is shown experimentally that the Q factor of spiral inductors can be enhanced by using 9-/spl mu/m-thick metallization and placing inductors on a 10-/spl mu/m-thick polyimide layer, which is placed on top of the GaAs substrate. Using this technique, we have observed up to 93% improvement in the Q factor of circular spiral inductors, as compared to standard spiral inductors fabricated on GaAs substrates. Inductors having thick metallization can also handle dc currents as large as 0.6 A.

Accurate modeling of high-Q spiral inductors in thin-film multilayer technology for wireless telecommunication applications

In the current trend toward portable applications, high-Q integrated inductors are gaining a lot of importance. Using thin-film multilayer or multichip-module-deposition technology, high-Q circular inductors for RF and microwave applications may be integrated efficiently. Their quality factors may go up to over 100. In this paper, an accurate analytical model for such multiturn circular spiral inductors embedded in a thin-film multilayer topology is presented. Starting from the geometrical parameters, the model provides an accurate prediction of the inductance value, Q factor and frequency behavior of the inductor. This allows a "first-time-right?" realization of the integrated component and provides opportunities for fast optimization of the inductors. Finally, the presented high-Q inductors have been used in various integrated RF and microwave subsystems for wireless applications, of which a number are discussed at the end of this paper.

Simple accurate expressions for planar spiral inductances

We present several new simple and expressions for the DC inductance of square, hexagonal, octagonal, and circular spiral inductors. We evaluate the accuracy of our expressions, as well as several previously published inductance expressions, in two ways: by comparison with three-dimensional field solver predictions and by comparison with our own measurements, and also previously published measurements. Our simple expression matches the field solver inductance values typically within around 3%, about an order of magnitude better than the previously published expressions, which have typical errors ground 20% (or more). Comparison with measured values gives similar results: our expressions (and, indeed, the field solver results) match within around 5%, compared to errors of around 20% for the previously published expressions. (We believe most of the additional errors in the comparison to published measured values is due to the variety of experimental conditions under which the inductance was measured.) Our simple expressions are enough for design and optimization of inductors or of circuits incorporating inductors. Indeed, since inductor tolerance is typically on the order of several percent, more accurate expressions are not really needed in practice.

Comparison of microwave inductors fabricated on silicon-on-sapphire and bulk silicon

Inductors are important elements of microwave circuits that frequently require high self-resonant frequencies and high quality factors. In this work, circular spiral inductors fabricated on silicon-on-sapphire (SOS) and bulk silicon are compared. Due to the low-loss dielectric substrate, SOS inductors showed both higher self-resonant frequencies and higher quality factors than those fabricated on bulk silicon. Small-signal models extracted for the inductors confirm that the degradation of the inductor characteristics in bulk silicon stems from losses in the substrate.