Circuit Models For Interconnects Research Articles

PASSOS: Passive Approximation Through Sum-of-Squares Orthogonal Rational Functions

Signal and power integrity design in the time domain requires equivalent circuit models for interconnects and packages, whose descriptions may only be available as tabulated impedance or admittance parameters. Accurate models for these components should maintain their physical properties including causality, stability, and passivity. Sum-of-squares (SOS) polynomials, which are guaranteed to be non-negative, can be used to address the problem of generating passive scalar models, such as driving point impedances or admittances, based on an existing causal, stable, but nonpassive model. However, the poor conditioning of a monomial basis in SOS constraints prevents large-order modeling. In this article, we expand the SOS framework to reciprocal multiport admittance or impedance network parameters by introducing a methodology based on SOS matrices. In addition, orthogonalized rational functions are incorporated to solve the conditioning problem by embedding the denominator polynomial in the basis.

Passive Scalar Function Approximation Using SOS Polynomials

Signal and power integrity design in the time domain requires equivalent circuit models for interconnects and packages, whose descriptions may only be available as tabulated impedance or admittance parameters. Accurate models for these components should maintain their physical properties including causality, stability, and passivity. Even though a heuristic approach, pole flipping (i.e., changing the sign of the real part of an unstable pole) has proven to be sufficiently accurate for many applications, resulting in models with ensured causality and stability. In this article, we address the problem of generating passive scalar models, such as driving point impedances or admittances, based on an existing causal, stable, but nonpassive model. Our approach is based on using sum-of-squares (SOS) polynomials and results in a convex optimization problem, hence a global optimum is obtained. We obtain approximations through two distinct SOS algorithms: a coefficient and a sampling-based method. We also present a simple passivity test for such functions based on calculating the roots of numerator and denominator polynomials, which provides an intuitive link among existing approaches based on solving an eigenvalue problem.

A Broadband Enhanced Structure-Preserving Reduced-Order Interconnect Macromodeling Method for Large-Scale Equation Sets of Transient Interconnect Circuit Problems

In the transient analysis of an engineering power electronics device, the order of its equivalent circuit model is excessive large. To eliminate this issue, some model order reduction (MOR) methods are proposed in the literature. Compared to other MOR methods, the structure-preserving reduced-order interconnect macromodeling (SPRIM) based on Krylov subspaces will achieve a higher reduction radio and precision for large multi-port Resistor-Capacitor-Inductor (RCL) circuits. However, for very wide band frequency transients, the performance of a Krylov subspace-based MOR method is not satisfactory. Moreover, the selection of the expansion point in this method has not been comprehensively studied in the literature. From this point of view, a broadband enhanced structure-preserving reduced-order interconnect macromodeling (SPRIM) method is proposed to reduce the order of equation sets of a transient interconnect circuit model. In addition, a method is introduced to determine the optimal expansion point at each frequency in the proposed method. The proposed method is validated by the numerical results on a transient problem of an insulated-gate bipolar transistor (IGBT)-based inverter busbar under different exciting conditions.

Advance Interconnect Circuit Modeling Design Using Fractional-Order Elements

Nowadays, the interconnect circuits’ conduct plays a crucial role in determining the performance of the CMOS systems, especially those related to nano-scale technology. Modeling the effect of such an influential component has been widely studied from many perspectives. In this article, we propose a new general formula for $RLC$ interconnect circuit model in CMOS technology using the fractional-order elements approach. The study is based on approximating an infinite transfer function of the CMOS circuit with a noninteger distributed $RLC$ load to a finite number of poles. It is accurate due to the effect of adding fractional-order variables and since these variables are utilized for tuning the model to match the design regardless of its complexity. As such, delay calculations employing our analytical model are within 0.4 absolute error of COMSOL-computed delay across a range of interconnect lengths. Furthermore, the effect of the interconnect conductivity $G$ has been taken into account tacitly although the model included the resistance $R$ , inductance $L$ , and capacitance $C$ of the interconnect. A number of analyses were set up at different levels of the design to evaluate the effectiveness. First, demonstrating the significant effects of generalizing parameters was gained by studying the fractional-order impedance and propagation constant of the transmission line for a range of frequencies. Second, using MATLAB we assessed the potential of the proposed approximated model besides the exact one, which shows similarity in the fundamental features of the system, such as stability and resonance. Third, the proposed approach showed that with a very small tuning reach 0.01 of the generalizing parameters can achieve up to 15% improvement in the model accuracy.

Compact Modeling of Interconnect Circuits over Wide Frequency Band by Adaptive Complex-Valued Sampling Method

In this article, we propose a new model order-reduction method for compact modeling of interconnect circuits over wide frequency band using a novel complex-valued adaptive sampling and error estimation scheme. We address the outstanding error control problems in the existing sampling-based reduction framework over a frequency band. Our new method, WBMOR , explicitly and efficiently computes the exact residual errors to guide the sampling process. We show by sampling along the imaginary axis and performing a new complex-valued reduction that the reduced model will match exactly with the original model at the sample points. Additionally, we show in theory that the proposed method can achieve the error bound over a given frequency range. In practice, the new algorithm can help designers choose the best order of the reduced model for the given frequency range and error bound via the adaptive sampling scheme. In addition, WBMOR can perform wideband accurate reductions of interconnect circuits for analog and RF applications where model accuracy needs to be maintained over a wide frequency range. We compare several sampling schemes such as Monte Carlo, logarithmic, recently proposed resampling, and ARMS methods. Experimental results on a number of RLC circuits show that WBMOR is much more efficient than all the other sampling methods, including the recently proposed resampling and ARMS schemes with the same reduction orders. Compared with the traditional real-valued sampling methods, the complex-valued sampling method is more accurate for the same computational cost.

Multiple block structure-preserving reduced order modeling of interconnect circuits

In this paper, we propose a generalized multiple-block structure-preserving reduced order interconnect macromodeling method (BSPRIM). Our approach extends the structure-preserving model order reduction (MOR) method SPRIM [R.W. Freund, SPRIM: structure-preserving reduced-order interconnect macromodeling, in: Proceedings of International Conference on Computer Aided Design (ICCAD), 2004, pp. 80–87] into more general block forms. We first show how an SPRIM-like structure-preserving MOR method can be extended to deal with admittance RLC circuit matrices and show that the 2 q moments are still matched and symmetry is preserved. Then we present the new BSPRIM method to deal with more circuit partitions for linear dynamic circuits formulated in impedance and admittance forms. The reduced models by BSPRIM will still match the 2 q moments and preserve the circuit structure properties like symmetry as SPRIM does. We also show that BSPRIM can build the compact models with similar size and accuracy of that produced by traditional projection based methods but using less computation costs. Experimental results show that BSPRIM outperforms SPRIM in terms of accuracy with more partitions and outperforms PRIMA with less CPU times for generating the same accurate models.

An efficient terminal and model order reduction algorithm

The paper proposes an efficient terminal and model order reduction method for compact modeling of interconnect circuits with many terminals. The new method is inspired by the recently proposed terminal reduction method, SVDMOR [P. Feldmann, F. Liu, Sparse and efficient reduced order modeling of linear subcircuits with large number of terminals, in: Proceedings of the International Conference on Computer Aided Design (ICCAD), 2004, pp. 88–92]. But different from SVDMOR, the new method considers higher order moment information for terminal responses during the terminal reduction and separately applies singular value decomposition (SVD) on both input and output terminals for low-rank approximations. This is in contrast to the SVDMOR method where input and output terminal responses are approximated by SVD at the same time, which can lead to large errors when the numbers of inputs and outputs are quite different. We analyze the passivity requirements for SVD-based terminal and model order reduction and show that the combined passive terminal and MOR using SVD method will not lead an effective terminal reduction in general. Our experimental results show that the proposed ESVDMOR method outperforms the SVDMOR method in terms of accuracy for the same reduced model sizes when the numbers of input and output terminals are quite different.

A Decoupling Technique for Efficient Timing Analysis of VLSI Interconnects With Dynamic Circuit Switching

In today's high-speed/high-density very large scale integrated (VLSI) circuit designs with coupled interconnect lines, signal transients are strongly correlated with the input switching patterns. Signal-delay variations due to the input-switching patterns may be more than /spl plusmn/50% of the delay of an isolated single line. Thus, blind static timing-analysis techniques without consideration of the detailed switching effects may not be accurate enough to meet tight timing margins for today's deep submicron (DSM)-based VLSI circuits. In this paper, the signal-transient responses of multicoupled interconnect lines due to various input-switching patterns are analyzed in terms of the effective capacitances and effective inductances. Thereby, the critical delay line of multicoupled interconnect lines is decoupled into an effective single-isolated line. With the proposed novel decoupling technique for multicoupled interconnect lines, the accurate dynamic delay of strongly coupled interconnect lines can be readily determined with physical layout information. For example, in switching patterns, the paper shows that the signal delays calculated by using the effective single-line models have excellent agreement with SPICE simulations using the generic coupled interconnect circuit models. That is, the accuracy for both RC-dominant lines and RLC lines is within 10% error (but often within 5% error). Thus, without any significant modification of existing IC computer-aided design frameworks, the technique can be directly as well as usefully employed for accurate timing verification of DSM-based VLSI designs.

Finite-Thickness Conductor Models for Full-Wave Analysis of Interconnects With a Fast Integral Equation Method

In this paper, a fast electromagnetic integral equation solution methodology is proposed for the frequency-domain modeling of lossy, interconnect structures. The proposed method utilizes a two-layer model for thick conductors where the unknown current density inside the rectangular wire strips is approximated in terms of equivalent surface currents placed at the top and bottom sides of the strip which, for the purposes of this paper, are assumed to be substantially larger than the side strips. A matrix impedance relationship, which depends on the conductor thickness and its material properties, is established between the two surface current densities to account for the skin effect behavior of the field within the conductor. The selected assignment of the unknown current densities on the planes associated with the top and bottom sides of the metallization, combined with the planarity of multilayered interconnect structures, makes possible the application of the conjugate gradient fast Fourier transform (FFT) algorithm for the computationally efficient prediction of the electromagnetic response of multiport interconnect structures. Applications of the resulting fast integral equation solver to the electromagnetic modeling of interconnect circuits with thick lossy conductors from near dc to multigigahertz frequencies are used to demonstrate the validity of the method and quantify its computational efficiency.

Generalized coupled interconnect transfer function and high-speed signal simulations

A new expression for the coupled interconnect system transfer function has been derived under general linear generator and uncoupled load conditions, i.e., without any restrictions in circuit load impedance. High-speed-signals on coupled interconnects have been simulated using this transfer function. The simulation uses generalized interconnect circuit model parameters in which all line parameters are frequency dependent. The validity of the interconnect circuit parameters was confirmed previously using s-parameter measurements. High-speed signal simulation using this novel interconnect transfer function has been verified with time-domain measurements using an HP54121T high-speed sampling oscilloscope. This work accurately predicts coupled interconnect circuit responses. With this transfer function, signal integrity problems of high-performance VLSI circuits can be predicted in the design stage.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Simulations and measurements of picosecond signal transients, propagation, and crosstalk on lossy VLSI interconnect

Signal transients, propagation, and crosstalk simulations of coupled interconnect lines have been performed, and the results verified by time-domain measurements. These simulations include frequency dependent interconnect circuit parameters, arbitrary loads, and 30 ps rise times. A generalized interconnect transfer function is used to calculate circuit responses in the frequency domain. Then an inverse Fourier transform is employed to predict the time-domain signals. Frequency variant TC interconnect models and PISCES-II simulations are used to determine the interconnect circuit model parameters. The simulation results are compared with conventional interconnect circuit models such as LC, RC, and RLC networks. Time-domain interconnect measurements using a HP54121T sampling oscilloscope show excellent agreement with simulations. Thus, signal transients, propagation, and coupling noise of on-chip interconnects are predicted.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

RICE: rapid interconnect circuit evaluation using AWE

This paper describes the Rapid Interconnect Circuit Evaluator (RICE) software developed specifically to analyze RC and RLC interconnect circuit models of virtually any size and complexity. RICE focuses specifically on the passive interconnect problem by applying the moment-matching technique of Asymptotic Waveform Evaluation (AWE) and application-specific circuit analysis techniques to yield large gains in run-time efficiency over circuit simulation without sacrificing accuracy. Moreover, this focus of AWE on passive interconnect problems permits the use of moment-matching techniques that produce stable, pre-characterized, reduced-order models for RC and RLC interconnects. RICE is demonstrated to be as accurate as a transient circuit simulation with hundreds or thousands of times the efficiency. The use of RICE is demonstrated on several VLSI interconnect and off-chip microstrip models. >

Equivalent circuit modeling of interconnects from time-domain measurements

A technique for the equivalent circuit modeling of single and coupled uniform and nonuniform interconnects, including discontinuities such as bends and junctions in high-speed circuits and packages, is presented. The circuit models are extracted from time-domain reflection and transmission measurement (TDR/T). The SPICE simulated results for the extracted circuit models for typical single and coupled structures are compared with the measured data to validate the accuracy of the circuit models.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>