Circuit Implementation Research Articles

Progress in Spin Logic Devices Based on Domain-Wall Motion.

Spintronics, utilizing both the charge and spin of electrons, benefits from the nonvolatility, low switching energy, and collective behavior of magnetization. These properties allow the development of magnetoresistive random access memories, with magnetic tunnel junctions (MTJs) playing a central role. Various spin logic concepts are also extensively explored. Among these, spin logic devices based on the motion of magnetic domain walls (DWs) enable the implementation of compact and energy-efficient logic circuits. In these devices, DW motion within a magnetic track enables spin information processing, while MTJs at the input and output serve as electrical writing and reading elements. DW logic holds promise for simplifying logic circuit complexity by performing multiple functions within a single device. Nevertheless, the demonstration of DW logic circuits with electrical writing and reading at the nanoscale is still needed to unveil their practical application potential. In this review, we discuss material advancements for high-speed DW motion, progress in DW logic devices, groundbreaking demonstrations of current-driven DW logic, and its potential for practical applications. Additionally, we discuss alternative approaches for current-free information propagation, along with challenges and prospects for the development of DW logic.

Dynamic Analysis and Sliding Mode Synchronization Control of Chaotic Systems with Conditional Symmetric Fractional-Order Memristors

In this paper, the characteristics of absolute value memristors are verified through the circuit implementation and construction of a chaotic system with a conditional symmetric fractional-order memristor. The dynamic behavior of fractional-order memristor systems is explored using fractional-order calculus theory and the Adomian Decomposition Method (ADM). Concurrently, the investigation probes into the existence of coexisting symmetric attractors, multiple coexisting bifurcation diagrams, and Lyapunov exponent spectra (LEs) utilizing system parameters as variables. Additionally, the system demonstrates an intriguing phenomenon known as offset boosting, where the embedding of an offset can adjust the position and size of the system’s attractors. To ensure the practical applicability of these findings, a fractional-order sliding mode synchronization control scheme, inspired by integer-order sliding mode theory, is designed. The rationality and feasibility of this scheme are validated through a theoretical analysis and numerical simulation.

A Concise 4D Conservative Chaotic System with Wide Parameter Range, Offset Boosting Behavior and High Initial Sensitivity

In this paper, we present a concise four-dimensional (4D) conservative chaotic system with a wide parameter range. Since there are no terms higher than first order, the circuit does not contain multipliers, resulting in a simple circuit implementation. The nonlinear dynamic characteristics, such as phase diagrams, equilibrium points, divergence, Poincaré cross-sections, Lyapunov exponents, bifurcation diagrams, and Lyapunov dimension, are analyzed in detail, which illustrates the conservativity. Besides, the system exhibits different offset boosting behaviors. Through offset boosting, the system can propagate along a line, convert signal polarity, control variable amplitude, generate coexisting attractors, and even induce changes in its state. Specially, we realize the transition from a single-vortex attractor to a multivortex one by some changes in the initial values. Furthermore, the Pearson correlation coefficient is used to demonstrate the higher initial value sensitivity of the system. Finally, the system is implemented through Multisim simulation and analog circuit separately, and their consistency validates the system effectively.

Hardware software co-design for leveraging STDP in a memristive neuroprocessor

In neuromorphic computing, different learning mechanisms are being widely adopted to improve the performance of a specific application. Among these techniques, spike-timing-dependent plasticity (STDP) stands out as one of the most favored. STDP is simply managed by the temporal information of an event, which is biologically inspired. However, most of the prior works on STDP are focused on circuit implementation or software simulation for performance evaluation. Previous works also lack a comparative analysis of the performances of different STDP implementations. This study aims to provide a comprehensive assessment of STDP, centering on the performance across various applications such as classification (static and temporal datasets), control, and reservoir computing. Different applications necessitate distinct STDP configurations to achieve optimal performance with the neuroprocessor. Additionally, this work introduces an application-specific integrated circuit design of STDP circuitry. The design is based on current-controlled memristive synapse principles and utilizes 65 nm CMOS technology from IBM. The detailed presentation includes circuitry specifics, layout, and performance parameters such as energy consumption and design area.

An optimal feedforward circuit with null audio susceptibility in feedback‐controlled buck converter

AbstractThe ability to manage abrupt disturbances in input supply voltage and sudden fluctuations in load represents a fundamental requirement for DC‐DC buck converters. While feedback control systems typically address such transients, certain applications necessitate even faster transient responses. This paper introduces an input voltage feedforward scheme (IVFS) integrated with voltage mode feedback controllers to enhance closed‐loop performance. Relevant transfer functions resulting from the inclusion of the feedforward circuit are derived, and an optimal condition for audio susceptibility nullification is identified. This scheme ensures an additional attenuation in magnitude of audio susceptibility, in contrast to the buck converter without feedforward. In the time domain, the incorporation of IVFS results in a 20% reduction in percentage overshoot for a 12‐8‐12 step in supply voltage. Additionally, for a 12‐15‐12 step, the percentage overshoot and settling time are completely eliminated. Various active and passive parasitics are included in modeling of the buck converter to aid in designing the feedforward and feedback controller. A Type‐III controller is employed as a feedback controller to assess the closed‐loop performance. A hardware prototype is built to demonstrate the efficacy of the proposed feedforward scheme. The implementation of the entire circuit is straightforward due to its requirement of only a few discrete components, namely, analog multiplier, and error amplifier.

Quantum simulation of dissipation for Maxwell equations in dispersive media

The dissipative character of an electromagnetic medium breaks the unitary evolution structure that is present in lossless, dispersive optical media. In dispersive media, dissipation appears in the Schrödinger representation of classical Maxwell equations as a sparse diagonal operator occupying an r-dimensional subspace. A first order Suzuki-Trotter approximation for the evolution operator enables us to isolate the non-unitary operators (associated with dissipation) from the unitary operators (associated with lossless media). The unitary operators can be implemented through qubit lattice algorithm (QLA) on n qubits, based on the discretization and the dimensionality of the pertinent fields. However, the non-unitary-dissipative part poses a challenge both physically and computationally on how it should be implemented on a quantum computer. In this paper, two probabilistic dilation algorithms are considered for handling the dissipative operators. The first algorithm is based on treating the classical dissipation as a linear amplitude damping-type completely positive trace preserving (CPTP) quantum channel where an unspecified environment interacts with the system of interest and produces the non-unitary evolution. Therefore, the combined system-environment is now closed, and must undergo unitary evolution in the dilated space. The unspecified environment can be modeled by just one ancillary qubit, resulting in an implementation scaling of O(2n−1n2) elementary gates for the total system-environment unitary evolution operator. The second algorithm approximates the non-unitary operators by the Linear Combination of Unitaries (LCU). On exploiting the diagonal structure of the dissipation, we obtain an optimized representation of the non-unitary part, which requires O(2n) elementary gates. Applying the LCU method for a simple dielectric medium with homogeneous dissipation rate, the implementation scaling can be further reduced into O[poly(n)] basic gates. For the particular case of weak dissipation we show that our proposed post-selective dilation algorithms can efficiently delve into the transient evolution dynamics of dissipative systems by calculating the respective implementation circuit depth. A connection of our results with the non-linear-in-normalization-only (NINO) quantum channels is also presented.

Theoretico-experimental analysis of bistability in the oscillatory response of a TaOx ReRAM to pulse train stimuli

Fading memory is the capability of a physical system to approach a unique asymptotic behaviour, irrespective of the initial conditions, when stimulated by an input from a certain class. Standard stimuli from the AC periodic class typically induce fading memory effects in non-volatile memristors, as uncovered for the first time back in 2016. Very recently, a deep investigation of resistance switching phenomena in a TaOx resistive random access memory cell revealed the capability of the nano-device to exhibit one of two possible oscillatory behaviours, depending upon the initial condition, when subject to a particular periodic excitation. This interesting finding was, however, left unexplained. Bistability is the simplest form of local fading memory. In a system, endowed with local fading memory under a given stimulus, the initial condition does not affect the long-term behaviour of the state as long as it is drawn from the basin of attraction of either of the distinct coexisting state-space attractors (two limit cycles for the periodically forced memristor acting as a bistable oscillator). Here, the history of the system, encoded in the initial condition, is, thus, erasable only locally through ad hoc stimulation. Motivated by the discovery of local history erase effects in our resistive random access memory cell, this study applies a powerful system-theoretic tool, enabling the analysis of the response of first-order systems to square pulse train-based periodic stimuli, known as the time-average state dynamic route, to an accurate physics-based mathematical model, earlier fitted to the nano-device, to determine a strategy for specifying the parameters of an excitation signal, consisting of the sequence of two square pulses of opposite polarity per period so as to induce various forms of monostability or multistability in the non-volatile memristor. In particular, as an absolute novelty in the literature, experimental measurements validate the theoretical prediction on the capability of the device to operate as one of two distinct oscillators, depending upon the initial condition, under a specific pulse train excitation signal. The coexistence of multiple oscillatory operating modes in the periodically forced resistive random access memory cell, an example par excellence of their unique non-linear dynamics, may inspire the development and circuit implementation of novel sensing and mem-computing paradigms.

A Review on Design and Verification of Programmable UART with AXI

A Review on Design and Verification of Programmable UART with AXI

Quantum circuit implementations of SM4 block cipher optimizing the number of qubits

Quantum circuit implementations of SM4 block cipher optimizing the number of qubits

Increasing the efficiency of the automotive generator due to active rectification

Problem. Increasing fuel economy requirements for modern vehicles lead to an increase in their electrification. The rise in the number of electrical systems leads to a higher load on the electrical power supply system, with the vehicle's power load reaching 2-3 kW. Leading automobile companies have begun serial production of vehicles with the new 12/48 V power supply voltage standard. The traditional alternator used today is a synchronous alternator, and rectifier diodes are used to convert the generated AC to DC to charge the battery, which is inefficient. A study of losses in an automobile alternator shows that the diode rectifier creates a significant portion of the machine's losses at low speeds, resulting in increased fuel consumption. The solution to this problem is to use a synchronous rectifier to replace traditional rectifier diodes, thus improving the efficiency of the AC/DC rectifier. Goal: To improve the economic and environmental characteristics of a mild hybrid vehicle through the use of a synchronous two-semi-periodic rectifier with a midpoint in the car generator. Methodology: Analytical methods are used to calculate energy losses on diodes and in the phase windings of the generator when employing a two-semiperiod rectifier with a midpoint, compared to a bridge rectifier. Results: The structure, functions, and operation modes of the synchronous rectification system are considered. The effect of synchronous rectification on the generator efficiency of a mild hybrid vehicle is analyzed. It was determined which configurations of synchronous rectification are more effective from the standpoint of energy saving and under which operating conditions. It was determined that in a two-semiperiod rectifier with a midpoint, compared to a bridge rectifier, there will be the same heating of the phase windings and 2 times fewer losses on the diodes. Practical value: A version of the bridge synchronous rectification system of the 48 V generator for a mild hybrid vehicle using MOSFET transistors and specialized control IC is proposed. A synchronous rectification system and its circuit implementation for a 12 V generator based on a two-semi-periodic rectifier scheme with a midpoint is proposed, which allows increasing the energy efficiency and economy of the automobile generator.

Implementation of a quantum division circuit on noisy intermediate-scale quantum devices using dynamic circuits and approximate computing

Implementation of a quantum division circuit on noisy intermediate-scale quantum devices using dynamic circuits and approximate computing

Dynamics of the Fractional-Order Lorenz System Based on Adomian Decomposition Method and Its DSP Implementation

Dynamics and digital circuit implementation of the fractional-order Lorenz system are investigated by employing Adomian decomposition method (ADM). Dynamics of the fractional-order Lorenz system with derivative order and parameter varying is analyzed by means of Lyapunov exponents (LEs), bifurcation diagram, chaos diagram and phase diagram. Results show that the fractional-order Lorenz system has rich dynamical behavior and it is a potential model for application. It is also found that the minimum order is affected by numerical algorithm and time step size. Finally, the fractional-order system is implemented on DSP digital circuit. Phase diagrams generated by the DSP are consistent with that generated by simulation.

Semi-Permanent Stuck-At Fault injection attacks on Elephant and GIFT lightweight ciphers

Fault attacks pose a potent threat to modern cryptographic implementations, particularly those used in physically approachable embedded devices in IoT environments. Information security in such resource-constrained devices is ensured using lightweight ciphers, where combinational circuit implementations of SBox are preferable over look-up tables (LUT) as they are more efficient regarding area, power, and memory requirements. Most existing fault analysis techniques focus on fault injection in memory cells and registers. Recently, a novel fault model and analysis technique, namely Semi-Permanent Stuck-At (SPSA) fault analysis, has been proposed to evaluate the security of ciphers with combinational circuit implementation of Substitution layer elements, SBox. In this work, we propose optimized techniques to recover the key in a minimum number of ciphertexts in such implementations of lightweight ciphers. Based on the proposed techniques, a key recovery attack on the NIST lightweight cryptography (NIST-LWC) standardization process finalist, Elephant AEAD, has been proposed. The proposed key recovery attack is validated on two versions of Elephant cipher. The proposed fault analysis approach recovered the secret key within 85 − 240 ciphertexts, calculated over 1000 attack instances. To the best of our knowledge, this is the first work on fault analysis attacks on the Elephant scheme. Furthermore, an optimized combinational circuit implementation of Spongent SBox (SBox used in Elephant cipher) is proposed, having a smaller gate count than the optimized implementation reported in the literature. The proposed fault analysis techniques are validated on primary and optimized versions of Spongent SBox through Verilog simulations. Further, we pinpoint SPSA hotspots in the lightweight GIFT cipher SBox architecture. We observe that GIFT SBox exhibits resilience towards the proposed SPSA fault analysis technique under the single fault adversarial model. However, eight SPSA fault patterns reduce the nonlinearity of the SBox to zero, rendering it vulnerable to linear cryptanalysis. Conclusively, SPSA faults may adversely affect the cryptographic properties of an SBox, thereby leading to trivial key recovery. The GIFT cipher is used as an example to focus on two aspects: i) its SBox construction is resilient to the proposed SPSA analysis and therefore characterizing such constructions for SPSA resilience and, ii) an SBox even though resilient to the proposed SPSA analysis, may exhibit vulnerabilities towards other classical analysis techniques when subjected to SPSA faults. Our work reports new vulnerabilities in fault analysis in the combinational circuit implementations of cryptographic protocols.

Extreme Homogeneous and Heterogeneous Multistability in a Novel 5D Memristor-Based Chaotic System with Hidden Attractors

This paper proposes a novel five-dimensional (5D) memristor-based chaotic system by introducing a flux-controlled memristor into a 3D chaotic system with two stable equilibrium points, and increases the dimensionality utilizing the state feedback control method. The newly proposed memristor-based chaotic system has line equilibrium points, so the corresponding attractor belongs to a hidden attractor. By using typical nonlinear analysis tools, the complicated dynamical behaviors of the new system are explored, which reveals many interesting phenomena, including extreme homogeneous and heterogeneous multistabilities, hidden transient state and state transition behavior, and offset-boosting control. Meanwhile, the unstable periodic orbits embedded in the hidden chaotic attractor were calculated by the variational method, and the corresponding pruning rules were summarized. Furthermore, the analog and DSP circuit implementation illustrates the flexibility of the proposed memristic system. Finally, the active synchronization of the memristor-based chaotic system was investigated, demonstrating the important engineering application values of the new system.

Depth-Optimized Quantum Circuits for ASCON: AEAD and HASH

Quantum computing advancements pose security challenges for cryptography. Specifically, Grover’s search algorithm affects the reduction in the search complexity of symmetric-key encryption and hash functions. Recent efforts have been made to estimate the complexity of Grover’s search and evaluate post-quantum security. In this paper, we propose a depth-optimized quantum circuit implementation for ASCON, including both symmetric-key encryption and hashing algorithms, as a part of the lightweight cryptography standardization by NIST (National Institute of Standards and Technology). As far as we know, this is the first implementation of a quantum circuit for the ASCON AEAD (Authenticated Encryption with Associated Data) scheme, which is a symmetric-key algorithm. Also, our quantum circuit implementation of the ASCON-HASH achieves a reduction of more than 88.9% in the Toffoli depth and more than 80.5% in the full depth compared to the previous work. As per our understanding, the most effective strategy against Grover’s search involves minimizing the depth of the quantum circuit for the target cipher. We showcase the optimal Grover’s search cost for ASCON and introduce a proposed quantum circuit optimized for depth. Furthermore, we utilize the estimated cost to evaluate post-quantum security strength of ASCON, employing the relevant evaluation criteria and the latest advancements in research.

Design and implementation of microcontroller-based solar charge controller using modified incremental conductance MPPT algorithm

This paper presents the modeling, design, and implementation of a rapid prototyping low-power solar charge controller with maximum power point tracking (MPPT). The implemented circuit consists of a 60 W photovoltaic (PV) module, a buck converter with an MPPT controller, and a 13.5V-48Ah battery. The performance of the solar charge controller is increased by operating the PV module at the maximum power point (MPP) using a modified incremental conductance (IC) MPPT algorithm. While the traditional IC MPPT approach requires a substantial amount of code and algorithmic steps to keep the PV module at the MPP, the proposed IC achieves the same process with a reduced number of lines of code, owing to its optimized algorithmic approach. By adjusting the duty cycle of the generated Pulse Width Modulation (PWM) signal, maximum power transfer from the PV module is attained during the operation of the battery charging process. The simulation model is configured and tested in Matlab/Simulink environment under different solar data (1000 W/m2, 500 W/m2, 800 W/m2) with constant temperature (25 °C). To validate the simulations, experimental studies are conducted using the developed rapid prototype with the 32-bit embedded microcontroller in the laboratory. According to the simulation and laboratory results, the maximum power tracking performance of the traditional method was found to be 95.51%, while the proposed method achieved a ratio of 96.59% with less steady-state oscillation. The average tracking efficiency has increased by 1.13%. The proposed IC tracks the MPP more accurately and provides maximum available power for battery charging at different solar radiations compared to the traditional IC approach. For low-powered electric devices, the proposed system can be used to provide a charging infrastructure solution.

Multiple firing patterns, energy conversion and hardware implementation within Hindmarsh-Rose-improved neuron model

The transmission of information between neurons is accomplished in living organisms through synapses. The memristor is an electronic component that simulates the tunability of the strength of biological synaptic connections in artificial neural networks. This article constructs a novel type of locally active memristor and verifies by nonlinear theoretical analysis, locally active analysis and circuit simulation. The designed memristor is simulated as a biological autapse of Hindmarsh-Rose(HR) neuron to obtain the improved HR neuron model of memristive autapse, and the Hamilton energy is obtained according to Helmholtz theorem. By varying the external forcing current and the memristive autapse strength, this article analyses the changes of the Hamilton energy and explores its self-excited and hidden firing behavior. The analog circuit simulation and digital circuit implementation of the HR model confirm the consistency between the mathematical model and the actual behavior, which can advance the field of neuroscience and artificial intelligence.

Simulation and implementation of photonic integrated circuits for the filtering and optical heterodyning of mode-locked comb-lines

We present the simulation and implementation of a photonic integrated circuit (PIC) designed for the filtering and optical heterodyning of comb-lines generated by a 20.97 GHz mode-locked fiber ring laser emitting at the optical C-band. We compare simulations obtained for the coupling junction of the microrings in the PIC with the use of an analytic approach and the finite difference time-domain (FDTD) method. A PIC designed for fabrication with the Triplex asymmetric double-stripe (ADS) waveguides was demonstrated. Using the PIC, we demonstrated the optical heterodyning of pairs of comb-lines filtered by tunable microrings. The phase noise of beat signals located at 20.97 and 41.94 GHz was characterized. We provide a discussion on enhancing the RF power of the beat signals with the use of optical injection locking.

Modular wind generators for autonomous power supply to remote mining areas mineral resources

The use of renewable energy sources to supply power to energy-isolated areas is an urgent topic. The simplicity of the design and high reliability of inductor generators create good prospects for their use in wind power plants as an alternative to synchronous and asynchronous electric machines that are currently in use. An obstacle to such an application is the specifics of the design, construction, and execution of modular machines with magnetic switching, concentrated windings, and a distributed magnetic system integrated into the wind turbine design. The purpose of the study is to consider cause-effect relationships and establish relationships between magnetic flux, EMF, the geometry of electric and magnetic circuits, the structural arrangement of electric windings, and circuit solutions of an automatic electromagnetic excitation system for the design of a new type of generators. The current issues of the effective use of an exciting magnetic flux for voltage regulation in power supply systems powered by power plants, the main generators of which contain a distributed magnetic system with concentrated electric windings, are considered. The optimal structural compositions and geometry of the ratios of electric and magnetic circuits are determined from the machine's basic calculation equation, which is obtained under the condition of maximum magnetic flux. The reasons for the induction of variable EMF in the DC excitation windings, which prevent the effective magnetization of the machine, have been established. The location of the electric windings is proposed, which makes it possible to weaken or completely compensate for the pulsations of the magnetic flux coupled with the exciting circuits. It is established that in order to eliminate parasitic EMF in the exciting windings, it is necessary to use two-circuit circuits for alternating switching of the magnetic flux in the circuits, with sequential activation of the sections of the windings of the exciting circuits. To completely eliminate these EMFs, performing two-circuit magnetic flux switching circuits with a common exciting winding is advisable. The methods and features of the circuit implementation of the conditions of electromagnetic excitation and maintenance of voltage constancy at the output of generators of a new type are considered.

A Mixture of Negative-, Zero-, and Positive-Differential Transconductance Switching from Tellurium/Indium Gallium Zinc Oxide Heterostructures.

Conventional transistors have long emphasized signal modulation and amplification, often sidelining polarity considerations. However, the recent emergence of negative differential transconductance, characterized by a drain current decline during gate voltage sweeping, has illuminated an unconventional path in transistor technology. This phenomenon promises to simplify the implementation of ternary logic circuits and enhance energy efficiency, especially in multivalued logic applications. Our research has culminated in the development of a sophisticated mixed transconductance transistor (M-T device) founded on a precise Te and IGZO heterojunction. The M-T device exhibits a sequence of intriguing phenomena, zero differential transconductance (ZDT), positive differential transconductance (PDT), and negative differential transconductance (NDT) contingent on applied gate voltage. We clarify its operation using a three-segment equivalent circuit model and validate its viability with IGZO TFT, Te TFT, and Te/IGZO TFT components. In a concluding demonstration, the M-T device interconnected with Te TFT achieves a ternary inverter with an intermediate logic state. Remarkably, this configuration seamlessly transitions into a binary inverter when it is exposed to light.