Circuit Compiler Research Articles

The node capacitated graph partitioning problem: A computational study

In this paper we consider the problem ofk-partitioning the nodes of a graph with capacity restrictions on the sum of the node weights in each subset of the partition, and the objective of minimizing the sum of the costs of the edges between the subsets of the partition. Based on a study of valid inequalities, we present a variety of separation heuristics for cycle, cycle with ears, knapsack tree and path-block cycle inequalities among others. The separation heuristics, plus primal heuristics, have been implemented in a branch-and-cut routine using a formulation including variables for the edges with nonzero costs and node partition variables. Results are presented for three classes of problems: equipartitioning problems arising in finite element methods and partitioning problems associated with electronic circuit layout and compiler design. © 1998 The Mathematical Programming Society, Inc. Published by Elsevier Science B.V.

Experiences with the MacTester in computer science and engineering education

Teaching students the complete process of circuit design, simulation, implementation, test and debug is a daunting task. Even though design description tools and circuit compilers have kept up with the increasing levels of integration found in current implementation media such as FPGAs and microcontrollers, it has become increasingly difficult for students to test and debug the complex hardware projects enabled by these modern tools and devices. In this paper we describe an inexpensive digital circuit testing environment that greatly simplifies the test and debug experience. This environment, consisting of the tester hardware and its corresponding software, enables students to experience the challenges of testing and debugging without the expense of costly commercial hardware testers or the drudgery of setting up ad hoc hardware test jigs. The MacTester has been in use in the Department of Computer Science and Engineering at the University of Washington for three years in both undergraduate and graduate hardware design courses as sell as independent study and research projects.

Correct compilation of specifications to deterministic asynchronous circuits

Powerful methods have been developed by A. martin and others wherby asynchronous circuits may be automatically constructed by starting from high-level specifications and incrementally transforming them into asynchronous circuits. In this paper we make the informal arguments for the correctness of this compilatin process mathematically rigorous. With rigorsouly justified transformations, specifications may be translated into circuits that provably meet their specification. A full proof of the correctness of the circuit compiler is given. Other results of independent interest include: the process model takes fairness of gates into account, hazard-freeness is formally defined, and all hazard-free circuits constructed solely of and, or, not gates and C elements are proven to behave deterministically to any outside observer. A novel notion of equivalence is used to justify the correctness of the compiler.

Compilation of process algebra expressions into delay-insensitive circuits

The main advantage of delay-insensitive design of circuits is that it ensures that circuits function correctly independently of delays in their components and wires. Timing constraints do not have to be considered, which facilitates top-down design. Process algebras provide a suitable formalism for specification, design and verification of concurrent systems, but there are few methods for practical compilation of electronic circuits using these algebras. The paper illustrates such a method for the compilation of algebraic expressions to delay-insensitive circuits. Compilation if facilitated by the use of two new forms of the decision wait element. The implementation of these elements is also examined.

Book review: THE T PROGRAMMING LANGUAGE A Dialect of LISP by Stephen Slade

The T language is a derivative of SCHEME LISP, intended to be used for teaching T to individuals who have some programming background in languages other than LISP. T was developed at the Yale University Computer Science Department and Artificial intelligence Project. The author cites several serious applications which have been written at Yale using T, including "text editors, circuit design tools, graphics editors, compilers, and numerous artificial intelligence programs." [Slade, p. 2] The author does not explain the reason for yet another dialect of LISP, except to extoll T's extensions of that language. As well as praise T, Slade offers code to enable users of Common LISP and SCHEME to create an imitation of T. Several avenues are outlined for obtaining T on a number of popular computers, also, including ARPANET addresses.