Circuit Board Surface Research Articles

YOLO-HLT: improved lightweight printed circuit board surface defect detection algorithm based on YOLOv5

YOLO-HLT: improved lightweight printed circuit board surface defect detection algorithm based on YOLOv5

A dataset for deep learning based detection of printed circuit board surface defect

Printed circuit board (PCB) may display diverse surface defects in manufacturing. These defects not only influence aesthetics but can also affect the performance of the PCB and potentially damage the entire board. Thus, achieving efficient and highly accurate detection of PCB surface defects is fundamental for quality control in fabrication. The rapidly advancing deep learning (DL) technology holds promising prospects for providing accurate and efficient detection methods for surface defects on PCB. To facilitate DL model training, it is imperative to compile a comprehensive dataset encompassing diverse surface defect types found on PCB at a significant scale. This work categorized PCB surface defects into 9 distinct categories based on factors such as their causes, locations, and morphologies and developed a dataset of PCB surface defect (DsPCBSD+). In DsPCBSD+, a total of 20,276 defects were annotated manually by bounding boxes on the 10,259 images. This openly accessible dataset is aimed accelerating and promoting further researches and advancements in the field of DL-based detection of PCB surface defect.

Local and Global Context-Enhanced Lightweight CenterNet for PCB Surface Defect Detection.

Printed circuit board (PCB) surface defect detection is an essential part of the PCB manufacturing process. Currently, advanced CCD or CMOS sensors can capture high-resolution PCB images. However, the existing computer vision approaches for PCB surface defect detection require high computing effort, leading to insufficient efficiency. To this end, this article proposes a local and global context-enhanced lightweight CenterNet (LGCL-CenterNet) to detect PCB surface defects in real time. Specifically, we propose a two-branch lightweight vision transformer module with local and global attention, named LGT, as a complement to extract high-dimension features and leverage context-aware local enhancement after the backbone network. In the local branch, we utilize coordinate attention to aggregate more powerful features of PCB defects with different shapes. In the global branch, Bi-Level Routing Attention with pooling is used to capture long-distance pixel interactions with limited computational cost. Furthermore, a Path Aggregation Network (PANet) feature fusion structure is incorporated to mitigate the loss of shallow features caused by the increase in model depth. Then, we design a lightweight prediction head by using depthwise separable convolutions, which further compresses the computational complexity and parameters while maintaining the detection capability of the model. In the experiment, the LGCL-CenterNet increased the mAP@0.5 by 2% and 1.4%, respectively, in comparison to CenterNet-ResNet18 and YOLOv8s. Meanwhile, our approach requires fewer model parameters (0.542M) than existing techniques. The results show that the proposed method improves both detection accuracy and inference speed and indicate that the LGCL-CenterNet has better real-time performance and robustness.

EHIR: Energy-based Hierarchical Iterative Image Registration for Accurate PCB Defect Detection

Printed Circuit Board (PCB) Surface defect detection is crucial to ensure the quality of electronic products in manufacturing industry. Detection methods can be divided into non-referential and referential methods. Non-referential methods employ designed rules or learned data distribution without template images but are difficult to address the uncertainty and subjectivity issues of defects. In contrast, referential methods use templates to achieve better performance but rely on precise image registration. However, image registration is especially challenging in feature extracting and matching for PCB images with defective, reduplicated or less features. To address these issues, we propose a novel Energy-based Hierarchical Iterative Image Registration method (EHIR) to formulate image registration as an energy optimization problem based on the edge points rather than finite features. Our framework consists of three stages: Edge-guided Energy Transformation (EET), EHIR and Edge-guided Energy-based Defect Detection (EEDD). The novelty is that the consistency of contours contributes to aligning images and the difference is highlighted for defect location. Extensive experiments show that this method has high accuracy and strong robustness, especially in the presence of defect feature interference, where our method demonstrates an overwhelming advantage over other methods.

PECVD technology deposition of high hardness a-C:H films on micro-drill surfaces: Substrate bias voltage effects

The plasma enhanced chemical vapor deposition (PECVD) technique was utilized to produce hydrogenated amorphous carbon (a-C:H) films. The overall structure of the films consists of a Cr/WC transition layer, a WC/a-C:H transition layer, and an a-C:H functional layer. The study investigated the effects of substrate bias voltages (SBVs) of −580 V, −660 V, −740 V, −820 V, and −900 V on the microstructure, mechanical, and tribological properties of a-C:H films. The findings indicate that different SBVs influence the ionic energy during the deposition of a-C:H films, consequently affecting the film growth. In this case, when the SBV is -820 V, C+ with sufficient energy will penetrate beneath the initial layer in the form of shallow injection. Therefore, compared to other experimental groups, the a-C:H films prepared under this condition have the lowest Ra value (0.42 nm), the highest sp3 CC bond content (39.88 %), the maximum hardness (31.6 GPa), the lowest friction coefficient (0.052), and the smallest wear rate (7.48 × 10−8 mm3/(N·m)), demonstrating significantly better mechanical and tribological properties. The a-C:H films, prepared at different SBVs, are deposited on micro-drill surfaces for hole drilling tests. The experimental results indicate that a-C:H films prepared at SBV of −820 V exhibit the satisfactory drilling performance due to the better mechanical and tribological properties. This is evident not only in the minimal surface wear of the film micro-drill after different drilling quantities but also by the satisfactory quality of the corresponding machined holes. The a-C:H film micro-drill prepared at SBV of −820 V exhibited larger process capability index (CPK) values for the machined holes at 500, 1000, and 2000 hole numbers of 5.449, 3.693, and 3.263 respectively. During the 2000th drill on the printed circuit board (PCB) surface, the hole wall roughness (Rz) and nail head values of the machined hole were measured to be 10.6 μm and 1.3, respectively.

Preparation and properties of high abrasion resistant superhydrophobic coating on the PCB

Abrasion resistance has become the bottleneck restricting the application of superhydrophobic surface. It is extremely necessary to design superhydrophobic surface with high abrasion resistance in practical application environment. However, the coexistence of superhydrophobic property and abrasion resistance is a difficult challenge to balance. In this study, a superhydrophobic coating with high abrasion resistance was obtained in combination with three gradients of roughness/wettability, physical adhesion and chemical coupling on the printed circuit board (PCB) surface. The realization of high abrasion resistance of the coating mainly depended on controlling the curing time of the adhesive layer and the way of air injection, so that the micro-nano structure could achieve the effect of semi-embedded. The PCB surface still maintained superhydrophobicity with the water contact angle higher than 150° after a series of tests such as 800 cycles of tape peeling, 400 cycles of knife scraping, 2600 cm of sandpaper abrasion, 425 g of falling sand impacting, and 60 min of water impacting, which fully proved the high abrasion resistance of the coating and the strong adhesion between the coating and the substrate. The preparation process is high efficiency and suitable for large area application, which will provide an extremely valuable idea for improving the waterproof of PCB and promote the true applications of superhydrophobic coating in many fields.

Printed Circuit Board (PCB) Surface Micro Defect Detection Model Based on Residual Network with Novel Attention Mechanism

Printed Circuit Board (PCB) Surface Micro Defect Detection Model Based on Residual Network with Novel Attention Mechanism

Visual Geometry Group Network for Flexible Printed Circuit Board Surface Defect Classification

Visual Geometry Group Network for Flexible Printed Circuit Board Surface Defect Classification

Detection Algorithm of Surface Defect Word on Printed Circuit Board

For Printed Circuit Board (PCB) surface defect detection, traditional detection methods mostly focus on template matching-based reference method and manual detections, which have the disadvantages of low defect detection efficiency, large errors in defect identification and localization, and low versatility of detection methods. In order to further meet the requirements of high detection accuracy, real-time and interactivity required by the PCB industry in actual production life. In the current work, we improve the You-only-look-once (YOLOv4) defect detection method to train and detect six types of PCB small target defects. Firstly, the original Cross Stage Partial Darknet53 (CSPDarknet53) backbone network is preserved for PCB defect feature information extraction, and secondly, the original multi-layer cascade fusion method is changed to a single-layer feature layer structure to greatly avoid the problem of uneven distribution of priori anchor boxes size in PCB defect detection process. Then, the K-means++ clustering method is used to accurately cluster the anchor boxes to obtain the required size requirements for the defect detection, which further improves the recognition and localization of small PCB defects. Finally, the improved YOLOv4 defect detection model is compared and analyzed on PCB dataset with multi-class algorithms. The experimental results show that the average detection accuracy value of the improved defect detection model reaches 99.34%, which has better detection capability, lower leakage rate and false detection rate for PCB defects in comparison with similar defect detection algorithms.

Using machine learning algorithms to predict failure on the PCB surface under corrosive conditions

A printed circuit board (PCB) surface can fail by corrosion due to various environmental factors. This paper focuses on machine learning (ML) techniques to build predictive models to forecast PCB surface failure due to electrochemical migration (ECM) and leakage current (LC) levels under corrosive conditions containing the combination of six critical factors. The modeling methodology in this paper used common supervised ML algorithms by accomplishing significant evaluation metrics to show the performance of each algorithm. The conclusion of this study presents that ML algorithms can create predictive models to forecast PCB failures and estimate LC values effectively and quickly.

Development of Subsurface Magnetic Field Imaging System for Visualizing Electric Current Distribution inside Electronic Components and Storage Batteries

Recently, miniaturization and three-dimensional integration for improving the performance of electric devices have been accelerated, and smaller storage batteries with higher energy density and shrinked electric components have been more required. Therefore, failure analysis technologies targeted for these cutting-edged devices should be developed for increasing production yields and reducing product accidents. In mass production processes, pre-shipment inspections are performed on the core parts of electronic devices. In the case of electronic parts, energization check is adopted, and in the case of storage batteries, voltage drop, that is called to be an aging test, is checked. However, many cases have been reported in which products, that have passed the inspection, cause accidents. One of the typical causes of failures related about electronic components is internal electric-short caused by foreign matters mixed into the insulation or whiskers accidentally generated from the electrodes and wiring. Similarly, storage batteries also accidentally have internal short circuits due to foreign matter contaminations and dendrite formation at the electrodes. The internal short-circuited points of electronic components and storage batteries are identified by X-ray imaging method. However, it is difficult to acquire the contrast due to the lack of the dynamic range required for visualization of short-circuited parts because the wirings and insulation areas between electrodes have been significantly miniaturized. In addition, short circuits between wirings on the surface of electronic circuit boards have been visualized by thermography, although it is difficult to apply electronic components with multi-layered electrodes.Then we have focused on the relationship between the electric current distribution inside the devices and the magnetic field generated from it and spread toward outside, we have succeeded in deriving the analysis solution of the inverse problem for the first time. Combining this novel theory and a highly-sensitive magnetic field detection based on quantum effect, we have developed a subsurface electric current imaging system capable of detecting electric short-circuited points in the deep region. In this study, we discuss about the details of the theory about the analytical solution of the inverse problem and the visualization system, and show some results of failure analysis for actual electronic components and storage batteries.[1] Yuki Mima, Noriaki Oyabu, Takeshi Inao, Noriaki Kimura, Kenjiro Kimura, “Failure analysis of electric circuit board by high resolution magnetic field microscopy” Proceedings of IEEE CPMT Symposium Japan, pp.257-260, 2013.[2] Kenjiro Kimura, Yuki Mima, Noriaki Kimura, “Local electric current reconstruction theory for nondestructive inspection inside battery cell using magnetic field measurement”, Subsurface Imaging Science & Technology, 1, 1, pp.1-16, 2017.[3] Shogo Suzuki, Hideaki Okada, Kai Yabumoto, Seiju Matsuda, Yuki Mima, Noriaki Kimura, and Kenjiro Kimura, “Non-destructive visualization of short circuits in lithium-ion batteries by a magnetic field imaging system”, Japanese Journal of Applied Physics, Vol 60, No 5, pp.056502-1-4, 2021.

Time to Failure Prediction on a Printed Circuit Board Surface Under Humidity Using Probabilistic Analysis

Time to Failure Prediction on a Printed Circuit Board Surface Under Humidity Using Probabilistic Analysis

Optimization for maximum extraction of solder from waste PCBs through grey relational analysis and Taguchi technique

Recycling of waste printed circuit boards (WPCBs) is desirable to protect the environment and recover the valuable materials. In this regard, dissolution of solder is a key step to recycle the WPCBs. In this work, optimization for maximum dissolution of solder with minimum dissolution of copper is carried out by using Taguchi optimization method. Grey Relational Analysis (GRA) is used for converting multi-response into single response on the basis of Grey Relational Grade (GRG) value. The optimal solution is then achieved by applying Taguchi method on the GRG values achieved from GRA. The results show optimal control factors value of 2.5 mol/l (HBF4), 0.40 mol/l (H2O2), 3.0 % HNO3 and 40 min with maximum Signal/Noise ratio (S/N) −8.31. The treated WPCB with above chemical concentration and time exhibits the complete dissolution of solder and removal of the components without any undesired effect of fading of colour, symbol and characters on the printed circuit board (PCB) surface.

Comparative study of spark pin-array and printed circuit board surface plasma pre-ionization systems for transversely excited atmospheric CO2 laser performance

The performance of a homemade transversely excited atmospheric CO2 laser, capable to be alternatively run using UV spark pin-array (SPA) and printed circuit board (PCB) surface plasma pre-ionization systems, is comparatively studied. The pin-array configuration is comprised of two rows of 5 mm spark gaps symmetrically located on either side of the discharge volume. The surface plasma pre-ionization system consists of a PCB of which, one side is patterned with isolated millimeter size circular pieces. The performance of both types of pre-ionization in different working conditions was experimentally investigated and the output energies were compared with each other as well as the simulation results based on the six-temperature vibrational-rotational model. It has been found that the SPA system provides better discharge stability and uniformity with higher output energies, while using the PCB surface plasma configuration allowed the laser to operate with higher gas lifetime and lowered the need for helium in its gas mixture.

Research on Furnace Temperature Curve Based on Heat Convection and Heat Radiation

Insights into the mechanism of reflow soldering temperature curve, a mathematical model of the temperature change of the circuit board surface is established. The heat transfer methods, heat radiation and heat convection is analyzed in detail. The curve of air temperature inside the reflow furnace is solved by establishing an one-dimensional heat conduction model and fitting coefficients. The heat radiation received by the circuit board mainly comes from the small temperature zone. Depending on the area where the circuit board is located, heat radiation is itemized into 3 types: heat radiation in the gap, the temperature zone and the adjacent temperature zone of the area before and after the furnace. The impacts of heat radiation is weighted and analyzed by relative distance. For coefficients, analyzing and fitting is further discussed.

Heat transfer aspects of condensation during vapour phase soldering on aligned PCB-based surfaces

PurposeThe paper aims to present an investigation on heat transfer in a vapour phase soldering (VPS) oven, focusing on the differences of horizontally and vertically aligned Printed Circuit Board (PCB) surfaces. The investigation can help develop a better understanding of the process and provide information for future modelling of the process.Design/methodology/approachFor the investigations, flame retardant grade 4 (FR4) PCB plates and sealed plate–based boxes were immersed into saturated vapour of an experimental oven. The temperature and resulting heat transfer coefficients were analysed according to the sample boxes and the surface orientations. In addition, the boxes’ vapour consumption was investigated with pressure measurements.FindingsThe horizontal top- and bottom-side heating shows very similar results. In addition, the sides of a box were heated in a manner similar to the top and the bottom sides, but there was a slight increase in the heat transfer coefficient because of the vertical wall alignment. The pressure measurements reveal the dynamic changes in vapour after immersion of the boxes.Practical implicationsThe findings may help to show differences on different surface orientations, pointing to more precise, explicit and multiphysics simulation results.Originality/valueThe experiments present an aspect of heat transfer coefficient differences in VPS ovens, also highlighting the effect of initial pressure drop inside the workspace of an oven.

Low-Density Fan-Out Heterogeneous Integration of MEMS Tunable Capacitor and RF SOI Switch

Abstract Using Low-Density Fan-Out (LDFO) packaging technology, a radio frequency (RF) microelectromechanical systems (MEMS) tunable capacitor array composed of electrostatically actuated beams on 180nm high-voltage CMOS silicon was heterogeneously integrated with a single-pole four-terminal (SP4T) RF switch on 180nm CMOS silicon-on-insulator (SOI). The primary objective of this study was to determine the manufacturability of this System-in-Package (SiP) design, which is proven at time zero through survival of the MEMS device based on acceptable MEMS performance metrics. In addition, the RF SOI switch provides high-voltage electrostatic discharge (ESD) protection for the MEMS device. Capacitive MEMS structures are particularly sensitive to unpredictable electrostatic charging scenarios, such as handling after package assembly and printed circuit board (PCB) surface mount processing. Consequently, resistance to dielectric breakdown by means of robust ESD protection is a very desirable quality. Integrating the RF switch in close proximity with the MEMS device not only enables the ability to withstand charging scenarios in excess of 1kV (human body model), it mitigates the impact of parasitics on RF performance by minimizing interconnect lengths and complexity.

Printed circuit board defect visual detection based on wavelet denoising

In order to realize automatic inspection of printed circuit board (PCB) surface defects, the PCB defect automatic recognition technologies based on image processing and machine vision were studied. Firstly, the detected PCB color image and the standard PCB color image were grayed, and the visual effect of the detected image was improved by wavelet denoising and histogram equalization enhancement techniques. Secondly, the detected image and the standard image were calibrated, and the defects were extracted through the differential processing between them. Thirdly, the defect images were processed by the Otsu image segmentation and morphological method to get the binary images. The defect features were extracted and marked on the images. Finally, the type of the defects was determined according to the defect characteristics and its neighboring image. Five defects such as short circuit, open circuit, sag, bulge and hole, were detected and identified. Experimental results showed that the detectable rate of defects was 100%, and the recognition rate was over 90%, which can meet the need of real-time detection of industrial production lines.

Mechanical Reliability of the Epoxy Sn-58wt.%Bi Solder Joints with Different Surface Finishes Under Thermal Shock

The effect of thermal shock on the mechanical reliability of epoxy Sn-58wt.%Bi composite (epoxy Sn-58wt.%Bi) solder joints was investigated with different surface-finished substrates. Sn-58wt.%Bi-based solder has been considered as a promising candidate for low-temperature solder among various lead-free solders. However, Sn-58wt.%Bi solder joints can be easily broken under impact conditions such as mechanical shock, drop tests, and bending tests because of their poor ductility. Therefore, previous researchers have tried to improve the mechanical property of Sn-58wt.%Bi solder by additional elements and mixtures of metal powder and epoxy resin. Epoxy Sn-58wt.%Bi solder paste was fabricated by mixing epoxy resin and Sn-58wt.%Bi solder powder to enhance the mechanical reliability of Sn-58wt.%Bi solder joints. The epoxy Sn-58wt.%Bi solder paste was screen-printed onto various printed circuit board surfaces finished with organic solder preservatives (OSP), electroless nickel immersion gold (ENIG), and electroless nickel electroless palladium immersion gold (ENEPIG). The test components were prepared by a reflow process at a peak temperature of 190°C. The thermal shock test was carried out under the temperature range of − 40 to 125°C to evaluate the reliability of Sn-58wt.%Bi and epoxy Sn-58wt.%Bi solder joints. The OSP-finished sample showed a relatively higher mechanical property than those of ENIG and ENEPIG after thermal shock. The average number of cycles for epoxy Sn-58wt.%Bi solder with the OSP surface finish were 6 times higher than that for Sn-58wt.%Bi solder with the same finish. The microstructures of the solder joints were investigated by scanning electron microscopy, and the composition of the intermetallic compound (IMC) layer was analyzed by using energy dispersive spectrometry. Cu6Sn5 IMC was formed by the reaction between Sn-58wt.%Bi solder and a OSP surface-finished Cu after the reflow process. Ni3Sn4 IMC and (Ni, Pd)3Sn4 IMC were formed at the solder joints between the ENIG and solder, and between ENEPIG surface finish and solders, respectively.

A model for the reflection of terahertz signals from printed circuit board surfaces

AbstractBased on vector network analyzer Measurements, a model for the specular reflection behavior of printed circuit boards in the Terahertz range has been derived. It has been calibrated to suit the behavior of the measurements using a simulated annealing algorithm. The model has been tailored for integration to ray-tracing-based propagation modeling.