Circuit Board Layout Research Articles

A quadratically convergent local algorithm on minimizing sums of the largest eigenvalues of a symmetric matrix

In this paper, we consider the problem on minimizing sums of the largest eigenvalues of a symmetric matrix which depends on the decision variable affinely. An important application of this problem is the graph partitioning problem, which arises in layout of circuit boards, computer logic partitioning, and paging of computer programs. Given ∈≥0, we first derive an optimality condition which ensures that the objective function is within ∈ error bound of the solution. This condition may be used as a practical stopping criterion for any algorithm solving the underlying problem. We also show that, in a neighborhood of the minimizer, the optimization problem can be equivalently formulated as a smooth constrained problem. An existing algorithm on minimizing the largest eigenvalue of a symmetric matrix is shown to be applicable here. This algoritm enjoys the property that if started close enough to the minimizer, then it will converge quadratically. To implement a practical algorithm, one needs to incorporate some technique to generate a good starting point. Since the problem is convex, this can be done by using an algorithm for general convex optimization problems (e.g., Kelley's cutting plane method or ellipsoid methods), or an algorithm specific for the optimization problem under consideration (e.g., the algorithm developed by Cullum, Donath, and Wolfe). Such union ensures that the overall algorithm has global convergence with quadratic rate. Finally, the results presented in this paper are readily extended on minimizing sums of the largest eigenvalues of a Hermitian matrix.

A framework for a knowledge-based approach for designing electronic circuits and systems

This paper reports the progress made in the development of an electronic circuit design tool in an expert system environment. The objective of this knowledge-based system is the entire process of designing electronic circuits including determination of the appropriate circuit configuration, component selection and value calculation, specification of circuit layout, simulation of circuit operation, and automatic design of an appropriate printed circuit board layout. To determine the feasibility of this project, a prototype expert system has been developed to select the most appropriate integrated circuit chip for a dc-dc converter using a commercially available expert system shell, “MicroExpert”. One of the main advantages of the approach adopted is expected to be a reduction in the time needed to design and simulate circuits from weeks to days.

PCB layout generation from RTL specifications

Abstract Automatic printed circuit board (PCB) layout generation is currently achieved through the use of several independent CAD systems. A register transfer level (RTL) based design automation system provides a viable alternative to existing methods of PCB layout generation. In this paper, the design and implementation of a software processor that generates a PCB layout using SSI/MSI components from the logical circuit provided by UAHPL, an RTL language, is presented.

Thermal-Fluid Interactions of Neighboring Components on Air-Cooled Circuit Boards

The effects of neighboring components on the thermal performance of air-cooled electronic circuit boards are reviewed using a four part framework—identification, anticipation, quantification and optimization. Interactions are categorized as either isothermal fluid flow or thermal-fluid phenomena. Fluid flow phenomena include multi-dimensional, laminar and transitional flow which can have large spatial influences and exhibit unsteady behavior. The importance of all heat transfer mechanisms is demonstrated and the inadequacy of isolated component thermal characterization is illustrated. Effective thermal proximity of a neighboring component is discussed. Current achievements and inadequacies of experimental characterization and predictive models are described. Finally, proactive optimization strategies based upon circuit board layout and exploitation of unsteady flow effects are considered.

Application of simulated annealing to clustering tuples in databases

Techniques for general purpose optimization have been derived from the Metropolis Monte Carlo method of simulating the behavior of particles in substances as they are slowly cooled to form crystals. Simulated Annealing is such a derivative and its value for placement problems (e.g., in circuit board layout design) suggests that it could be advantageously applied to clustering tuples in databases in order to enhance responsiveness to queries. In this article we investigate this issue and compare the performance of this technique with a Graph-Collapsing clustering method which is known to perform very well, in order to gain insights into which approach is better for incorporation in a performance-oriented database design tool. We judge that, whilst the new method does give superior results to the graph-based method in many cases, these improvements are gained at such a very considerable expense of algorithm run time as to rule the new technique out of our consideration as a real world general purpose design tool (but perhaps not for some special-purpose databases). © 1990 John Wiley & Sons, Inc.

Using Content Analysis as an Interface Design Tool

As a precursor to functional analysis, a content analysis was done to guide improvements for the interface design of a printed circuit board design system. Content analysis, as a design tool, requires users to judge the usefulness of task information and then prioritize it based on one or more specified attributes. For this application, content analysis was completed using 11 judges experienced in printed circuit board layout. All judges were asked to work within the context of a particular printed circuit board example. Two attributes, task relevance and order, were considered by judges as they sorted tasks. An inter-rater reliability check was performed and one judge was eliminated from further analysis. From the remaining pool of 10 judges, 32 tasks central to the activity of board layout were discovered. A model was built using cluster analysis and MDS algorithms which was based on relevant tasks, task order and task concurrence. The model was then compared to the current menu structure of a mature design layout interface and recommendations for interface modifications were made. Notes on using content analysis to do interface design and evaluation as well as recommendations for further use are discussed.

An approximation algorithm for the via placement problem

The authors consider the via placement problem that arises in multilayer printed circuit board (MPCB) layout systems. It is shown that this problem can be formulated as an integer linear max-flow problem. Since the integer linear max-flow problem is an NP-complete problem, it is unlikely that one can find an efficient algorithm for its solution. However, a solution to this via placement problem can be obtained by relaxing the integer constraints in the integer linear max-flow problem. A solution to the relaxed linear max-flow problem can be obtained by solving a linear programming problem. The procedure generates in time bounded by a low order polynomial a placement with no more than 2*d/sub OPT/ density, where D/sub OPT/ is the density in an optimal placement.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Radio frequency simulation of a complex printed circuit board layout by the quasi‐static boundary element method

AbstractA method for analysing the electrical effect of a set of conducting strips is presented. This method is applied to modelling the electrical behaviour of conducting tracks on a printed circuit board (PCB). Unlike most other published work, this analysis is not restricted to the case where the tracks are parallel. The problem is formulated in terms of an admittance matrix. A boundary element method incorporating image theory is used to produce a system of linear equations. These are solved to yield the required admittance matrix, which can then be incorporated into a standard circuit analysis package. Comparisons between measured and predicted circuit performance for a complex layout show close agreement up to at least 1 GHz.

Costing the benefits of CAD-based ATE

Many manufacturers have already invested in computer-aided design equipment for the layout of printed circuit boards. The CAD database can be used to generate information for automated test and computer-aided repair, resulting in further dramatic savings in time and labour costs.

Implementation of placement and routing algorithms for computer aided design of printed circuit boards

The Printed Circuit Board (PCB) layout design is one of the most important and time consuming phases during equipment design process in all electronic industries. This paper is concerned with the development and implementation of a computer aided PCB design package. A set of programs which operate on a description of the circuit supplied by the user in the form of a data file and subsequently design the layout of a double-sided PCB has been developed. The algorithms used for the design of the PCB optimise the board area and the length of copper tracks used for the interconnections. The output of the package is the layout drawing of the PCB, drawn on a CALCOMP hard copy plotter and a Tektronix 4012 storage graphics display terminal. The routing density (the board area required for one component) achieved by this package is typically 0.8 sq. inch per IC. The package is implemented on a DEC 1090 system in Pascal and FORTRAN and SIGN(1) graphics package is used for display generation.

Multilayer interconnection problem complexity

An algorithm is given that provides reliable measures of a multilayer interconnection problem complexity. These measures can serve as input data for analysis and other prerouting steps (placement, assignment) of integrated circuit (IC) or printed circuit board (PCB) layout.