Chip Size Research Articles

A 0.18 μm CMOS Millimeter Wave Antenna-on-Chip with Artificial Magnetic Conductor Design

This paper presents a small-size broadband slot monopole chip antenna for millimeter wave application. Using a 0.18 μm CMOS process, through metal_1, the artificial magnetic conductor (AMC) of the metal layer increased the impedance bandwidth of the chip antenna. The additional inverted C branch was used to achieve a better reflection coefficient. By adding an AMC and inverted C branch, the operating frequency of the chip antenna went to 33.8–110 GHz below the reflection coefficient of −10 dB, and its fractional bandwidth was 103.4%. The maximum gain was −6.3 dBi at 72 GHz. The overall chip size was 1.2 × 1.2 (mm2). Through measurement and verification, the proposed antenna reflection coefficient was close to the simulation trend and had better resonance. The frequency range of the chip antenna proposed in this paper covered the 5G NR FR2 band (24.2 GHz–52.6 GHz) and W-band (75 GHz–110 GHz). The proposed chip antenna can be applied to the Internet of Things, Industry 4.0, biomedical electronics, near field sensing and other related fields.

12‐2: Distinguished Student Paper: High efficiency nanowire LEDs for AR/VR displays

Optimized nanowire LEDs exhibiting a narrower radiation pattern and weaker angular color shift are obtained via 3D dipole cloud model. These RGB nanowires are more efficient than their counterpart micro‐LEDs with chip sizes below 20μm, 80μm, and 10μm, respectively. Promising applications such as high‐brightness directional light engines for AR/VR displays are emphasized.

Thermal bubble-driven impedance-based high-throughput cell counting chip design

Cell identification and enumeration are important methods within clinical and research laboratories for rapid diagnosis of relevant diseases. However, there are still many shortcomings in the current cell counting methods. In order to improve the performance of cell counting, a novel impedance-based cell counting chip based on thermal bubble drive was designed in this study. The chip is fabricated by whole-wafer processing and provides the driving force for cells through a combination of thermal bubble nozzles and microfluidic channels, integrating 100 individual detection units on a 38 mm2 size chip. Experimental and theoretical analyses have demonstrated that the chip can achieve high throughput detection of 45 000 beads/s under extreme conditions. A fourfold difference in detection voltage was obtained for both 14 and 7 µm diameter polystyrene beads. The linear fit coefficient of determination between the cell number measured by the chip and the cell number observed in reality was above 0.999 for both polystyrene beads and 211H cells, and the counting accuracy exceeded previous studies. It turns out that the chip achieves portable, low-cost, high-throughput, and high-accuracy cell counting, which is conducive to the development of impedance cell counting.

Wideband Millimeter-Wave SPST Switch in 100-nm GaN-on-Si Using Strong Mutual Coupling

This article proposes a wideband millimeter-wave (mm-wave) single-pole single-throw (SPST) switch using strong mutual coupling. For on-chip switches, it is very challenging to realize wide bandpass characteristics, especially in mm-wave bands. To address this issue, a wideband switch topology using strong mutual coupling has been introduced, based on which the fractional bandwidth of SPST switch can be easily expanded to over 80%. In addition, the coupling structure using coupled lines is investigated to realize strong mutual coupling. For demonstration, one 20-44.8 GHz switch with two transmission poles (TPs) is designed and fabricated in 100-nm GaN-on-Si. Low ON-state minimum insertion loss of 0.62 dB, preferable return losses better than -20 dB, and small chip size of 0.165 are realized, respectively.

A six-digit digital attenuator working in the Sub6G band

A high-performance 3–6 GHz monolithic digital control attenuator chip is designed by using a 0.25 μm GaAs pHEMT process. The circuit adopts a cascade structure of 6 basic attenuation units, and 64 attenuation states are formed by controlling the on-state combination of different attenuation bits, and the attenuation structure connected in parallel to the attenuation resistor is given. The main simulation results show that the designed digitally controlled attenuator takes 0.5dB as the attenuation step, and the maximum attenuation value is 31.5 dB, an insertion loss of less than 2.55 dB, a return loss better than -15 dB, an attenuation accuracy of less than 0.5 dB for all states, an additional phase shift of less than -5°, a root mean square error better than 0.23 dB of attenuation amplitude, and chip size of 1.88 mm×1.0 mm.

Impact of Microfluidic Chip Electrophoresis in Modern Analysis: An Update on Recent Trends

Abstract: The recent development of microfluidics and lab-on-a-chip technology has substantially raised interest in analytical chemistry. Since, they have demonstrated to be extraordinarily adept at precise fluid control, cell manipulation, and signal output, microfluidic chips are a useful tool for quick and in-depth single-cell investigation. This technique is cost-effective, less time-consuming, automatic, high mobility, and fast separation technique. Due to the internal chip sizes, which range from micrometers to millimeters, consumption of the samples and reagents occurs at the nanoliter and picoliter levels. The microfluidic device can fit a variety of functions onto a few centimeter-long chips. In this article, we discussed numerous preparations of microfluidic chip electrophoresis and its recent advancements. This method is useful for the detection of various small amounts of content with less time and greater efficacy. It is also useful in cancer studies, 3D inkjet printing, immunoassay investigation in cell-cell interactions, analysis of nanoparticles, dielectrophoretic particle separation, plant alkaloids, and forensic science applications. This review, therefore, examines the use of various microfluidic chips in electrophoretic separation during 2017–2022. There are various papers found by search, indicating continuous activity in the research area along with studies to explain its material, method, and its efficacy.

Coupled Excitation Strategy for Crack Initiation at the Adhesive Interface of Large-Sized Ultra-Thin Chips

The initial excitation of interface crack of large-size ultra-thin chips is one of the most complicated technical challenges. To address this issue, the reversible fracture characteristics of a silicon-based chip (chip size: 1.025 mm × 0.4 mm × 0.15 mm) adhesive layer interface was examined by scanning electron microscope (SEM) tests, and the characteristics of a cohesive zone model (CZM) unit were obtained through peel testing. The fitting curve of the elastic bilinear model was in high agreement with the experimental data, with a correlation coefficient of 0.98. The maximum energy release rate required for stripping was GC = 10.3567 N/m. Subsequently, a cohesive mechanical model of large-size ultra-thin chip peeling was established, and the mechanical characteristics of crack initial excitation were analyzed. The findings revealed that the larger deflection peeling angle in the peeling process resulted in a smaller peeling force and energy release rate (ERR), which made the initial crack formation difficult. To mitigate this, a coupling control method of structure and force surface was proposed. In this method, through structural coupling, the change in chip deflection was greatly reduced through the surface coupling force, and the peeling angle was greatly improved. It changed the local stiffness of the laminated structure, made the action point of fracture force migrate from the center of the chip to near the edge of the chip, the peeling angle was increased, and the energy release rate was locally improved. Finally, combined with mechanical analysis and numerical simulation of the peeling process, the mechanical characteristics of peeling were analyzed in detail. The results indicated that during the initial crack germination process, the ERR of the peel interface is significantly increased, the maximum stress value borne by the chip is significantly reduced, and the peel safety and reliability are greatly improved.

Leaky FinFET for Reservoir Computing with Temporal Signal Processing.

Reservoir computing can greatly reduce the hardware and training costs of recurrent neural networks with temporal data processing. To implement reservoir computing in a hardware form, physical reservoirs transforming sequential inputs into a high-dimensional feature space are necessary. In this work, a physical reservoir with a leaky fin-shaped field-effect transistor (L-FinFET) is demonstrated by the positive use of a short-term memory property arising from the absence of an energy barrier to suppress the tunneling current. Nevertheless, the L-FinFET reservoir does not lose its multiple memory states. The L-FinFET reservoir consumes very low power when encoding temporal inputs because the gate serves as an enabler of the write operation, even in the off-state, due to its physical insulation from the channel. In addition, the small footprint area arising from the scalability of the FinFET due to its multiple-gate structure is advantageous for reducing the chip size. After the experimental proof of 4-bit reservoir operations with 16 states for temporal signal processing, handwritten digits in the Modified National Institute of Standards and Technology dataset are classified by reservoir computing.

HF-Free Microwave-Assisted Synthesis of Nano-Micro-Sized K2 SiF6 :Mn4+ for MicroLED Color Conversion.

Micro-light-emitting diodes (MicroLED) are considered to be the next generation of ideal display devices, with chip size requirements of less than 50µm. To meet its micron-scale pixel size, submicron luminescent materials are needed. Mn4+ doped fluoride phosphor, K2 SiF6 :Mn4+ (KSFM) as a red luminescent material with excellent narrow-band emission sensitivity to human eyes, has great potential as a color conversion material for full-color MicroLED. However, it is difficult to obtain small-size KSFM efficiently by conventional synthesis methods. Here, a simple HF-free strategy for the rapid batch synthesis of nano-micro-sized KSFM based on a microwave-assisted method is reported. The synthesized KSFM shows uniform morphology, average particle size is less than 0.2µm, and has 89.3% internal quantum efficiency under 455nm excitation. It exhibits excellent thermal stability (97.4%@423 K of the integrated emission intensity at 298 K) and prominent moisture resistance (81.9% of its initial relative emission intensity after immersing in water for 30min). By employing it as a red emitter, the authorsfabricate high-performance white LEDs with high luminous efficacy of 116.1lmW-1 and wide color gamut of 130.4% NTSC. In addition, self-luminous red-emitting arrays with a pixel size of 20 ×40µm are constructed by nanoimprinting as-synthesized KSFM.

Extraction, purification and characterization of an arabinogalactan from frost (riverbank) grape (Vitis riparia Michx.) stems

This study investigated the extraction and properties of an arabinogalactan polysaccharide from frost grape (FGP) as a potential alternative to gum arabic (GA). Collection date, solvent:feed ratio (S:F), chip size, C-18 filtration, ultrafiltration, freeze drying versus spray drying, methanol pre-extraction, and water absorption were examined. Sugar composition, elemental analysis, dietary fiber content, emulsification activity index (EAI), emulsification stability index (ESI), and viscosity were used to evaluate the extracts. Exudates collected in March from live stems were viscous with high percentage solids and FGP, while May collections were watery with low percentage solids and FGP. Frost grape stems were collected, chipped, and classified by size. The extraction system utilized pressure or vacuum to increase contact between the chips and extraction water. A S:F ratio of ca. 24% gave an excellent yield of FGP. Chips between 1.8 and 3.8 mm gave the highest mass yields. Pre-extracting the chips with methanol and C-18 filtration of the water extract both yielded a lighter product. The EAI for the FGP was higher than that for GA; however, its ESI was lower. Ultrafiltration of the crude extract separated glucose, fructose, and sucrose from the FGP. FGP with glucose, fructose, and sucrose adsorbed water and became darker.

Influence of storage time and log length on the distribution of wood chip size

Chip size distribution is important in kraft pulping, as it affects chemical use, quality, and yield in pulp production. Pinus taeda logs with two storage periods (0 and 2 weeks) and two log lengths (2.4 and 7.0 m) were processed with a disc chipper. Logs stored for two weeks produced chips with 7% less moisture than logs with no storage period. The storage period significantly influenced the quantities of overthick, accept, pin, and fines classes. Logs stored for two weeks produced 1.7% more overthick, 3.8% more pin, and 1.1% fines than logs with no stocking period. Consequently, the amount of accept produced was 6.2% higher for chips from processing freshly harvested logs. Log length influenced the produced quantities of oversize, overthick, and accept. Logs with a length of 2.4 m produced chips with 1.4% more oversize, 2.5% more overthick, and 4.6% less accept, compared to 7.0 m logs. Thus, it was concluded that Pinus taeda logs with shorter storage periods and longer lengths generate more chips in the “accept” class.

Improving the Performance of Antenna-on-Chip by Effectively Illuminating the Artificial Magnetic Conductors Through Coupling Enhancement Structures

An antenna-on-chip (AoC) suffers from low radiation efficiency and gain because of the highly conductive silicon substrate used in standard complementary metal–oxide–semiconductor (CMOS) processes. Placing an artificial magnetic conductor (AMC) surface underneath the AoC not only isolates the antenna from the lossy substrate but also boosts its performance through in-phase reflection. Ideally, the AMC, which has a periodic structure, should be infinite in size, but practical chip sizes limit its dimensions. The gain of an AMC-backed AoC shows a positive correlation with the AMC lateral area. However, in the ultrathin stack-up of standard CMOS processes, the AMC cannot be irradiated uniformly by the antenna because of the physical illumination issue, so the AoC gain does not increase with the AMC area after the initial increase. To improve the illumination of the AMC by an AoC, this work introduces coupling enhancement structures (CES) that employ the available metal layers of the stack-up. The proposed AMC-backed AoC with CES demonstrates a gain of 9.8 dBi and radiation efficiency of 71% at 94 GHz, which are improvements of 4.3 dB in gain and 23% in radiation efficiency, respectively, compared to an AoC backed by a conventional AMC.

A Single-Side Micromachined MPa-Scale High-Temperature Pressure Sensor.

This paper proposes a piezoresistive high-temperature absolute pressure sensor based on (100)/(111) hybrid SOI (silicon-on-insulator) silicon wafers, where the active layer is (100) silicon and the handle layer is (111) silicon. The 1.5 MPa ranged sensor chips are designed with the size as tiny as 0.5 × 0.5 mm, and the chips are fabricated only from the front side of the wafer for simple, high-yield and low-cost batch production. Herein, the (100) active layer is specifically used to form high-performance piezoresistors for high-temperature pressure sensing, while the (111) handle layer is used to single-side construct the pressure-sensing diaphragm and the pressure-reference cavity beneath the diaphragm. Benefitting from front-sided shallow dry etching and self-stop lateral wet etching inside the (111)-silicon substrate, the thickness of the pressure-sensing diaphragm is uniform and controllable, and the pressure-reference cavity is embedded into the handle layer of (111) silicon. Without the conventionally used double-sided etching, wafer bonding and cavity-SOI manufacturing, a very small sensor chip size of 0.5 × 0.5 mm is achieved. The measured performance of the 1.5 MPa ranged pressure sensor exhibits a full-scale output of approximately 59.55 mV/1500 kPa/3.3 VDC in room temperature and a high overall accuracy (combined with hysteresis, non-linearity and repeatability) of 0.17%FS within the temperature range of -55 °C to 350 °C. In addition, the thermal hysteresis is also evaluated as approximately 0.15%FS at 350 °C. The tiny-sized high temperature pressure sensors are promising in various industrial automatic control applications and wind tunnel testing systems.

Evaluation of chip seal mixture design methods using modified Hamburg wheel tracking test and sweep test

The objective of this study was to identify the most effective chip seal design method and chip sizes by conducting a modified Hamburg wheel tracking test and sweep test. Three chip seal design methods, including Austroads, McLeod, and Vietnam methods, were evaluated to design several chip seal mixtures with varying aggregate sizes (e.g., 12.5, 9.5, 4.75, and 2.36 mm) and binder types. To assess the performance of the chip seal mixtures, aggregate loss and bleeding susceptibility were measured. The sweep test was utilized to determine the amount of aggregate loss caused by the sweeping effect, while the modified Hamburg wheel tracking (HWT) test was developed to estimate the aggregate loss caused by the braking effect using a fixed pneumatic rubber tire. Additionally, a modified Hamburg wheel tracking test with a rolling pneumatic rubber tire was used to assess bleeding susceptibility, and the bleeding area was quantified using an image analysis process. The results indicated that the Austroads design method exhibited the lowest aggregate loss compared to the McLeod and Vietnam methods. Moreover, the consistent findings from both the sweep test and modified HWT test demonstrated the feasibility of using the modified HWT test to simulate aggregate loss caused by the braking effect. The bleeding percentage was found to be affected not only by the binder application rate but also by the aggregate size and the number of layers applied. The Austroads and McLeod chip seal mixtures exhibited an approximately 20 % lower bleeding percentage than that of the Vietnam mixtures. Finally, for a single chip seal, a 9.5 mm chip aggregate was determined to be the optimal size, while for a double chip seal, 4.75 mm and 2.36 mm chips were recommended.

A 3D Scalable Chamber-Array Chip for Digital LAMP.

As an absolute quantification method at the single-molecule level, digital PCR (dPCR) offers the highest accuracy. In this work, we developed a 3D scalable chamber-array chip that multiplied the number of partitions by stacking chamber-array layers and realized digital loop-mediated isothermal amplification to quantify DNA molecules. It greatly increases the number of partitions to improve the performance of dPCR without increasing the chip size, the operation workflow complicity, and operation time. For the three-chamber-array-layer chip which contains 200,000 reactors of a 0.125 nL volume, it has been proved that the reagent filling and partition were finished within 3 min, and the whole detection could be finished within 1 h. The method demonstrated that it could be scalable to a six-chamber-array layer, which contains 400,000 reactors without increasing the size of the chip and the complication of filling/partition workflow but only takes an additional hour for scanning. Due to its potential for high throughput, low cost, and simple operation, our device may significantly expand the clinical application range of dPCR.

Efficiency enhancement of submicron‐size light‐emitting diodes by triple dielectric layers

AbstractMicro‐LED (light‐emitting diode) is an emerging technology that produces superiorly bright, efficient, and high‐resolution display. However, efficiency drop at small chip sizes is one of the major hurdles for cost‐effectiveness and ultra‐compact form factor. We demonstrate highly efficient submicron‐scale nanorod LEDs (nLEDs) passivated by the triple dielectric layers. The diameter, length, and wavelength at a peak external quantum efficiency (EQE) of nLEDs are 580 nm, 5 μm, and 460 nm, respectively. We report a peak EQE of 22.2 ± 0.3% with HfO2‐based triple dielectric layer. We also explore the relation of indium fluctuation in multi‐quantum wells (MQWs) to sidewall effect of micro‐LEDs. We show that higher indium contents in MQWs successfully reduce non‐radiative recombination on sidewall of InGaN blue nLEDs.

Designed on 0.18 μm CMOS Process Small Size Broadband Millimeter Wave Chip Antenna

This paper proposes a small-size broadband triangular monopole chip antenna for millimeter wave band applications. Process using 0.18 μm CMOS process and antenna design using Met-al_6. Triangular patch design and feed line length analysis to achieve a better reflection coefficient and also dig three circular slots at the grounding point to achieve better impedance matching. The operating frequency of the chip antenna is 62–100 GHz below the reflection coefficient −10 dB standard, with a fractional bandwidth of 54%. The maximum gain is −0.4 dBi at 64 GHz. The efficiency is 40.9%. The overall chip size is 1.2 × 1.2 (mm2). After measurement and verification, the proposed antenna reflection coefficient is similar to the simulation trend and has better resonance. The chip antenna frequency range proposed in this article covers the 5G NR FR2 frequency band. The proposed chip antenna can be applied in related fields such as the Internet of Things, Industry 4.0, and biomedical electronics.

High‐efficiency nanowire light‐emitting diodes for augmented reality and virtual reality displays

AbstractThrough 3D dipole cloud model, RGB (red, green, and blue) nanowire light‐emitting diode (LED) structures are geometrically optimized to exhibit a narrower radiation pattern, weaker angular color shift, and higher optical efficiency. In comparison with micro‐LEDs whose external quantum efficiency is dependent on the mesa size, these RGB nanowire LEDs are more efficient than micro‐LEDs when the chip size is below 20, 80, and 10 μm, respectively. As a result, nanowire LED is a promising candidate for augmented reality and virtual reality displays where high‐resolution density and efficient directional light emission are desired.

Ultrasensitive bacterial sensing using a disposable all-in-one amperometric platform with self-noise cancellation

The early detection of very low bacterial concentrations is key to minimize the healthcare and safety issues associated with microbial infections, food poisoning or water pollution. In amperometric integrated circuits for electrochemical sensors, flicker noise is still the main bottleneck to achieve ultrasensitive detection with small footprint, cost-effective and ultra-low power instrumentation. Current strategies rely on autozeroing or chopper stabilization causing negative impacts on chip size and power consumption. This work presents a 27-μW potentiostatic-amperometric Delta-Sigma modulator able to cancel its own flicker noise and provide a 4-fold improvement in the limit of detection. The 2.3-mm2 all-in-one CMOS integrated circuit is glued to an inkjet-printed electrochemical sensor. Measurements show that the limit of detection is 15 pArms, the extended dynamic range reaches 110 dB and linearity is R2 = 0.998. The disposable device is able to detect, in less than 1h, live bacterial concentrations as low as 102 CFU/mL from a 50-μL droplet sample, which is equivalent to 5 microorganisms.

Study of the Movement of Chips during Pine Wood Milling

Circumferential milling is used in wood processing, yet it generates vast quantities of dust and chips in a single pass, highlighting the need to predict chip dispersion and prevent associated hazards. This article presents findings from a theoretical and experimental analysis of chip size and kinematics of pine wood during cutting. A chip diffusion boundary surface model was established and its key parameters were determined through CCD testing. Results reveal that chip diffusion can be divided into three distinct areas based on motion state: main diffusion, random diffusion, and vortex. Notably, spindle speed and feed rate are most influential on the orthogonal diffusion angle of the main diffusion zone, whereas cutting depth most heavily impacts the top view diffusion angle. Chip scattering on the table showed an exponential increase in average chip size with sampling distance, whereas the boundary surface model accurately characterizes chip motion and demonstrates a reasonable degree of reliability, offering potential in predicting chip morphology and diffusion state. This model has important implications for wood milling practices, particularly in controlling chip dispersion.