Semiconductor Fabrication Research Articles

Astrophotonics-current capabilities and the road ahead [Invited

Astrophotonics represents a cutting-edge approach in observational astronomy. This paper explores the significant advancements and potential applications of astrophotonics, highlighting how photonic technologies stand to revolutionize astronomical instrumentation. Key areas of focus include photonic wavefront sensing and imaging, photonic interferometry and nulling, advanced chip fabrication methods, and the integration of spectroscopy and sensing onto photonic chips. The role of single-mode fibers in reducing modal noise, and the development of photonic integral field units (IFUs) and arrayed waveguide gratings (AWGs) for high resolution, spatially resolved spectroscopy will be examined. As part of the Sydney regional-focus issue, this review aims to detail some of the current technological achievements in this field as well as to discuss the future trajectory of astrophotonics, underscoring its potential to unlock important new astronomical discoveries.

Fabrication of High-Density Microarchitected Tungsten via DLP 3D Printing.

Current additive manufacturing (AM) techniques for tungsten, such as powder bed fusion and directed energy deposition, often generate parts with rough surfaces. Vat photopolymerization presents a promising alternative for fabricating tungsten structures with high shape fidelity and low surface roughness. However, existing vat photopolymerization approaches suffer from surface defects and low final density, leading to compromised mechanical properties. Therefore, achieving high-density tungsten structures using vat photopolymerization remains a crucial challenge. This work presents a straightforward and reliable method for fabricating complex, micro-architected tungsten structures with superior density and hardness. The approach utilizes a water-based photoresin with exceptional tungsten ion loading capacity. The photoresin is then patterned using digital light processing (DLP) to create tungsten-laden precursors. A three-step debinding and sintering process subsequently achieves 3D tungsten structures with dense surface morphology and minimal internal defects. The microstructures achieve a minimum feature size of 35µm, a low surface roughness of 2.86µm, and demonstrate exceptional mechanical properties. This new method for structuring tungsten opens doors to a broad range of applications, including micromachining, collimators, detectors, and metamaterials.

(Dielectric Science and Technology Division Poster Award, 1st Place) The Influence of Pad Micro-Features on Chemical Mechanical Polishing (CMP) Performance: Insights from Computational Fluid Dynamics (CFD)

With semiconductor chip dimensions shrinking below 7 nanometers, Chemical Mechanical Planarization (CMP) becomes more critical [1], [2]. To meet the increasing demand for precision and uniformity in the fabrication of wafers and chips, enhancements in CMP consumables and operating conditions are necessary. To address these requirements, novel pad designs have been developed, particularly those that do not require conditioning [3]. It is known that the CMP polishing rate depends on pressure, pad wafer relative velocity, and the distribution of pad asperities [4]. As conventional pads provide small and random contact areas, the external pressure applied by the head determines the material removal rate (MRR) [5] Advanced pads with micro-features provide more contact areas and help deliver consistent pressure and slurry distribution during Chemical Mechanical Polishing (CMP) [6], [7]. This study uses computational fluid dynamics (CFD) to simulate the flow between pad and wafer surfaces to determine how pad surface micro-features affect the CMP process. The abrasive residence time, total fluid pressure, and slurry flow velocity are evaluated for four distinct pad micro-feature geometries: square, square-circle, circle, and ellipse. Increasing the number of edges in the pad micro-feature patterns increases pressure drop, leading to more interaction between pad and slurry and enhancement of MRR. The findings of this study confirm the effectiveness of micro-featured pads in optimizing CMP processes and provide valuable insights into the influence of microfeature geometries on critical parameters for improving the semiconductor fabrication process.[1] J. Seo, Journal of Materials Research, 36, 235–257, Jan, 2021.[2] B. Suryadevara, Advances in Chemical Mechanical Planarization (CMP). Woodhead Publishing, 2021.[3] S. Lee and E. Hwang, “Smart pad fabrication for CMP,” LMA Res Rep, vol. 10, pp. 100–104, 2002.[4] G. Ahmadi and X. Xia, J Electrochem Soc, 148, G99, 2001.[5] X. Xia and G. Ahmadi, Particulate Science and Technology, 20, 187–196, 2002.[6] S. Lee, G. Kim, M. Mcgahay, H. Kim, and H. Cho, “Pad Designs-To navigate the fundamentals of CMP.”[7] M. Mcgahay, G. Kim, S. Lee, H. Cho, and H. Kim, “Critical Feature Size of Polishing Pad and Its Performance.”

(Invited) Optical Excitations and Growth in Layered Organic Metal Halide Semiconductors

Hybrid organic metal halides, such as CH3NH3PbI3, have garnered attention because they are earth-abundant, solution-processable materials that can be used to form solar cells with high power conversion efficiency (>20%). There are significant questions about the unusual electronic properties of this class of materials because of the coupling between excitations and the lattice. We will present our work investigating the optoelectronic properties of layered organic metal halide systems and the relationship to structure and growth conditions. We will discuss the nature of optical excitations in layered compounds of the class R2PbX4 where R is an organic cation and X is a halide. These systems show signatures of unusually strong optical frequency magnetic dipole transitions that can be understood through self-trapped exciton formation. We will then discuss how mechanical strain during growth influences broad photoluminescence in a model layered system based on the large cation ethylammonium (EA) with the structure (EA)2(EA)n-1PbnBr3n+1. In this system the emission is strongly impacted by growth-induced strain in thin films quantified using X-ray scattering. Our results suggest that broad emission, relevant for LEDs, can be tuned in thin films. Recent work on how growth impacts the behavior of low dimensional system will also be presented.

Decoding CMP Challenges: A Metrospection Insight

We live in a digitally connected world with Global data to exceed 180 ZB by 2025 per some estimates1. Memory is the fiber connecting our world. New applications drive continued demand growth for memory and storage applications. Micron is a leader in the memory and storage industry, helping the world use information to enrich lives. As memory devices scale and new memory technologies arise, the requirements for Chemical Mechanical Planarization (CMP) processes are becoming tighter and more stringent node over node. Furthermore, memory scaling continues to become more dependent upon CMP, with not only a steady increase in the number of CMP steps but that of unique CMP steps as well node over node. In this presentation we focus on CMP challenges from a METROSPECTION (Metrology & Inspection) lens. We explore the critical role of inspection and metrology techniques in optimizing CMP for semiconductor memory fabrication. The ability and need for the integration of cutting-edge inspection techniques and metrology strategies emerges as a pivotal element in enhancing CMP cycles of learning and hence the reliability, yield, and overall quality of semiconductor memory devices.1 - Statista

Investigation of Cu Corrosion Defects Induced by Humidity Imbalance in the Cu Damascene Process of Semiconductors

As integrated circuit design rules shrink in semiconductor, Copper (Cu) has been employed as the back end of line (BEOL) interconnect metal to enhance device performance through reduced resistivity and resistive-capacitive delay.[1] However, Cu metal lines are prone to degradation caused by Cu oxidation-induced defects, including extrusions and voids, owing to their inherent properties.[2] Consequently, it becomes essential to regulate the oxidation rate during the chip fabrication process, particularly when the Cu metal line is exposed during the Damascene process. This control is crucial for ensuring long-term reliability and achieving a higher yield.[3]From the learning of earlier technological nodes, we are aware to and already precisely controlling both process queue time and wafer surface humidity. We must exercise control over the queue time, addressing both inter-process intervals and in-process queuing. [4] This underscores the importance of managing queue time and maintaining low environmental humidity to mitigate wafer surface defects when the FOUP (Front Opening Unified Pod) is opened at the EFEM (Equipment Front End Module).[5] Those humidity and queue times related Cu corrosion defects have been mitigated by N2 purge in FOUP and reducing the wafer quantity. However, dividing the lot, typically consisting of 25 wafers, by half or less to reduce queue times leads to an imbalance in low humidity due to N2 purging. This occurs when the FOUP is opened in EFEM.This paper examines Cu corrosion under low humidity conditions in a FOUP with a small quantity of wafers, specifically examining the influence of queue time during N2 purging in the EFEM. Through simulation of the interaction between the inlet air entering the EFEM and the purged N2 gas, a vulnerable area is identified where copper oxidation takes place. In addition, we propose an arrangement to mitigate high humidity, supported by experiments conducted under real equipment conditions.Fig. 1 shows Cu corrosion defects after ILD etching at around 20% RH in the FOUP. This defect is only observed in the lower slot of the FOUP on the N2 purged load port. Figure 2 illustrates a chart depicting the humidity inside the FOUP under various conditions. The humid region within the FOUP when opened on the N2 purged load port without wafers. (Fig.2a) While the extent of the humid area is contingent upon the flow rate of the N2 purge and the intake of air through the Fan Filter Unit (FFU), the vortex of the inlet air from the cleanroom (<42% RH) is notably observed at the bottom and front side of the FOUP. Therefore, wafers stored in the lower slot of the FOUP face an increased risk of Cu corrosions when subjected to elevated humidity levels during processes like ILD etching and subsequent cleaning. Specifically, an extended queue time amplifies the probability of Cu defects occurring in this high-humidity slot compared to slots with lower humidity. We observed an unintended increase to 28.2% RH in specific configurations when reducing the quantity of wafers to minimize queue time. (Fig. 2b)Hence, we propose an arrangement for wafers that maintains low humidity with small quantity. When placing 12 wafers in the FOUP, an arrangement with equal spacing from the first slot to the 25th slot ensures uniform N2 flow, thereby reducing the highest humidity from 28.2% RH to 14.0% RH by half. (Fig.3a) Alternatively, positioning all wafers on the upper section is another method. (Fig.3b) Therefore, by halving the quantity of wafers and reducing the process wait time by half, and applying the optimal wafer arrangement that maintains low humidity balance even with a small number of wafers, we confirmed the absence of Cu corrosion.

Fabrication of high-resolution, flexible, laser-induced graphene sensors via stencil masking

The advent of wearable sensing platforms capable of continuously monitoring physiological parameters indicative of health status have resulted in a paradigm shift for clinical medicine. The accessibility and adaptability of such portable, unobtrusive devices enables proactive, personalized care based on real-time physiological insights. While wearable sensing platforms exhibit powerful capabilities for continuously monitoring physiological parameters, device fabrication often requires specialized facilities and technical expertise, restricting deployment opportunities and innovation potential. The recent emergence of rapid prototyping approaches to sensor fabrication, such as laser-induced graphene (LIG), provides a pathway for circumventing these barriers through low-cost, scalable fabrication. However, inherent limitations in laser processing restrict the spatial resolution of LIG-based flexible electronic devices to the minimum laser spot size. For a CO2 laser–a commonly reported laser for device production–this corresponds to a feature size of ∼120 μm. Here, we demonstrate a facile, low-cost stencil-masking technique to reduce the minimum resolvable feature size of a LIG-based device from 120 ± 20 μm to 45 ± 3 μm when fabricated by CO2 laser. Characterization of device performance reveals this stencil-masked LIG (s-LIG) method yields a concomitant improvement in electrical properties, which we hypothesize is the result of changes in macrostructure of the patterned LIG. We showcase the performance of this fabrication method via production of common sensors including temperature and multi-electrode electrochemical sensors. We fabricate fine-line microarray electrodes not typically achievable via native CO2 laser processing, demonstrating the potential of the expanded design capabilities. Comparing microarray sensors made with and without the stencil to traditional macro LIG electrodes reveals the s-LIG sensors have significantly reduced capacitance for similar electroactive surface areas. Beyond improving sensor performance, the increased resolution enabled by this metal stencil technique expands capabilities for scalable fabrication of high-performance wearable sensors in low-resource settings without reliance on traditional fabrication pathways.

A Novel Out-of-Control Action Plan (OCAP) for Optimizing Efficiency and Quality in the Wafer Probing Process for Semiconductor Manufacturing.

The out-of-control action plan (OCAP) is crucial in the wafer probing process of semiconductor manufacturing as it systematically addresses and corrects deviations, ensuring the high quality and reliability of semiconductor devices. However, the traditional OCAP involves many redundant and complicated processes after failures occur on production lines, which can delay production and escalate costs. To overcome the traditional OCAP's limitations, this paper proposes a novel OCAP aimed at enhancing the wafer probing process in semiconductor manufacturing. The proposed OCAP integrates proactive measures such as preventive maintenance and advanced monitoring technologies, which are tested and verified through a comprehensive experimental setup. Implementing the novel OCAP in a case company's production line reduced machine downtime by over 24 h per week and increased wafer production by about 23 wafers per week. Additionally, probe test yield improved by an average of 1.1%, demonstrating the effectiveness of the proposed method. This paper not only explores the implementation of the novel OCAP but also compares it with the traditional OCAP, highlighting significant improvements in efficiency and production output. The results underscore the potential of advanced OCAP to enhance manufacturing processes by reducing dependency on human judgment, thus lowering the likelihood of errors and improving overall equipment effectiveness (OEE).

Hot Embossing to Fabricate Parylene-Based Microstructures and Its Impact on the Material Properties.

This study aims to establish and optimize a process for the fabrication of 3D microstructures of the biocompatible polymer Parylene C using hot embossing techniques. The different process parameters such as embossing temperature, embossing force, demolding temperature and speed, and the usage of a release agent were optimized, utilizing adhesive micropillars as a use case. To enhance compatibility with conventional semiconductor fabrication techniques, hot embossing of Parylene C was adapted from conventional stainless steel substrates to silicon chip platforms. Furthermore, this adaptation included an investigation of the effects of the hot embossing process on metal layers embedded in the Parylene C, ensuring compatibility with the ultra-thin Parylene printed circuit board (PCB) demonstrated previously. To evaluate the produced microstructures, a combination of characterization methods was employed, including light microscopy (LM) and scanning electron microscopy (SEM), X-ray diffraction (XRD), X-ray photoelectron spectroscopy (XPS), and Fourier-transform infrared spectroscopy (FTIR). These methods provided comprehensive insights into the morphological, chemical, and structural properties of the embossed Parylene C. Considering the improved results compared to existing patterning techniques for Parylene C like plasma etching or laser ablation, the developed hot embossing approach yields a superior structural integrity, characterized by increased feature resolution and enhanced sidewall smoothness. These advancements render the method particularly suitable for diverse applications, including but not limited to, sensor optical components, adhesive interfaces for medical wearables, and microfluidic systems.

Durable superhydrophobic LTA-zeolite coating on PDMS surface with excellent self-cleaning property

Superhydrophobicity is a fundamental characteristic that plays a vital role in various applications, such as self-cleaning coatings, water vapor barriers for flexible electronics, and microfluidic chip fabrication. In this study, we developed a superhydrophobic surface coating on polydimethylsiloxane (PDMS) using Linde Type A (LTA) zeolite crystals, employing a silane coupling strategy. As part of this study, the LTA-zeolite-coated PDMS surface is characterized using various techniques to elucidate its superhydrophobic behavior, and a functionalization mechanism is proposed. The resulting substrate exhibited high surface roughness, with a water contact angle exceeding 155°, a sliding angle below 1°, and a contact angle hysteresis under 10°. This superhydrophobic surface coating effectively repelled water, confirming its excellent self-cleaning properties. Furthermore, the coating withstood three cycles of the Kapton adhesive tape peeling test, 5 h of water-jet hitting, and 72 h of UV light exposure, demonstrating its robustness and strong adhesion to PDMS.

Effect of Etching Methods on Dielectric Losses in Transmons

Superconducting qubits are considered as a promising platform for implementing a fault tolerant quantum computing. However, surface defects of superconductors and the substrate leading to qubit state decoherence and fluctuations in qubit parameters constitute a significant problem. The amount and type of defects depend both on the chip materials and fabrication procedure. In this work, transmons produced by two different methods of aluminum etching: wet etching in a solution of weak acids and dry etching using a chlorine-based plasma are experimentally studied. The relaxation and coherence times for dry-etched qubits are more than twice as long as those for wet-etched ones. Additionally, the analysis of time fluctuations of qubit frequencies and relaxation times, which is an effective method to identify the dominant dielectric loss mechanisms, i-ndicates a significantly lower impact of two-level systems in the dry-etched qubits compared to the wet-etched ones.

Localized Surface Plasmon Resonances of AgAl Alloy Nanoparticles Self-Organized by Annealing of Ag/Al Bilayer Films

Plasmonic applications have traditionally relied on noble metals such as gold (Au) and silver (Ag) for their excellent plasmonic performance in the visible and near-infrared spectrum. However, these metals are costly, scarce, and have limitations such as low stability (Ag) and interband transition losses, which restrict their spectral range. To address these issues, alternative plasmonic materials have been explored. One such material is aluminum (Al), which is inexpensive, abundant, and exhibits remarkable plasmonic properties in the UV region as well as wide tunability. Al is also compatible with complementary metal–oxide semiconductor (CMOS) fabrication processes and is very stable due to its ultrathin native oxide layer. Alloying different metals can combine their advantageous properties, resulting in enhanced tunable optical characteristics. This study investigates the LSPR properties of AgAl alloy nanoparticles grown after the annealing of precursor AgAl bilayer films. Interestingly, LSPRs were also observed in some cases for the as-deposited bilayers. The experimental results were complemented with simulations conducted via the rigorous coupled-wave analysis (RCWA) method. The investigated materials could be potentially useful for applications in energy harvesting or color printing.

Synergistic Effects of Total Ionizing Dose and Single-Event Upset in 130 nm 7T Silicon-on-Insulator Static Random Access Memory

The exposure of spaceborne devices to high-energy charged particles in space results in the occurrence of both a total ionizing dose (TID) and the single-event effect (SEE). These phenomena present significant challenges for the reliable operation of spacecraft and satellites. The rapid advancement of semiconductor fabrication processes and the continuous reduction in device feature size have led to an increase in the significance of the synergistic effects of TID and SEE in static random access memory (SRAM). In order to elucidate the involved physical mechanisms, the synergistic effects of TID and single-event upset (SEU) in a new kind of 130 nm 7T silicon-on-insulator (SOI) SRAM were investigated by means of cobalt-60 gamma-ray and heavy ion irradiation experiments. The findings demonstrate that 7T SOI SRAM is capable of maintaining normal reading and writing functionality when subjected to TID irradiation at a total dose of up to 750 krad(Si). In general, the TID was observed to reduce the SEU cross-section of the 7T SOI SRAM. However, the extent of this reduction was influenced by the heavy ion LET value and the specific writing data pattern employed. Based on the available evidence, it can be proposed that TID preirradiation represents a promising avenue for enhancing the resilience of 7T SOI SRAMs to SEU.

Polarization splitter-rotator on thin film lithium niobate based on multimode interference.

Polarization splitter-rotators (PSRs) are the key elements to realize on-chip polarization manipulation. Current PSRs on thin film lithium niobate (TFLN) rely on sub-micron gaps to realize mode separation, which increases the difficulties of lithography and etching. In this paper, a PSR on TFLN based on multimode interference (MMI) is demonstrated. Mode division is achieved by an MMI-based mode demultiplexer. The minimum feature size of the PSR is 1.5 µm, which can be fabricated with low-priced i-line contact aligners. Experimental results show a polarization extinction ratio (PER) > 16 dB and an insertion loss (IL) < 1.0 dB are achieved in a wavelength range of 1530-1578 nm for TE-polarized light. And a PER > 10.0 dB and an IL <2.1 dB are achieved in a wavelength range of 1530-1569 nm for TM-polarized light. This PSR could find application in the low-cost fabrication of dual-polarization TFLN-integrated photonic devices.

Rejection of PFAS and priority co-contaminants in semiconductor fabrication wastewater by nanofiltration membranes

Use of high-pressure membranes is an effective means for removal of per-and polyfluoroalkyl substances (PFAS) that is less sensitive than adsorption processes to variable water quality and specific PFAS structure. This study evaluated the use of nanofiltration (NF) membranes for the removal of PFAS and industry relevant co-contaminants in semiconductor fabrication (fab) wastewater. Initial experiments using a flat sheet filtration cell determined that the NF90 (tight NF) membrane provided superior performance compared to the NF270 (loose NF) membrane, with NF90 rejection values exceeding 97 % for all PFAS evaluated, including the ultrashort trifluoromethane sulfonic acid (TFMS). Cationic fab co-contaminants diaryliodonium (DIA), triphenylsulfonium (TPS), and tetramethylammonium hydroxide (TMAH) were not as highly rejected as anionic PFAS likely due to electrostatic effects. A spiral wound NF90 module was then used in a pilot system to treat a lab solution containing PFAS and co-contaminants and fab wastewater effluent. Treatment of the fab wastewater, containing high concentrations of perfluorocarboxylic acids (PFCAs), including trifluoroacetic acid (TFA: 96,413 ng/L), perfluoropropanoic acid (PFPrA: 11,796 ng/L), and perfluorobutanoic acid (PFBA: 504 ng/L), resulted in ≥92 % rejection of all PFAS while achieving 90 % water recovery in a semi-batch configuration. These findings demonstrate nanofiltration as a promising technology option for incorporation in treatment trains targeting PFAS removal from wastewater matrices.

An Alternative Micro-Milling Fabrication Process for Rapid and Low-Cost Microfluidics.

Microfluidics is an important technology for the biomedical industry and is often utilised in our daily lives. Recent advances in micro-milling technology have allowed for rapid fabrication of smaller and more complex structures, at lower costs, making it a viable alternative to other fabrication methods. The microfluidic chip fabrication developed in this research is a step-by-step process with a self-contained wet milling chamber. Additionally, ethanol solvent bonding is used to allow microfluidic chips to be fully fabricated within approximately an hour. The effect of using this process is tested with quantitative contact profileometery data to determine the expected surface roughness in the microchannels. The effect of surface roughness on the controllability of microparticles is tested in functional microfluidic chips using image processing to calculate particle velocity. This process can produce high-quality channels when compared with similar studies in the literature and surface roughness affects the control of microparticles. Lastly, we discuss how the outcomes of this research can produce rapid and higher-quality microfluidic devices, leading to improvement in the research and development process within the fields of science that utilise microfluidic technology. Such as medicine, biology, chemistry, ecology, and aerospace.

A System Built for Both Deterministic Transfer Processes and Contact Photolithography

A home‐built compact system that functions as both a transfer stage for deterministic transfer processes and a mask aligner for contact photolithography, is constructed. The precision translation sample stage and optical microscope are shared between the two modes. In the transfer mode, assisted by either an adhesive or a heating element, the setup has been used to deterministically transfer freestanding semiconductors, 2D materials, and van der Waals electrodes. When configured in photolithography mode, the proposed instrument has been employed to fabricate various microscale patterns and devices, with minimum feature sizes of 1–2 μm achieved. The prototype instrument provides a feasible solution for performing high‐quality deterministic transfer and photolithography processes on one single tool in‐house.

Generation of precision microstructures based on reconfigurable photoresponsive hydrogels for high-resolution polymer replication and microoptics

Microstructured molds are essential for fabricating various components ranging from precision optics and microstructured surfaces to microfluidics. However, conventional fabrication technology such as photolithography requires expensive equipment and a large number of processing steps. Here, we report a facile method to fabricate micromolds based on a reusable photoresponsive hydrogel: Uniform micropatterns are engraved into the hydrogel surface using photo masks under UV irradiation within a few minutes. Patterns are replicated using polydimethylsiloxane with minimum feature size of 40 μm and smoothness of Rq ~ 3.4 nm. After replication, the patterns can be fully erased by light thus allowing for reuse as a new mold without notable loss in performance. Utilizing greyscale lithography, patterns with different height levels can be produced within the same exposure step. We demonstrate the versatility of this method by fabricating diffractive optical elements devices and a microlens array and microfluidic device with 100 µm wide channels.

In situ monitoring of industrial-scale chemical vapor deposition using residual gas analysis

The maintenance of industrial-scale equipment demands more effort and incurs higher costs compared to that of laboratory-scale equipment, necessitating the use of predictive maintenance techniques to mitigate unforeseen outcomes. This paper presents a demonstration of the in situ monitoring of industrial-scale low-pressure chemical vapor deposition equipment by using a residual gas analyzer (RGA). The RGA provides reactions of precursor gases by tracing the concentration and composition of residual gases within vacuum reactors. Furthermore, RGA analysis enables the prediction of the growth rate of the thin-film, providing insights into thin-film growth dynamics during the process. In situ monitoring using an RGA can be applied to diverse semiconductor fabrication processes, including thin-film growth, oxidation, reactive ion etching, and ion implantation, owing to its compatibility with vacuum processes. This study addresses the existing difficulties in the exploration of RGA monitoring techniques for industrial-scale equipment and bridges the disparity between laboratory-scale and industrial-scale processes.

High-precision and Large-Scale Vat Photopolymerization Printing based on "Spatial-Pixel Integration Compensation" method

Vat photopolymerization (VPP) is widely known for its exceptional printing accuracy, but effectively controlling stitching errors to achieve high-precision, large-scale printing remains a significant challenge. This study introduces a novel compensation method, termed "Spatial-Pixel Integration Compensation" (SPIC), to address this key obstacle. SPIC combines Spatial Motion Compensation to initially control stitching errors between adjacent sub-images to be within 100 µm and Pixel Compensation for precise adjustments, further reducing stitching errors. Integrating SPIC with our high-precision printing system resulted in a remarkable reduction of stitching errors by a factor exceeding 40. Crucially, this method minimizes the stitching error between any two sub-images to be less than one pixel point, specifically below 4 µm. Notably, SPIC is the first method specifically focused on effectively controlling and reducing stitching errors to achieve large-scale printing while maintaining high precision. To validate the practical applicability of the SPIC method, we used SPIC to print both Zig-Zag and herringbone structures (HBS) and achieved high-precision large-scale manufacturing with dimensions of 44 mm × 33 mm. In the HBS structure, the minimum feature size was 14.2 µm, and the printing error was less than 1 µm. These printed structures were used as molds to fabricate proof-of-concept polydimethylsiloxane (PDMS) microfluidic chips, demonstrating the successful mixing of rhodamine B and ethanol within the microfluidic channels. Furthermore, SPIC was extended to the printing of complex three-dimensional (3D) Triple-Periodic Minimal Surface (TPMS) structures, successfully producing TPMS-Gyroid and TPMS-Diamond structures with a minimum feature size of 20 µm and a printing error below 1.5 µm. These results demonstrate that the SPIC algorithm effectively enables high-precision, large-scale printing. This work significantly advances the application of VPP technology in fields requiring complex, high-precision, and large-scale 3D structures and provides valuable insights for future research in high-precision and large-scale printing.