In advanced integrated circuit manufacturing processes, the quality of chemical mechanical flattening is a key factor affecting chip performance and yield. Therefore, it has become increasingly important to develop an accurate predictive model for the chip surface topography after chemical mechanical flattening. In the modeling process, the noise problem of atomic force microscopy measurement data is relatively serious. To solve this problem, the noise characteristics of atomic force microscope measurement data for chip surface topography in this field are studied and discussed in this paper. It is found that the noise present in such problems is mainly triggered by the vibration and tilt of the probe. Two types of noise, low-frequency and high-frequency, are presented in the time domain. In order to solve the noise problem in this modeling data, this paper analyzes the spectral characteristics of the measurement data using Fourier transform, and a wavelet-Fourier transform composite noise reduction process is proposed. The algorithm is applied to the noise reduction of the chip surface data of 32 nm copper interconnect process. The noise reduction results were compared with scanning electron microscope photographs to verify the effectiveness of the noise reduction.