Charge Trapping Layer Research Articles

Enhancing Charge Trapping Performance of Hafnia Thin Films Using Sequential Plasma Atomic Layer Deposition.

We aimed to fabricate reliable memory devices using HfO2, which is gaining attention as a charge-trapping layer material for next-generation NAND flash memory. To this end, a new atomic layer deposition process using sequential remote plasma (RP) and direct plasma (DP) was designed to create charge-trapping memory devices. Subsequently, the operational characteristics of the devices were analyzed based on the thickness ratio of thin films deposited using the sequential RP and DP processes. As the thickness of the initially RP-deposited thin film increased, the memory window and retention also increased, while the interface defect density and leakage current decreased. When the thickness of the RP-deposited thin film was 7 nm, a maximum memory window of 10.1 V was achieved at an operating voltage of ±10 V, and the interface trap density (Dit) reached a minimum value of 1.0 × 1012 eV-1cm-2. Once the RP-deposited thin film reaches a certain thickness, the ion bombardment effect from DP on the substrate is expected to decrease, improving the Si/SiO2/HfO2 interface and thereby enhancing device endurance and reliability. This study confirmed that the proposed sequential RP and DP deposition processes could resolve issues related to unstable interface layers, improve device performance, and enhance process throughput.

Advanced spectroscopic methods for probing in-gap defect states in amorphous SiNx for charge trap memory applications

Silicon nitride (SiNx) serves as the charge trap layer in current 3D NAND flash memory devices. The precise formation mechanism and electronic structure of localized defect trap states in SiNx remain elusive. Here, we present a refined experimental methodology to elucidate the in-gap defect states and the band gaps in amorphous SiNx thin films. Our approach integrates high-resolution reflection electron energy loss spectroscopy (REELS) and spectroscopic ellipsometry (SE) for comprehensive analysis. By systematical analysis, we aim to provide a robust method for determining in-gap electronic states in SiNx. We investigated two different SiNx films prepared by plasma-enhanced chemical vapor deposition and sputtering. Our analysis revealed several distinct in-gap states and determined band gap energies. This approach not only provide advanced spectroscopic methods to characterize the defect electronic states in SiNx, but also applicable to other large band gap semiconductors or dielectrics to predict device-level characteristics for future devices.

Ge n-Channel Hybrid Memory Based on Ferroelectric Charge Trapping Layer With Low Operating Voltage, Large Memory Window, and Negligible Read Latency

Ge n-Channel Hybrid Memory Based on Ferroelectric Charge Trapping Layer With Low Operating Voltage, Large Memory Window, and Negligible Read Latency

Barrier Polarity Reversal Based on Interfacial Modification of Au Nanoparticles for Nonvolatile Multilevel Memory and Optoelectronic Synapses.

Optoelectronic synaptic devices, integrating light sensing and information processing capabilities, have emerged as advantageous tools for the implementation of visual neuromorphic computing. However, the transient light-triggered response characteristic typically results in unstable memory retention times and restricted current response ranges, posing significant challenges to the development and practical application of neural network systems. In response to these limitations, this study developed a nonvolatile optoelectronic memory based on the indium tin oxide (ITO)/Au nanoparticles (NPs)/amorphous Ga2O3 (a-Ga2O3)/Pt structure. Unlike conventional optoelectronic memories, this device features a modification with Au NPs that markedly enhances the Schottky barrier height at the interface. Au NPs function as a charge-trapping layer for sensitive and large-scale modulation of the barrier by the light field, thereby enabling the nonvolatile reversal of the device's barrier polarity. This innovative approach enables controllable multilevel data storage with an ultra large on/off ratio (∼104) and excellent retention capability exceeding 12,000 s. Additionally, the device emulates essential synaptic functions and demonstrates potential application values in visual weak signal perception and image memory. This study introduces a mechanism for Schottky barrier polarity control and presents a promising strategy for the development of future high-performance integrated devices and optoelectronic synaptic elements.

Floating-gate memristor based on a MoS2/h-BN/AuNPs mixed-dimensional heterostructure

Memristors have recently received substantial attention because of their promising and unique emerging applications in neuromorphic computing, which can achieve gains in computation speed by mimicking the topology of the brain in electronic circuits. Traditional memristors made of bulk MoO3 and HfO2, for example, suffer from a low switching ratio and poor durability and stability. In this work, a floating-gate memristor is developed based on a mixed-dimensional heterostructure comprising two-dimensional (2D) molybdenum disulfide (MoS2) and zero-dimensional (0D) Au nanoparticles (AuNPs) separated by an insulating hexagonal boron nitride (h-BN) layer (MoS2/h-BN/AuNPs). We find that under the modulation of back-gate voltages, the MoS2/h-BN/AuNPs device operates reliably between a high-resistance state (HRS) and a low-resistance state (LRS) and shows multiple stable LRS states, demonstrating the excellent potential of our memristor in multibit storage applications. The modulation effect can be attributed to electron quantum tunneling between the AuNP charge-trapping layer and the MoS2 channel. Our memristor exhibits excellent durability and stability: the HRS and LRS are retained for more than 104 s without obvious degradation and the on/off ratio is >104 after more than 3000 switching cycles. We also demonstrate frequency-dependent memory properties upon stimulation with electrical and optical pulses.

Threshold voltage modulation on a CTL-based monolithically integrated E/D-mode GaN inverters platform with improved voltage transfer performance

This work demonstrates a high-performance monolithically integrated GaN inverters platform, which incorporates enhancement-mode (E-mode) and depletion-mode (D-mode) GaN high-electron-mobility transistors (HEMTs) simultaneously using an Al:HfOx-based charge trapping layer. The developed E-mode HEMT exhibits a positive threshold voltage of 2.6 V, a high ON–OFF current ratio of 1.9 × 108, a current density of 376 mA/mm, and an ON-resistance of 15.31 Ω·mm. Moreover, the direct-coupled field-effect-transistor logic (DCFL) GaN inverter was characterized with and without D-mode device threshold voltage (VTH) modulation, demonstrating improved output swing and switching threshold shift by proposed VTH modulation. The optimized DCFL GaN inverter manifests a switching threshold of 2.34 V, a logic voltage output swing of 4.98 V, and substantial logic-low and logic-high noise margins of 2.16 and 2.49 V, respectively, at a supply voltage of 5 V. These results present a promising approach toward realizing monolithically integrated GaN logic circuits for power IC applications.

Rationally Improved Surface Charge Density of Triboelectric Nanogenerator with TiO2-MXene/Polystyrene Nanofiber Charge Trapping Layer for Biomechanical Sensing and Wound Healing Application.

Triboelectric nanogenerators (TENGs) have become reliable green energy harvesters by converting biomechanical motions into electricity. However, the inevitable charge leakage and poor electric field (EF) of conventional TENG result in inferior tribo-charge density on the active layer. In this paper, TiO2-MXene incorporated polystyrene (PS) nanofiber membrane (PTMx NFM) charge trapping interlayer is introduced into single electrode mode TENG (S-TENG) to prevent electron loss at the electrode interface. Surprisingly, this charge-trapping mechanism augments the surface charge density and electric output performance of TENGs. Polyvinylidene difluoride (PVDF) mixed polyurethane (PU) NFM is used as tribo-active layer, which improves the crystallinity and mechanical property of PVDF to prevent delamination during long cycle tests. Herein, the effect of this double-layer capacitive model is explained experimentally and theoretically. With optimization of the PTMx interlayer thickness, S-TENG exhibits a maximum open-circuit voltage of (280V), short-circuit current of (20µA) transfer charge of (120 nC), and power density of (25.2 µW cm-2). Then, this energy is utilized to charge electrical appliances. In addition, the influence of AC/DC EF simulation in wound healing management (vitro L929 cell migration, vivo tissue regeneration) is also investigated by changing the polarity of trans-epithelial potential (TEP) distribution in the wounded area.

Synaptic plasticity and associative learning in IGZO-based synaptic transistor

The increasing demand for efficient data access in high-performance computing systems has emphasized the limitations of the traditional von Neumann architecture, particularly due to the von Neumann bottleneck. This bottleneck arises from the significant power and time consumption required for data transfer between the central processing units and memory, impeding overall system efficiency. Neuromorphic computing offers a promising alternative. Neuromorphic systems emulate biological neurons and synapses, enabling parallel data processing and potentially overcoming the limitations of traditional computing architectures. This study focuses on synaptic transistors with In–Ga–Zn-O (IGZO) channels and TaOx charge trapping layers (Ox-CTL) to enhance neuromorphic computing capabilities. The devices were fabricated using reactive sputtering and atomic layer deposition, followed by comprehensive structural and compositional analyses. Experimental results demonstrated significant hysteresis, high on/off ratios, and multibit conductance states, suggestive of effective charge trapping and detrapping mechanisms. Evaluation through potentiation, depression, and excitatory postsynaptic current (EPSC) measurements, along with simulations using the Modified National Institute of Standards and Technology (MNIST) database, revealed improved pattern recognition accuracy. Additionally, associative learning experiments modeled after Pavlov’s dog conditioning emphasized the device's capability for both long- and short-term memory retention. These findings suggest that IGZO-based synaptic transistors are promising candidates for next-generation neuromorphic computing systems, offering enhanced data processing efficiency and adaptability.

Charge trapping layer enabled high-performance E-mode GaN HEMTs and monolithic integration GaN inverters

In this work, high threshold voltage and breakdown voltage E-mode GaN HEMTs using an Al:HfOx-based charge trapping layer (CTL) are presented. The developed GaN HEMTs exhibit a wide threshold modulation range of ΔVTH ∼ 17.8 V, which enables the achievement of enhancement-mode (E-mode) operation after initialization process owing to the high charge storage capacity of the Al:HfOx layer. The E-mode GaN HEMTs exhibit a high positive VTH of 8.4 V, a high IDS,max of 466 mA/mm, a low RON of 10.49 Ω mm, and a high on/off ratio of ∼109. Moreover, the off-state breakdown voltage reaches up to 1100 V, which is primarily attributed to in situ O3 pretreatment effectively suppressing and blocking leakage current. Furthermore, thanks to the VTH of GaN HEMTs being tunable by initialization voltage using the proposed CTL scheme, we prove that the direct-coupled FET logic-integrated GaN inverters can operate under a variety of conditions (β = 10–40 and VDD = 3–15 V) with commendable output swing and noise margins. These results present a promising approach toward realizing the monolithic integration of GaN devices for power IC applications.

The Effect of Fluorine Doping in the Charge Trapping Layer on Device Characteristics and Reliability of E-Mode GaN MIS-HEMTs

The Effect of Fluorine Doping in the Charge Trapping Layer on Device Characteristics and Reliability of E-Mode GaN MIS-HEMTs

Neuron Circuit Based on a Split-gate Transistor with Nonvolatile Memory for Homeostatic Functions of Biological Neurons.

To mimic the homeostatic functionality of biological neurons, a split-gate field-effect transistor (S-G FET) with a charge trap layer is proposed within a neuron circuit. By adjusting the number of charges trapped in the Si3N4 layer, the threshold voltage (Vth) of the S-G FET changes. To prevent degradation of the gate dielectric due to program/erase pulses, the gates for read operation and Vth control were separated through the fin structure. A circuit that modulates the width and amplitude of the pulse was constructed to generate a Program/Erase pulse for the S-G FET as the output pulse of the neuron circuit. By adjusting the Vth of the neuron circuit, the firing rate can be lowered by increasing the Vth of the neuron circuit with a high firing rate. To verify the performance of the neural network based on S-G FET, a simulation of online unsupervised learning and classification in a 2-layer SNN is performed. The results show that the recognition rate was improved by 8% by increasing the threshold of the neuron circuit fired.

MoS2-based charge trapping layer enabled triboelectric nanogenerator with assistance of CNN-GRU model for intelligent perception

Self-powered sensing technology and smart perception technology have broad application prospects in flexible and wearable electronics. In this work, a flexible triboelectric nanogenerator (RMP-TENG) based on a room-temperature vulcanized silicone rubber (RTV)@(Molybdenum disulfide (MoS2)/Polyvinyl chloride (PVC)) functional layer is developed using a layer-by-layer self-assembly and material doping strategy. The RTV@(MoS2/PVC) functional layer is divided into a charge-generating layer (RTV/PVC) and a charge-trapping layer (RTV/MoS2). The synergistic effect of PVC and MoS2 has improved the surface roughness and charge transfer efficiency of RMP-TENG, doubling its output performance to 1055 V and 112 μA. In order to further improve the tactile sensing accuracy of RMP-TENG, a deep learning model based on Convolutional Neural Network (CNN) and Gated Recurrent Unit (GRU) is developed. It predicts the type of contact material based on the features of tactile signals, achieving a prediction accuracy of 93.975%. Additionally, by combining mobile smart terminals, the CNN-GRU model, and RMP-TENG, a wireless access control system based on self-powered tactile sensing and intelligent material recognition is developed. Through the optimization of these experiments and algorithms, RMP-TENG has achieved real-time material recognition capabilities. This demonstrates the broad application prospects of RMP-TENG in wearable energy supply, intelligent sensing, human-computer interaction, and other areas.

Self-repairing thermoplastic polyurethane-based triboelectric nanogenerator with molybdenum disulfide charge-trapping for advanced wearable devices

In the realm of wearable electronics, the development of materials that can endure and adapt to the human experience while harvesting energy is paramount. Herein, we introduce a novel self-healable thermoplastic polyurethane (TPU) for a triboelectric nanogenerator (TENG) that harmonizes self-healing efficacy with mechanical durability. Utilizing a unique electrospinning technique, we engineered TPU fibers that not only exhibit remarkable elasticity—withstanding over 600% strain—but also possess the capability to self-repair at just 80 ºC. For the negative triboelectric layers, beside choosing fluorinated ethylene propylene (FEP) as the main electron-withdrawing surface, the introduction of molybdenmum disulfide (MoS2) as a charge-trapping layer exploits its two-dimensional structure to enhance both the stretchability and electrical output of the TENG. Our study demonstrates the TENG’s proficiency in energy generation, producing up to 1000 V from vigorous motion and maintaining a consistent output after mechanical stress and chemical exposure. Moreover, the device showcases excellent motion-sensing capabilities and can power up to 200 (light-emitting diodes) LEDs, underscoring its efficiency and adaptability. This robust TENG sets a precedent for self-healing materials in sustainable energy devices and marks a substantial advance towards their integration into everyday wearables. The culmination of these features highlights the potential mass application of TENGs, paving the way for their ubiquitous adoption in the near future.

Engineering Improvement of the Core Layers of Charge Trapping Flash Memory Based on Doped HfO2 and Segmented Fabrication

An engineering approach was applied to modify the core layers of charge-trapping flash (CTF) memory—the blocking layer, charge-trapping layer, and tunneling layer. The doping of Ti in the charge-trapping layer and the use of Si-doped HfO2 for the tunneling layer could optimize charge capture and leakage control. This design enhances programming and erasing speeds and increases overall device stability by creating more corner fields and using the Coulomb blockade effect. Experimental results demonstrate a larger memory window and better charge retention for the new device at the same charge-trapping layer thickness. These findings signify the advancement of the new CTF memory in balancing fast programming and long-term charge retention. The long-standing contradiction between charge capturing and retention could be partially resolved by using this engineering method.

InGaZnO-based synaptic transistor with embedded ZnO charge-trapping layer for reservoir computing

In this study, we design an IGZO/ZnO/IGZO-based synaptic transistor to implement robust reservoir computing. Short-term memory characteristics are achieved using the charge trapping and detrapping effects of the ZnO layer. We verify excellent cell-to-cell and cycle-to-cycle uniformity regarding the memory characteristics of the device. Moreover, various synaptic behaviors, including short-term potentiation, short-term depression (STD), excitatory postsynaptic currents (EPSC), and paired-pulse facilitation (PPF) are emulated to check the suitability of neuromorphic properties. Finally, reservoir computing trained on the modified National Institute of Standards and Technology database dataset is presented for temporal data learning. As a physical reservoir, the device can achieve 16 different using 4 bits depending on the applied pulse stream. The results include a confusion matrix covering all recognition scenarios, with an average recognition accuracy of 93.87%, closely approaching the theoretical recognition accuracy of 94.1%. This study sheds light on a computational framework for physical reservoir computing by reducing the training cost.

Controllable memory window in two-dimensional hybrid van der Waals heterostructured devices

Van der Waals (vdW) heterostructures based on inorganic layered materials have been demonstrated as potential candidates for a variety of electronic applications due to their flexibility in energy band engineering. However, the presence of unstable charge-trapping states in atomically thin two-dimensional (2D) materials may limit the performance of devices. Here, we aim to conduct a systematic investigation on hybrid heterostructured memory devices that consist of 2D layered organic and inorganic materials. The objective is to explore the potential of these devices in offering efficient charge-trapping states. Molybdenum disulfide (MoS2) is employed as a channel, while N, N′-Dimethyl-3,4,9,10-perylenedicarboximide (Me-PTCDI) serves as the charge-trapping layer to store charges from MoS2. The hysteresis window of these heterostructured devices can be effectively modified within a range of 13–70 V by manipulating both the thickness of the organic layer and the gate voltages. The largest hysteresis window is found in a combination of a few-layer Me-PTCDI (12.6 nm) and MoS2 (6 nm), showing a high on/off current ratio (>104) and a long retention time (104 s). Furthermore, the endurance test, which lasts for over 1000 cycles, demonstrates an exceptional level of stability and reliability. In addition, multilevel memory effects can be observed when gate pulses with different widths and amplitudes are applied. These 2D hybrid heterostructured devices have the capability to broaden the scope of material systems and present substantial potential for functional neuromorphic applications.

The Reliability Impact of Bi Doping on the HfO2 Charge-Trapping Layer: A First-Principles Study

The Reliability Impact of Bi Doping on the HfO2 Charge-Trapping Layer: A First-Principles Study

Penggabungan Ti<sub>3</sub>C<sub>2</sub>T<sub>x</sub> dalam Matriks Poli (Metil Metakrilat) untuk Aplikasi Memori Tidak Meruap

MXenes, with their unique surface properties and 2D structure, have demonstrated promising potential in electronic devices, particularly in memory storage. This study explored the potential of 2D Ti<sub>3</sub>C<sub>2</sub>T<sub>x</sub> for the nonvolatile memory (NVM) application. The simple solution process routes were used to fabricate the two-terminal bistable switching devices. The silver nanowires/nanocomposite/ITO structure was deposited on a glass substrate using spin coating and spray coating techniques. The Ti<sub>3</sub>C<sub>2</sub>T<sub>x</sub> MXene flakes were incorporated into a poly(methyl methacrylate) (PMMA) polymer host to form the nanocomposite and act as a charge-trapping layer. Meanwhile, PMMA acts as a dielectric layer. The measured current-voltage data showed a bistable current behavior with the presence of a memory window. The fabricated NVM memory devices were reprogrammable when the endurance test was performed and stable up to 1×104 s cycles with a distinct ON/OFF ratio of 103. The conduction mechanisms were identified using the curve-fitting method with double log plots of current-voltage (I-V) data. Based on the obtained I-V characteristics, various conduction mechanisms, especially Schottky and Poole-Frenkel emission, trapped charge limiting current, and space charge limited current, were proposed to be responsible for the bistable switching behavior. Thus, the results of this study provide an experimental basis for using MXene in non-volatile memory applications.

Artificial intelligence motivated flexible single-electrode mode multilayer triboelectric sensor for smart mobility systems

Triboelectric tactile sensing technique is increasingly coming into people’s lives to bring convenience, so that there is an urgent necessity for this technique to be applied to smart mobility to increase safety and enhance the mobility experience. Herein, a single-electrode mode multilayer triboelectric sensor (MTS) motivated by artificial intelligence (AI) is proposed, which consists of styrene-butadiene-styrene (SBS)/ poly (vinylida-ene fluoride-trifluoroethylene) (PVDF-TrFE) nanofibers (NFs) film as the friction layer and substrate, laser-induced graphene (LIG)/molybdenum disulfide (MoS2) as the charge trapping layer, and Ag as the electrode. The MTS exhibits remarkable sensing performance, such as a wide response range of 5–100 N, 0.4–2 Hz multi-frequency response capability, and non-contact sensing, as well as distinguished self-powered performance. To demonstrate the practical significance of the proposed MTS, two applications are explored specifically after equipping with AI, including: (i) a smart in-vehicle system is constructed, which consists of unlocking section and multifunctional control with early warning section. (ii) a smart car control system is implemented, which can carry out special tasks instead of humans. These applications provide reliable ways to promote the development of human-machine interaction and smart mobility, as well as help to make lifestyles and mobility smarter, safer and more convenient.

Graphdiyne particles as nano-floating gates for high-performance nonvolatile organic field-effect transistor memory

Graphdiyne particles (GDYP), newcomers of carbon family, were employed as nano-floating gates in organic field-effect transistor (OFET) memories. The charge-trapping layer was prepared by blending GDYP into a polystyrene (PS) matrix. The effect of GDYP doping ratio on memory performances was investigated, and the OFET memory with the optimal doping concentration of the GDYP (0.3 mg/mL) exhibits ambipolar memory behavior with a wide memory window as large as 86 V, excellent retention time over 104 s with a high ON/OFF current ratio of 7.5 × 105. This work demonstrates that graphdiyne is a promising charge-trapping material for high-performance nonvolatile OFET memory devices.