Interface State Charge Research Articles

Interface Characterization of Graphene‐Silicon Heterojunction Using Hg Probe Capacitance–Voltage Measurement

AbstractInvestigating the intrinsic properties of the Schottky interface between graphene and 3D bulk silicon is crucial. However, the semiconductor technology introduces extra doping and defects in graphene, which significantly disturbs the property of the graphene‐silicon interface. Here, the interface parameters of graphene/n‐Si heterojunction are derived by the damage‐free Hg‐probe capacitance–voltage measurement. Due to its low‐density states, the Fermi level of graphene can be pushed upward, which results in a lower Schottky barrier height (ΦB0) of Hg/graphene/n‐Si (HGS) heterostructure than that of Hg/n‐Si (HS) structure. Additionally, the series resistance (Rs) of HGS becomes lower than that of HS, which can be attributed to the narrowed depletion layer width (WD) and the decreased interface state density (Nit). Furthermore, the frequency characteristic is also investigated. Because of the weak interface state charge trapping–detrapping process and the decreased Nit at high frequency, electrons will accumulate in graphene, and the Fermi level will be pushed up. Hence, the ΦB0 and Rs will decrease with increasing frequency. This study contributes to a deep understanding of the graphene/silicon heterojunction interfaces, which is crucial for designing and optimizing the new electronic and optoelectronic devices based on 2D/3D heterostructure.

Performance evaluation of polycrystalline Si1−xGex thin-film transistors fabricated by continuous-wave laser lateral crystallization on glass substrates

This study was aimed at elucidating the performance of continuous-wave laser lateral-crystallized (CLC) polycrystalline Si1−xGex (poly-Si1−xGex) thin-film transistors (TFTs). The transfer characteristics of the n-ch CLC poly-Si1−xGex TFTs (x = 0, 0.05, 0.1, and 0.3) exhibited a positive shift in the threshold voltage (Vth) with increasing Ge content. Furthermore, the off-current in the p-ch CLC poly-Si0.9Ge0.1 TFTs decreased with decreasing film thickness. These properties of the CLC poly-Si1−xGex TFTs can be attributed to the generation of acceptors and increment of gate SiO2/poly-Si1−xGex interface charge state with increasing Ge content. The generation of acceptors was also supported by Hall effect measurements. In addition, the thermal stability of acceptors up to 700 °C was elucidated through Hall effect measurements and TFT performance evaluations. Furthermore, we examined the origins of these acceptors. This experiment highlighted the sensitivity of Si1−xGex to Ge incorporation, even in small amounts.

Evidence of charged interface states limited scattering in GaN heterostructures

This study provides experimental evidence of charged interface states limited scattering in III-nitride heterostructures. Temperature-dependent Hall measurements and temperature-dependent ID–VG measurements indicate a significant influence of the charged interface states on the electron mobility in different AlGaN/GaN heterostructures where the characteristic of the interface is controlled by modulating the growth conditions. Charged interface states at the AlGaN/GaN heterointerface lead to electron scattering as the distance between the centroid of the two-dimensional electron gas and the interface decreases with increasing electron density. It is observed that a component of experimental Hall mobility, which ranges between 9.2 × 103 and 3.4 × 104 cm2/V s among the three samples, obtained after adding all the scattering events using Matthiessen's rule cannot be explained completely by considering all the conventional scattering mechanisms such as phonon–phonon scattering, interface roughness scattering, and dislocation density scattering. An in-depth analysis reveals a significant scattering of channel electrons by the charged states at the GaN/AlN/AlGaN interface. Furthermore, the estimated interface states from the temperature-dependent subthreshold slopes conducted on the fabricated high electron mobility transistors are in good agreement with the charged interface states extracted from the temperature-dependent Hall measurements. A good understanding on this new scattering mechanism in the GaN heterostructure may help in designing high-performance III-nitride devices in the future.

Effects of a GaN cap layer on admittance characteristics of AlGaN/GaN MIS structures

GaN caps are commonly used to reduce sheet charge modulation induced by AlGaN/GaN surface potential. However, the details on how GaN caps affect C–V and G–V characteristics are still unclear. In this paper, we report a difference between these characteristics with and without GaN caps, and we discovered a mechanism in which GaN caps act as quantum wells to affect the charging and discharging of interface states. Finally, we developed a numerical model to simulate admittance characteristics of AlGaN/GaN MIS structures with a GaN cap in high accuracy.

Characterisation of interface states of Al/p-Si Schottky diode by current–voltage and capacitance–voltage–frequency measurements

In this study, the fabricated Al/p-Si Schottky diode is characterised at room temperature using current–voltage (I–V) and capacitance–voltage–frequency (C–V–f) techniques. The energy distribution profile of the diode’s interface state density is generated using different diode parameters. In the I–V measurements, the variation in energy, charge, and density of the interface states is described in terms of the applied forward bias with respect to the zero Schottky barrier height. The capacitance measurements, on the other hand, are used to address a long-standing low-voltage capacitance peak in terms of the distribution of interface state charge. In general, both techniques complement each other, indicating that the space charge region (SCR) starts to be varied at a voltage of − 0.66 V, after the compensation of interface states by majority carriers. The findings presented here are critical for current and future research on junction-based devices for a variety of applications in which the SCR and bulk material properties are examined solely from metal-semiconductor (m–s) interface states.

Hierarchical Design of Cross‐Linked NiCo2S4 Nanowires Bridged NiCo‐Hydrocarbonate Polyhedrons for High‐Performance Asymmetric Supercapacitor

AbstractEngineering core‐shell materials with rationally designed architectures and components is an effective strategy to fulfill the high‐performance requirements of supercapacitors. Herein, hierarchical candied‐haws‐like NiCo2S4@NiCo(HCO3)2 core‐shell heterostructure (NiCo2S4@HCs) is designed with NiCo(HCO3)2 polyhedrons being tightly strung by cross‐linked NiCo2S4 nanowires. This rational design not only creates more electroactive sites but also suppresses the volume expansion during the charge–discharge processes. Meanwhile, density functional theory calculations ascertain that the formation of NiCo2S4@HCs heterostructure simultaneously facilitates OH− adsorption/desorption and accelerates electron transfer within the electrode, boosting fast and efficient redox reactions. Ex situ X‐ray diffraction and Raman measurements reveal that gradual phase transformations from NiCo(HCO3)2 to NiCo(OH)2CO3 and then to highly‐active NiCoOOH take place during the cycles. Therefore, NiCo2S4@HCs demonstrates an ultrahigh capacitance of 3178.2 F g−1 at 1 A g−1 and a remarkable rate capability of 2179.3 F g−1 at 30 A g−1. In addition, the asymmetric supercapacitor NiCo2S4@HCs//AC exhibits a high energy density of 69.6 W h kg−1 at the power density of 847 W kg−1 and excellent cycling stability with 90.2% retained capacitance after 10 000 cycles. Therefore, this novel structural design has effectively manipulated the interface charge states and guaranteed the structural integrity of electrode materials to achieve superior electrochemical performances.

Reliable evaluation method for interface state density and effective channel mobility in lateral 4H-SiC MOSFETs

The electrical performance of silicon carbide metal-oxide-semiconductor field effect transistors (4H-SiC MOSFETs) are strongly related to the presence of interface states at the silicon dioxide (SiO2)/4H-SiC interface, whose density is much higher than in the Si/SiO2 system. In particular, the charged interface states determine a degradation of the carrier mobility in the channel of the MOSFET with respect to the bulk mobility. A reliable and consistent method for the evaluation of the interface state density (D it) and the effective channel mobility (μ ch) in these devices is presented in this work. The two quantities are simultaneously extracted by a combined fit of the current–voltage (I–V) and capacitance–voltage (C–V) electrical characteristics collected on a single device. The simultaneous fit of the I–V and C–V characteristics, which can be easily measured on the same device, noticeably improve the reliability of D it and μ ch estimation. The results obtained at different temperatures indicate an increase of the μ ch with T, in agreement with a dominance of the Coulomb scattering effect as the degradation mechanism of the carrier channel mobility induced by the presence of charged interface states.

Fabrication of n-Si/n-Ga2O3 heterojunctions by surface-activated bonding and their electrical properties

We studied electrical properties of n-Si/n-Ga2O3 heterojunctions fabricated by surface-activated bonding. The energy barrier heights (qϕb) at the Si/Ga2O3 interface for different reverse voltages (Vrev) were derived from temperature-dependent current density–voltage (J–V–T) characteristics. With shifting Vrev to the negative direction, qϕb gradually decreased and reached a constant value due to negatively charged interface states. The conduction band offset at the heterointerface was estimated to be 0.18 eV from the Vrev dependence of qϕb. The qϕb calculated from a capacitance of the heterojunction at thermal equilibrium was larger than those derived from the J–V–T characteristics, attributing to spatially inhomogeneous qϕb caused by the non-uniform distribution of the charged interface states. The density of shallow interface states was also extracted from the reverse J–V–T characteristics, which was estimated to be about 6 × 1012 cm−2 eV−1.

Interface optimization of La-based gate dielectric for molybdenum disulfide field-effect transistors

Two-dimensional (2D) layered materials such as graphene, transition metal dichalcogenides are considered as the promising candidates for new generation electronics and optoelectronics, owing to their unique physical properties and abundant design freedom. However, the problem of heterogeneous integration of two-dimensional materials with gate dielectric materials has not been solved, especially the problem of interface qualities, which limits the development of two-dimensional electronics. Herein, we demonstrate the feasibility of interface optimization through post-deposition annealing process. The proposed La-based oxide MoS2 transistor offers high mobility of 60 cm2/V·s, increased by 136% up to ∼ 50uA/um and low interface trap density after post-deposition annealing treatment. The detailed research results show that N2 atmosphere annealing treatment can not only promote the composition of LaAlO3, but also suppress the Coulomb scattering generated from interface state charge. All these results provide an enhanced fabrication scheme for heterogeneous integration with the optimized interface and offer reference for high-reliability manufacturing of low-power two-dimensional electronic devices.

Recent Progress on the Scanning Tunneling Microscopy and Spectroscopy Study of Semiconductor Heterojunctions.

The band alignment, interface states, interface coupling, and carrier transport of semiconductor heterojunctions (SHs) need to be well understood for the design and fabrication of various important semiconductor structures and devices. Scanning tunneling microscopy (STM) with high spatial resolution and scanning tunneling spectroscopy (STS) with high energy resolution are significantly contributing to the understanding on the important properties of SHs. In this work, the recent progress on the use of STM and STS to study lateral, vertical and bulk SHs is reviewed. The spatial structures of SHs with atomically flat surface have been examined with STM. The electronic band structures (e. g., the band offset, interface state, and space charge region) of SHs are measured with STS. Combined with the spatial structures and the tunneling spectra features, the mechanism for the carrier transport in the SH may be proposed.

Electrostatics of Single Monolayer Graphene Coated Metal Electrode in Electrolyte

AbstractUnlike metals, graphene forms a hydration layer at the electrode/electrolyte interface, which is unusual for a conducting material. Here, the electrostatic properties of the hydration layer are studied by measuring the oscillation of ions at the interface due to an applied AC potential by differential reflectivity during cyclic voltammetry (CV). The amplitude of ion oscillation at picometer range sensitivity on a partially coated Au electrode by a graphene monolayer reveals a remarkable difference between the coated and uncoated part of the electrode. The uncoated Au electrode exhibits the expected behavior, but the oscillation of ions is completely screened over the graphene coated electrode up to 0.2 M of NaCl. The “insulating” behavior is consistent with CV and DPV. The behavior attributed to the hydration layer could be reversibly disrupted to de‐screen the electric field to study the electrostatics of graphene/Au interface. The shift in Fermi level of hydration‐layer‐free graphene/Au relative to Au is quantitatively consistent with work function transparency of graphene. The cut‐off of the emanating field from the underlying electrode in an electrolyte is another example of graphene's unique passivation property that will have profound effect on applications such as, supercapacitors where the charge state of interface is critical.

Effect of the native oxide on the surface passivation of Si by Al2O3

The effect of the native silicon oxide layer on the passivation properties of Al2O3 on p-type Si surfaces has been investigated. This was done by comparing effective carrier lifetime, surface saturation current density, fixed charge, and density of interface states of samples, where the native oxide was not removed prior to Al2O3 passivation, with samples subjected to a 3 min HF-dip. The sample with the native oxide exhibits excellent surface passivation post-annealing, with a surface saturation current density of 13 fA/cm2 and significantly longer effective lifetime compared to the sample, where the native oxide was removed. Capacitance–voltage measurements of a sample with the native oxide revealed a remarkably low density of interface states (1010 eV−1 cm−2), almost three times lower than a sample where the native oxide was removed prior to Al2O3 deposition. The results indicate that a thin layer of native oxide improves the Al2O3 surface passivation of silicon.

Interface chemistry and leakage current mechanism of HfGdON/Ge gate stack modulated by ALD-driven interlayer.

In current manuscript, a Ge metal-oxide-semiconductor (MOS) capacitor based on HfGdON/Ge gate stacks with an ALD-driven passivation layer has been fabricated, and its interfacial and electrical properties are compared with those of its counterparts that have not undergone passivation treatment. Electrical analyses revealed that the HfGdON/Al2O3/Ge MOS device exhibits improved performance, including larger permittivity, negligible hysteresis, reduced flat band voltage, good capacitance–voltage behavior, and lower interface state and border trapped oxide charge density. All of these improvements can be ascribed to the suppressed growth of unstable Ge oxides, thus reducing the defective states at or near the HfGdON/Ge interface and improving the interface quality. In addition, detailed analyses of the current conduction mechanisms (CCMs) for Ge MOS capacitors with different passivation treatment were investigated systematically.

(Invited) Hydrogen-Related Trap States Induced during Fabrication Process and Annealing Effects in Amorphous in-Ga-Zn-O Thin Film Transistors

Metal compositions and electronic structures near the back channel surfaces of amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) were investigated by means of x-ray photoelectron spectroscopy (XPS) and photoinduced transient spectroscopy (PITS). The Zn deficient states were observed near the back channel surface due to S/D over-etching in BCE process. In the a-IGZO back channel region with the Zn deficient states, it was indicated that positively charged interface states, which induced a negative-parallel shift in transfer curves were easily formed by desorption of hydrogen adsorbed at the interface, and hydrogen-related trap states causing a negatively hump-shaped Vth shift were formed in the a-IGZO bulk by diffused hydrogen atoms from the interface and/or a passivation layer (PVL). In addition, a post-annealing treatment at higher temperatures was found to be effective to reduce the density of the defects in both the a-IGZO bulk and the PV/a-IGZO interface.

The Physical Mechanisms Behind the Strain-Induced Electron Mobility Increase in InGaAs-On-InP MOSFETs

The electron mobility in strained ultra-thin InGaAs-on-InP MOSFETs is investigated combining band-structure and physics-based modeling including all relevant scattering mechanisms and effects. The most important effect is Fermi-level pinning which occurs due to high density of interface states at InGaAs/oxide interface. Different interface states densities are considered in order to investigate impact of interface states on electron mobility in biaxially strained ultra-thin InGaAs-on-InP structures. We report the tensile biaxial strain values that can alleviate the unfavorable impact of interface states charge on electron transport.

Enhanced H2S sensing properties of Gallium doped ZnO nanocrystalline films as investigated by DC conductivity and impedance spectroscopy

Gallium doped Zinc Oxide (GZO) nanocrystalline films were synthesized by RF magnetron sputtering and their gas sensing properties were investigated. X-ray Diffraction study revealed the preferential orientation along c-axis for both doped and undoped films. X-ray Photoelectron Spectroscopy study showed a higher level of oxygen vacancies in GZO films. Investigation of gas sensing characteristics confirmed that among the doped films, 3% GZO exhibited the highest sensitivity for H2S at an operating temperature of 300 °C. The enhanced sensitivity of GZO for H2S could be attributed to the combined effect of excess oxygen vacancies due to Ga3+ substitution and the large adsorption energy of Ga favorable for chemisorption. Presence of negative capacitance in the low frequency region of impedance spectra could be due to the accumulation of ions at the metal/semiconductor interface facilitated by excess oxygen vacancies and interface charge states in GZO.

Effect of nitrogen passivation/pre nitration on interface properties of atomic layer deposited HfO2

Properties and quality of thin films depend on the methods used to deposit it. ALD is a surface dependent process and is one of the best deposition techniques because of the control we have on the deposition. In ALD, quality of initial few layers depends on substrate surface. A well prepared substrate surface reduces problem of nucleation. In this work, we have reported nitrogen passivation/pre nitration of silicon wafer as a surface preparation technique for atomic layer deposition. The results obtained have shown that the nitrogen passivation/pre nitration have profound effect on electrical characteristics. Nitrogen passivation has been done at two different temperatures, 350 and 500 °C. Crystal structures and phase information of deposited HfO2 thin films were studied in passivated and non passivated cases using GI-X-ray diffraction, elemental composition was investigated by EDX. Capacitance–voltage (C–V), current–voltage (I–V) and conductance–voltage (G–V) measurements were performed. The density of the interface state charges (Dit) was computed from C–V and G–V characteristics. Leakage current has been reduced almost two fold by utilizing this technique indicating change in properties of deposited oxide and its interface with the substrate. Decrease in interface trap charges has also been observed. Density of interface traps has been decreased from 2.87 × 10−12 to 1.57 × 10−12 cm−2 eV−1. Crystallographic phase of the deposited films are also found different in two different temperatures, 350 and 500 °C of passivation. Crystallographic phase of the deposited films were determined from analysis of measured XRD spectra and are found different in two cases.

Structural, electrical, and photoelectric properties of p-NiO/n-CdTe heterojunctions

p-NiO/n-CdTe-photosensitive heterojunctions were prepared by the deposition of nickel oxide thin films onto n-type single-crystal CdTe substrates by DC reactive magnetron sputtering. The analysis of capacitance-voltage (C−V) characteristics, measured at different frequencies of the small amplitude AC signal and corrected by the effect of the series resistance, provided evidence of the presence of electrically charged interface states, which significantly affect the measured capacitance. The dominant current transport mechanisms in the heterojunctions were determined at forward and reverse biases. Using “light” I−V characteristics, we determined the open-circuit voltage Voc=0.42 V, the short-circuit current Isc=57.5 μA/cm2, and the fill factor FF=0.24 under white light illumination with the intensity of 80 mW/cm2.

Analysis of effects of interface-state charges on the electrical characteristics in GaAs/GaN heterojunctions

Electrical properties of p+-GaAs/n-GaN and n+-GaAs/n-GaN junctions fabricated by surface-activated bonding are investigated by measuring their capacitance–voltage (C–V) and current–voltage (I–V) characteristics. The difference between their flat-band voltages (0.17 eV), which are extracted from C–V measurements, disagrees with the ideal value (1.52 V), suggesting that the Fermi level should be pinned at the bonding interface. The C–V characteristics of the two junctions are calculated by assuming that the Fermi level is pinned at the interface. The measured C–V characteristics quantitatively agree with modeled ones obtained by assuming that the interface state density and conduction band discontinuity are 1.5 × 1014 cm−2 eV−1 and 0.63 eV, respectively. The effective heights of barriers at interfaces, which we estimate by analyzing dependences of I–V characteristics on the ambient temperature, are ∼10–20 meV for the two junctions at room temperature. This suggests that the transport of carriers is dominated by tunneling through interface states.

Mapping the Coulomb Environment in Interference-Quenched Ballistic Nanowires.

The conductance of semiconductor nanowires is strongly dependent on their electrostatic history because of the overwhelming influence of charged surface and interface states on electron confinement and scattering. We show that InAs nanowire field-effect transistor devices can be conditioned to suppress resonances that obscure quantized conduction thereby revealing as many as six sub-bands in the conductance spectra as the Fermi-level is swept across the sub-band energies. The energy level spectra extracted from conductance, coupled with detailed modeling shows the significance of the interface state charge distribution revealing the Coulomb landscape of the nanowire device. Inclusion of self-consistent Coulomb potentials, the measured geometrical shape of the nanowire, the gate geometry and nonparabolicity of the conduction band provide a quantitative and accurate description of the confinement potential and resulting energy level structure. Surfaces of the nanowire terminated by HfO2 are shown to have their interface donor density reduced by a factor of 30 signifying the passivating role played by HfO2.