Characteristics Of Inverter Research Articles

An alternative control synthesis for stability enhancement of digital-controlled LCL-filtered grid-connected inverter

• A control synthesis is proposed to damp capacitor current resonance for LCL-filtered GCI. • The stability and performance characteristics are analyzed and compared with methods from the literature. • Intuitive design, wider stable damping region, better dynamic performance, and higher parametric robustness are the potential benefits of the proposed control synthesis. In distributed power generation systems, the inherent resonance phenomena of LCL -filtered grid-connected inverter is one of the major challenges faced by the integration of renewable energy resources with the electric power grid. In this context, the capacitor current based multi-loop active damping method is employed due to lossless resonance damping and flexible control design. However, the damping loop with the feedback compensation design suffers from relatively higher parameters sensitivity unless employed with the reduced digital delays. The filter parameters fluctuation causes a shift in resonance frequency, which leads to ineffective damping at the critical resonance frequency and may risk the control loop stability. Therefore, an alternative linear control synthesis is proposed to design the capacitor current damping loop in order to reduce the filter parameters sensitivity. The proposed design realizes the equivalent virtual impedance in an alternative manner to suppress the resonance peak and enhanced the stability characteristics of the grid-connected inverter. A detailed stability and performance analysis have been done to show the widened stable damping region and high parametric robustness of the suggested design as compared to the literature method. Simulations and experimental results are presented to confirm the theoretical findings.

Tuning Threshold Voltage of Electrolyte-Gated Transistors by Binary Ion Doping.

Electrolyte-gated transistors (EGTs) operating at low voltages have attracted significant attention in widespread applications, including neuromorphic devices, nonvolatile memories, chemical/biosensors, and printed electronics. To increase the practicality of the EGTs in electronic circuits, systematic control of threshold voltage (Vth), which determines the power consumption and noise margin of the circuits, is essential. In this study, we present a simple strategy for systematically tuning Vth to almost half of the operating potential range of the EGT by controlling the electrochemical doping of electrolyte ions into organic p-type semiconductors. The type of anion in the ionogel determines Vth as well as other transistor characteristics, such as the subthreshold swing and mobility, because the positive hole carriers are the majority carriers. More importantly, Vth can be finely controlled by binary anion doping using ionogels with two anions with varying molar fractions at a fixed cation. In addition, the binary anion doping successfully controls the inversion characteristics of ion-gated inverters. As unlimited combinations of ion pairs are possible for ionogels, this study opens a route for controlling the device characteristics to expand the practicality and applicability of ionogel-based EGTs for next-generation ionic/electronic devices.

Performance analysis of grid-forming inverters in existing conformance testing

Grid-forming (GFM) inverters are promising technologies in future power systems. Although the voltage-source characteristic of the GFM inverter has been validated to enhance the stabilities in low-inertia power systems, modifying protective function mechanisms is needed from grid-following (GFL) inverters with the current-source characteristic. Therefore, the protective functions that coexist with grid stabilization capabilities in GFM inverters and their verification methods should be studied for practical deployment. This paper applies the existing Japanese conformance testing on prototypes of GFL and GFM inverters to reveal issues in the existing conformance testing framework, which was not designed to consider the voltage-source characteristics of GFM inverters. The test results identify the three main issues of GFM inverters in the existing test framework. The discussion based on the results will provide helpful knowledge to design future provisions on the functional requirements of GFM inverters and their verification methods.

(Invited, Digital Presentation) Low Voltage Operation of CMOS Inverter Based on WSe2 n/p FETs

Transition metal dichalcogenides (TMDC) have remarkable properties for the next generation of electronic devices [1]. A complementary metal-oxide-semiconductor (CMOS) inverter consisting of pairs of p-type and n-type field-effect transistor (FET) is a fundamental building block in modern digital electronics [2]. Therefore, realization of both p-type and n-type FETs based on semiconducting TMDC is of particular importance. Among various semiconducting TMDC, tungsten diselenide (WSe2) is a promising candidate for constructing a CMOS inverter because of its high mobility, symmetric electron and hole effective mass and ambipolar transport [3]. These prominent features of WSe2 motivates the fabrication and characterization of a CMOS inverter. One of the significant challenges is to develop a high-gain CMOS inverter for operation at a low power supply voltage (Vdd) for future low power digital electronics. Previous studies on a WSe2 CMOS inverter were limited to operation with a low gain of 3 or a high Vdd of more than 1 V under conditions of relatively low gate capacitance and degraded interfacial properties [3-5]. This study addressed these issues by developing a doping technique and gate stack technology to demonstrate the high-gain with low-Vdd operation of a WSe2 CMOS inverter [6]. The focus is on the doping technique of both electrons and holes to a WSe2 layer by simple spin-coating. Of particular interest in this study is the impact of gate stack technology on the CMOS inverter characteristics in low-Vdd operation. In this study, a hybrid self-assembled monolayer (SAM)/aluminum oxide (AlOx) gate dielectric is applied to a WSe2 CMOS inverter for high-gain low-Vdd operation since superior interfacial properties with high gate capacitance have been reported in molybdenum disulfide (MoS2) FETs.For p-type WSe2 FETs, the fluoropolymer CYTOP (AGC, CTX-809A) was applied since polarization in CYTOP due to the difference in electronegativity between C–F bonds generates holes in WSe2. On the other hand, poly(vinyl alcohol) (PVA) was utilized for n-type WSe2 FETs because positive charges in PVA accumulates electrons in WSe2. The resin solutions of both CYTOP and PVA were purchased from a commercial supplier. A heavily doped p-type silicon substrate (p+-Si) was thermally oxidized to form a 60 nm thick silicon dioxide (SiO2) layer for the global back-gate architecture. Palladium (Pd) and gold (Au) as the source and drain contacts for p-type and n-type WSe2 FETs were fabricated by the lift-off process, respectively. An aluminum (Al) gate was prepared and a hybrid SAM/AlOx gate dielectric was formed by oxygen (O2) plasma and an immersion process. After that, mechanically exfoliated WSe2 was transferred with a poly(dimethylsiloxane) (PDMS) stamp. Finally, CYTOP and PVA were deposited by spin-coating for p-type and n-type WSe2 FETs, respectively.Figures 1 (a) and (b) show the Id–Vg characteristics of fabricated FETs. For the p-type WSe2 FET, a small SS of 78 mV/dec and an on/off ratio of about 106 order were observed. On the other hand, the Id–Vg characteristics of the n-type WSe2 FET were degraded compared with those of the p-type WSe2 FET because of the Schottky contacts.Figures 2 (a) and (b) show the transfer characteristics and gain as a function of Vdd in CMOS inverter. The gain of the CMOS inverter increased to as high as 9 at Vdd of 0.5 V.Figure 3 shows the benchmark of this study. Our proposed concepts enabled the operation with high gain at a low Vdd as low as 0.5 V for the WSe2 CMOS inverter, which had not been realized in previous studies. The dangling-bond-free and ultrathin SAM/AlOx gate dielectric has an important role in the low-Vdd operation of the WSe2 CMOS inverter. This study opens up interesting directions for the research and development of TMDC-based devices and circuits.

The role of power device technology in the electric vehicle powertrain

In the automotive industry, the design and implementation of power converters and especially inverters, are at a turning point. Silicon (Si) IGBTs are at present the most widely used power semiconductors in most commercial vehicles. However, this trend is beginning to change with the appearance of wide-bandgap (WBG) devices, particularly silicon carbide (SiC) and gallium nitride (GaN). It is therefore advisable to review their main features and advantages, to update the degree of their market penetration, and to identify the most commonly used alternatives in automotive inverters. In this paper, the aim is therefore to summarize the most relevant characteristics of power inverters, reviewing and providing a global overview of the most outstanding aspects (packages, semiconductor internal structure, stack-ups, thermal considerations, etc.) of Si, SiC, and GaN power semiconductor technologies, and the degree of their use in electric vehicle powertrains. In addition, the paper also points out the trends that semiconductor technology and next-generation inverters will be likely to follow, especially when future prospects point to the use of “800 V" battery systems and increased switching frequencies. The internal structure and the characteristics of the power modules are disaggregated, highlighting their thermal and electrical characteristics. In addition, aspects relating to reliability are considered, at both the discrete device and power module level, as well as more general issues that involve the entire propulsion system, such as common-mode voltage.

Simulation of CMOS logic inverter based on vertically stacked polycrystalline silicon nanosheet gate-all-around MOSFET and its electrical characteristics

The DC and inverter characteristics for the position of a single grain boundary (GB) in a nanosheet gate-all-around (GAA) MOSFET based on poly-crystalline silicon with three channels were analyzed. For the same channel layer, owing to the band banding by the drain voltage, the GB displays decreasing influence on the current as it moves towards the drain. The GB exhibits the highest on-state current of 6.89 × 10−4 A/μm when it is located at the drain. The DC characteristics determine the noise margin and delay time of the inverter. The higher the induced current, the lower the noise margin and delay time of the NMOS leading to improved characteristics of the inverter. The delay time when the GB existed in the drain, was considered to be the best in terms of DC performance as it was the lowest at 6.47 ps and showed 8.3% improvement in the switching characteristics.

Pseudotime-Varying Admittance Characteristic of Grid-Connected Inverter and Its Corrected Admittance Measurement Method

When the control parameters and operating conditions remain unchanged, it is usually believed that the admittance characteristic of grid-connected inverter is time-invariant. However, considering the effect of frequency-coupling, an abnormal phenomenon is observed in the admittance measurement of the grid-connected inverter: the phase of the off-diagonal elements <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Y</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">12</sub> and <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Y</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">21</sub> in the admittance matrix is always changed with time, which presents a time-varying admittance characteristic. To explore this phenomenon, the theoretical analyses based on the traditional frequency-coupling admittance measurement method are made. Because the initial phase of the signal cannot be obtained from Fast Fourier Transform (FFT) in experiments and the disturbance frequency and coupling frequency are different, the phase difference between the two frequency components changes with time. However, the influence is not considered in the traditional frequency-coupling admittance measurement method, which makes the measurement results exhibit the confusing time-varying characteristic. The phenomenon is defined as pseudotime-varying admittance characteristic in this letter. To accurately measure the admittance characteristic of the grid-connected inverter, a frequency-coupling admittance measurement method based on phase correction is proposed, which corrects the phase of disturbance frequency components and coupling frequency components. Finally, the effectiveness of the proposed measurement method is verified by experiments.

SiC Complementary Junction Field-Effect Transistor Logic Gate Operation at 623 K

Here, we show that silicon carbide (SiC) complementary logic gates composed of p- and n-channel junction field-effect transistors (JFETs) fabricated by ion implantation operate at 623 K with a supply voltage as low as 1.4 V. The logic threshold voltage shift of the complementary JFET (CJFET) inverter is only 0.2 V from 300 to 623 K. Furthermore, temperature dependencies of the static and dynamic characteristics of the CJFET inverter are well explained by a simple analytical model of SiC JFETs.

Forecasting annual electric power consumption using a random parameters model with heterogeneity in means and variances

This paper develops heterogeneity-based econometric models that forecast the yearly consumption of electricity. Unlike previous research, this paper departs from classical econometric regression models and explicitly accounts for unobserved heterogeneity and corresponding interactions. More specifically, three modeling approaches are applied: a random parameter linear regression model (RPLRM), a correlated random parameter linear model (C-RPLRM), and a random parameter linear model with heterogeneity in means and variances (RP-HMV). In addition, a grey model is estimated based on historical consumption data. The estimation results clearly demonstrate that the random parameter methodology is statistically superior to the classical multiple linear regression model. Moreover, based on the test results reported in this paper, as well as the forecasting accuracy measures, the RP-HMV model is shown to be statistically outstanding, with a very low forecasting error (MAPE of 0.04%) compared to the other models, including the grey model. Our estimation results show that two variables, namely the average electricity price and contribution of renewable energy to the national and distribution grids, produced statistically significant random parameters with heterogeneous variances and means. Moreover, the results show that factors including the number of households on the distribution grid, average electric power price, and availability of all-season air conditioners with hot and cold inverter characteristics significantly influenced the electricity consumption. These empirical results reveal that random-parameters models with heterogeneity in their means and variances can provide a detailed analysis of the predictor variables shaping the annual electricity consumption, and they highlight the importance of including unobserved heterogeneity and related interactions in econometric models.

The Online Parameter Identification Method of Permanent Magnet Synchronous Machine under Low-Speed Region Considering the Inverter Nonlinearity

To realize the high-performance control of a servo system, parameter accuracy is very important for the design of the controller. Thus, the online parameter identification method has been widely researched. However, the nonlinearity of the inverter will lead to an increase in resistance identification error and the fluctuation of inductance identification results. Especially in the low-speed region, the influence of the inverter is more obvious. In this paper, an offline neural network is proposed considering the parasitic capacitance to identify the nonlinearity of the inverter. Based on the Kirchhoff equation in the static state of the motor, the nonlinear voltage equation is established, and the gradient direction of the weight coefficients has been re-derived. Using the gradient descent method, the identification error can converge to zero. Moreover, the d-axis voltage equation is established considering the nonlinearity of the inverter and an online adaptive observer was proposed. Based on the Lyapunov equation, the adaptive laws are derived. Further, the decoupling of the deadtime voltage and resistance voltage is realized by using the result of neural network identification. With the proposed algorithm, nonlinear identification of the inverter characteristics is realized, and the resistance and inductance identification accuracy in the low-speed region is improved. The effectiveness of the proposed methods is verified through experimental results.

Capacitor Technologies: Characterization, Selection, and Packaging for Next-Generation Power Electronics Applications

DC-bus capacitors take up substantial space in an electric vehicle (EV) traction inverter, limiting the traction drive’s volumetric power density. Film capacitors are typically used, but other capacitor technologies with higher energy densities can help reduce the overall size. In this article, several commercial capacitor technologies are considered for use as dc-bus capacitors for EV traction inverters. They are characterized, evaluated, and compared for optimized design for volume reduction. This article also proposes a novel capacitor packaging technique that utilizes symmetrically distant parallel capacitor branches from termination, which improves electrical and thermal performance compared to a traditional flat-printed circuit board-based design. The proposed design was prototyped for a 100-kW traction inverter, and then, the thermal and electrical characteristics were evaluated under various operating conditions. Results show that the proposed symmetrical design has 40% lower layout inductance and 80% lower temperature difference than a traditional package among the parallel capacitor branches.

Shift of switching threshold in low-dimensional semiconductor-based complementary inverters via inkjet printing

MoS2 crystals grown by chemical vapor deposition are suited for realization of practical 2D semiconductor-based electronics. In order to construct complementary circuits with n-type MoS2, another p-type semiconductor, whose performance can be adjusted corresponding to that of MoS2 in the limited chip area, has to be sought. Herein, we present a method for tuning switching threshold voltages of complementary inverters simply via inkjet printing without changing their channel dimensions. Random networks of inkjet printed single-walled carbon nanotubes are formed as p-channels beside MoS2, and their density and thickness are controlled by varying the number of printed layers. As a result, p-type transistor characteristics as well as inverter characteristics are facilely tuned only by varying the number of printed layers.

A Critical Aspect of Dynamic Stability in Autonomous Microgrids: Interaction of Droop Controllers Through the Power Network

It is explored in this article that the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">interaction of droop controllers through the power network</i> (IDCPN) is the dominant factor affecting the dynamic stability of an autonomous networked microgrid (ANMG) and new models are developed to support the IDCPN. The models are developed to analyze the impacts of three parts on the IDCPN: 1) the X/R ratio of the power network impedance; 2) the droop controllers including low-pass filters, and 3) the impedance characteristics of the grid-forming voltage source inverters (VSIs). The low-frequency oscillations (LFO), excited by IDCPN, is identified and quantified by modeling the first and second parts. The critical impact of the low X/R ratio on amplifying the LFO is clarified. Then, the output impedance of the grid-forming VSI, including the virtual inductance loop (VIL), is developed and rigorously observed that reveals inefficient performance. It is shown that the VIL improves dynamic performance by providing sufficient damping to suppress LFOs and not by effectively boosting the X/R of the VSI output impedance. This, however, is problematic in the current limiting that puts the ANMG at instability risk because of the resistive–capacitive impedance characteristics of the VSIs. A <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">${{\boldsymbol{H}}_\infty }$</tex-math></inline-formula> robust controller is proposed to replace VIL for suppressing LFO and stabilizing ANMG. Numerical/simulation results are provided to prove the accuracy of the models.

Impedance Modeling and Stability Analysis of Three-Phase Four-Wire Inverter with Grid-Connected Operation

With the continuous penetration and development of renewable energy power generation, distributed grids and microgrids are becoming increasingly important in power systems. In the distribution networks and microgrids, the grid impedance is comparatively large and cannot be ignored. Usually, the parallel compensation is used to improve the grid quality. In these three-phase four-wire power systems, analyzing the impedance characteristics of the grid-connected inverter is vital to carry out the small-signal stability analysis. Thus, it is vital to consider the influence of the zero-sequence component in addition to the positive-sequence component and the negative-sequence component when it comes to analyzing system stability. In this paper, the impedances of three-phase four-wire split capacitor inverter and three-phase four-leg inverter are established. Based on the achieved impedance, the similarities and differences between the impedances of three-phase four-wire split capacitor inverter and impedance of three-phase four-leg inverter are studied. The main difference is reflected in zero-sequence impedance. Additionally, the zero-sequence impedance characteristics and the dominating factors deciding the zero-sequence impedance are analyzed. Then, the stability of the system considering the grid impedance and impedance of three-phase four-wire inverter is investigated by separately considering the stability of the positive–negative-sequence component and the stability of the zero-sequence component. Several cases of small-signal instability caused by the positive–negative-sequence component or zero-sequence component are revealed. The experimental results validate the theoretical analysis.

A modified power decoupling control strategy for a grid-connected inverter with a low switching frequency under unbalanced grid voltages

In the photovoltaic grid-connected power generation system, when proportional resonant (PR) control is adopted for the grid-side inverter in the two-phase stationary coordinate (αβ), there is a coupling problem between active power (P) and reactive power (Q). Under unbalanced grid conditions, especially in high-power applications where the switching frequency of the grid inverter needs to be reduced, the power coupling problem will be exacerbated. Based on the instantaneous power response characteristics of the grid inverter, expressions of the power coupling coefficient under unbalanced power grids are derived in this paper, and the influence of the unbalanced grid voltage on the power coupling is revealed. Moreover, a decoupled grid-side model of the grid inverter is established, and a modified controller based on positive and negative sequence (P–N sequence) decoupling is proposed to solve the power coupling problem. The closed-loop transfer function of the system with the modified current controller is studied, and the stability of the modified controller is analyzed according to the bilateral frequency response diagram. Based on analysis of the coupling coefficient, the degree of coupling between P and Q can be reduced significantly by applying the proposed control method. Furthermore, in order to solve the influence of the delay on the power coupling caused by the low switching frequency, the decoupling compensation link for the delay is introduced, which can eliminate the influence of delay on power coupling. Finally, experiments are performed on a grid-connected inverter prototype. The experimental results show that when the grid voltage is unbalanced, the proposed control method can reduce the coupling degree of the P and Q, which also improves the dynamic performance of the grid-connected inverter with a low switching frequency.

A Synchronous Auxiliary Resonant Commutated Pole Soft-Switching Inverter With Improved Load Adaptability

To realize a soft-switching inverter with small volume and high efficiency, a synchronous auxiliary resonant commutated pole (SARCP) soft-switching inverter with improved load adaptability is proposed, which only contains two auxiliary inductors. In one switching cycle, all commutation processes can be synchronously assisted by an auxiliary inductor. Soft switching is achievable for all switches of the SARCP inverter. Compared with the auxiliary resonant commutated pole (ARCP) inverter, the SARCP inverter has improved load adaptability, especially in the light load current condition, which is beneficial to reduce the total power loss and the dc-link capacitance. The equivalent circuits of the SARCP inverter are given under different operation modes. The operation principle, soft-switching implementation conditions, parameter optimization design methods, and the characteristics of the SARCP inverter are analyzed. Finally, simulation and experimental results verify the effectiveness of the SARCP inverter.

Multi-Objective Hierarchically-Coordinated Volt/Var Control for Active Distribution Networks With Droop-Controlled PV Inverters

Due to increasing installation of photovoltaic (PV) units, reactive power compensation from PV inverters contributes significantly to Volt/Var control (VVC) for active distribution networks. While PV inverters support VVC functions, lack of systematic coordination and heavily varying PV power generation lead to low control efficiency. To maximize benefits of the inverter-based VVC, this paper proposes a multi-objective hierarchically-coordinated VVC method with droop-controlled PV inverters. This method aims to minimize both average bus voltage deviation and network power loss, by simultaneously optimizing PV inverter reactive power setpoints for central control and droop control functions for local control. The droop control characteristics of PV inverters are fully modeled, including voltage ranges of the dead band and control zones, as well as droop slope gradients. In addition, this paper applies a Taguchi’s orthogonal array testing technique to handle random variations of PV power generation in the optimization problem. Moreover, to efficiently solve this optimization problem with integer variables, this paper proposes a solution algorithm based on model relaxation and a feasibility pump method. The proposed method is tested on two distribution systems, and simulation results verify highly efficient control performance in comparison with existing methods.

Quantum Dot Gate (QDG) FETs to Fabricate n-MOS Inverters Exhibiting 3-State Logic

This paper presents the experimental characteristics of 3-state n-MOS inverters utilizing Quantum Dot Gate (QDG) FETs. By employing FETs that have quantum dots in the gate region, particularly Si-SiOx cladded quantum dots and Ge-GeOx cladded quantum dots, intermediate states were observed in both variations of the device, both of which using the same architecture and mask set.

Two‐stage voltage control strategy in distribution networks with coordinated multimode operation of PV inverters

To solve the problems of voltage violation and fast voltage fluctuation caused by photovoltaic (PV) grid connections in distribution networks, a two-stage coordinated voltage control strategy for PV inverters with multimode coordinated operation in distribution networks (DNs) is proposed. It is based on the characteristics of PV inverters that can be regulated rapidly and continuously. First, the voltage control process is divided into two control stages according to the voltage change rate, and the corresponding voltage control models are established. Then, the operating modes of PV inverters are classified into three modes: economic prevention, economic control, and efficient control. Different operating modes are used to adapt to the two-stage voltage control. Finally, a voltage fast control solution algorithm is proposed, which considers adaptive time delays and combines local measurement, prediction, and communication information to update control commands. The effectiveness and feasibility of the proposed voltage control strategy were demonstrated through simulation tests on a real 10-kV line with a high PV penetration rate in the Anhui province of China. The results show that the proposed strategy can prevent voltage violation and sudden changes and can smooth out voltage fluctuation.

Characteristics of hydrogen terminated single crystalline diamond logic inverter

Diamond has a wide band gap, high carrier mobility, and high thermal conductivity, thereby possessing great potential applications in high power, and high temperature electronics devices, and also inhigh temperature logic circuit. In this work, we fabricate a hydrogen terminated diamond metal-oxide-semiconductor field effect transistor (MOSFET) by using the atomic layer deposition grown Al&lt;sub&gt;2&lt;/sub&gt;O&lt;sub&gt;3&lt;/sub&gt; as a gate dielectric and passivation layer. The device has a gate length and width of 4 μm and 50 μm, respectively. The device delivers a maximum output current of about 113.4 mA/mm at &lt;i&gt;V&lt;/i&gt;&lt;sub&gt;GS&lt;/sub&gt; of –6 V and an ultra-high on/off ratio of 10&lt;sup&gt;9&lt;/sup&gt;. In addition, we fabricate three resistors, respectively, with an interelectrode distance of 20, 80 and 160 μm, corresponding to the resistance value of 16.7, 69.5 and 136.4 kΩ, respectively. The logic inverter is realized by combining the MOSFET with the load resistance, and the characteristics of the logic inverter are demonstrated successfully, which indicates that the diamond MOSFET has great potential applications in future logic circuits.