Channel Of Field Effect Transistor Research Articles

Amplifying Electron-Donor Signal of the "Water Gate" Enabled Low Detection Ability of a Field-Effect Transistor-Based Humidity Sensor.

Low humidity detection down to the parts per million level is urgently demanded in various industrial applications. The hardly detected tiny electrical signal variations caused by a very small amount of water adsorption are one of the intrinsic reasons that restrain the detection limit of the humidity sensors. Herein, a carbon-based field-effect transistor (FET) humidity sensor utilizing adsorbed water as the dual function of a sensing gate and analyte was proposed. Owing to the electron donor property of the "water gate" that can serve as a negative voltage exerted on the dielectric layer, the electrical conductivity of the FET's channel can be significantly modulated, therefore realizing signal amplification. The proposed sensor presents a detection limit of lower than 1% RH. Besides, the fabricated sensors show good batch consistency (response deviation of 0.5%), repeatability, long-term stability, and acceptable hysteresis (6.3% relative humidity (RH)) in humidity detection. We hope that our work can offer a novel strategy for the application and integration of low humidity detection from the device aspect rather than sensing materials synthesis.

Step-necking growth of silicon nanowire channels for high performance field effect transistors

Ultrathin silicon nanowires (diameter <30 nm) with strong electrostatic control are ideal quasi-1D channel materials for high-performance field effect transistors, while a short channel is desirable to enhance driving current. Typically, the patterning of such delicate channels relies on high-precision lithography, which is not applicable for large area electronics. In this work, we demonstrate that ultrathin and short silicon nanowires channels can be created through a local-curvature-modulated catalytic growth, where a planar silicon nanowires is directed to jump over a crossing step. During the jumping dynamic, the leading droplet undergoes significant stretching, producing a short necking segment of <100 nm in length, with a reduced diameter from approximately 45 nm to <25 nm. Compared to the FETs with uniform silicon nanowire channels, our step-necked silicon nanowire FETs exhibit substantially enhanced on/off current ratio Ion/off > 8 × 107 and a sharper subthreshold swing of 70 mV/dec, thanks to a stronger gating effect in the middle channel and markedly improved electric contacts at the thicker source/drain ends. These findings mark the pioneering experimental demonstration of catalytic growth acting as a deterministic fabrication method for precisely crafting engineered FET channels, ideally fitting the requirements of high-performance large-area displays and sensors.

Engineering Nonvolatile Polarization in 2D α-In2Se3/α-Ga2Se3 Ferroelectric Junctions

The advent of two-dimensional (2D) ferroelectrics offers a new paradigm for device miniaturization and multifunctionality. Recently, 2D α-In2Se3 and related III–VI compound ferroelectrics manifest room-temperature ferroelectricity and exhibit reversible spontaneous polarization even at the monolayer limit. Here, we employ first-principles calculations to investigate group-III selenide van der Waals (vdW) heterojunctions built up by 2D α-In2Se3 and α-Ga2Se3 ferroelectric (FE) semiconductors, including structural stability, electrostatic potential, interfacial charge transfer, and electronic band structures. When the FE polarization directions of α-In2Se3 and α-Ga2Se3 are parallel, both the α-In2Se3/α-Ga2Se3 P↑↑ (UU) and α-In2Se3/α-Ga2Se3 P↓↓ (NN) configurations possess strong built-in electric fields and hence induce electron–hole separation, resulting in carrier depletion at the α-In2Se3/α-Ga2Se3 heterointerfaces. Conversely, when they are antiparallel, the α-In2Se3/α-Ga2Se3 P↓↑ (NU) and α-In2Se3/α-Ga2Se3 P↑↓ (UN) configurations demonstrate the switchable electron and hole accumulation at the 2D ferroelectric interfaces, respectively. The nonvolatile characteristic of ferroelectric polarization presents an innovative approach to achieving tunable n-type and p-type conductive channels for ferroelectric field-effect transistors (FeFETs). In addition, in-plane biaxial strain modulation has successfully modulated the band alignments of the α-In2Se3/α-Ga2Se3 ferroelectric heterostructures, inducing a type III–II–III transition in UU and NN, and a type I–II–I transition in UN and NU, respectively. Our findings highlight the great potential of 2D group-III selenides and ferroelectric vdW heterostructures to harness nonvolatile spontaneous polarization for next-generation electronics, nonvolatile optoelectronic memories, sensors, and neuromorphic computing.

Simultaneous determination of refined values of mobility, channel and contact resistance in organic field-effect transistors utilizing the four- and three-probe methods

Abstract Accurate determination of charge carrier mobility is a critical aspect in an organic field-effect transistor (OFET) as it is tightly correlated to the development of new materials, better device designs and improved fabrication methods. The presence of high contact resistance at the metal–organic semiconductor interface introduces an intrinsic error in the extraction of charge carrier mobility. In this report, electrical circuit analysis for the determination of the refined channel mobility, total contact resistance and channel resistance values is showcased for a poly(3-hexylthiophene) OFET with bottom-gate bottom-contact architecture. The process of determination is based on the combination of the conventional four-probe and three-probe measurement techniques. These two techniques are used in conjunction to assess refined mobility values in the channel region. This is followed by the determination of total contact resistance and channel resistances. The results show that, at a fixed drain current, mobility increases with the gate voltage while both the contact and channel resistances decrease.

Wafer-Scale Growth of Ultrauniform 2D PtSe2 Films with Spatial and Thickness Control through Multi-step Metal Conversion.

Metal conversion processes have been instrumental in advancing semiconductor technology by facilitating the growth of thin-film semiconductors, including metal oxides and sulfides. These processes, widely used in the industry, enhance the semiconductor manufacturing efficiency and scalability, offering convenience, large-area fabrication suitability, and high throughput. Furthermore, their application to emerging two-dimensional (2D) semiconductors shows promise in addressing spatial control and layer number control challenges. In this work, we designed a multi-step metal conversion process for 2D materials to synthesize a high-quality and ultrauniform film. PtSe2 is introduced to utilize its wide-band-gap tunability, which exhibits both semiconductor and metallic properties. Our multi-step-grown PtSe2 film shows extremely low roughness (Ra = 0.107 nm) and improved interlayer quality compared to the single-step PtSe2 film. Additionally, we explored the growth mechanism of the metal conversion process and how the multi-step method contributes to the thickness uniformity of the film. We demonstrated a thin PtSe2 channel field-effect transistor (FET) array with p-type behavior with a maximum on/off ratio ∼103. The FET fabricated by the MoS2 channel with the semimetallic multi-step PtSe2 electrode shows an enhanced performance in mobility and contact resistance compared to the conventional single-step PtSe2 electrode FET.

Bundling effect of semiconductor-enriched single-walled carbon nanotube networks on field-effect transistor performance

Despite continual progress in creating semiconductor-enriched single-walled carbon nanotube (SWCNT) networks, significant challenges still remain in achieving electronically homogeneous channels for field-effect transistors (FETs) due to persisting metallic percolation and uncontrollable nanotube bundling. To address this critical issue, we systematically explored the bundling effect of the SWCNTs on the electrical characteristics of SWCNT network-based FETs. Devices with higher bundle density and larger bundles showed enhanced FET metrics in drive current, on/off ratio, subthreshold swing, transconductance, and thermal dependence, thereby enabling highly uniform and integrated SWCNT FETs at wafer scale. These performance enhancements are attributed to the increased conduction channels, the metallic CNT shielding effect in dense, thick, and locally aligned SWCNT bundles, and enhanced contact properties. Additionally, SWCNT network-based FETs were demonstrated as biosensors to detect the influenza A H5N1 virus. Larger bundles and higher densities of SWCNT improved sensing performance due to enhanced semiconducting properties and the metallic screening effect within the bundles.

WS2 Nanotube Transistor for Photodetection and Optoelectronic Memory Applications.

Nanotube and nanowire transistors hold great promises for future electronic and optoelectronic devices owing to their downscaling possibilities. In this work, a single multi-walled tungsten disulfide (WS2) nanotube is utilized as the channel of a back-gated field-effect transistor. The device exhibits a p-type behavior in ambient conditions, with a hole mobility µp ≈ 1.4 cm2V-1s-1 and a subthreshold swing SS ≈ 10 V dec-1. Current-voltage characterization at different temperatures reveals that the device presents two slightly different asymmetric Schottky barriers at drain and source contacts. Self-powered photoconduction driven by the photovoltaic effect is demonstrated, and a photoresponsivity R ≈ 10 mAW-1 at 2V drain bias and room temperature. Moreover, the transistor is tested for data storage applications. A two-state memory is reported, where positive and negative gate pulses drive the switching between two different current states, separated by a window of 130%. Finally, gate and light pulses are combined to demonstrate an optoelectronic memory with four well-separated states. The results herein presented are promising for data storage, Boolean logic, and neural network applications.

Amplification‐free sub-femtomolar monitoring of SARS-CoV-2-RNA in serum samples using cDNA-modified MoS2 field-effect transistor

The rapid spread of infectious diseases, exemplified by the well-known case of COVID-19, which has led to a global pandemic, has garnered increasing attention toward the development of simple and efficient biosensors for diagnosis. In this study, a field-effect transistor (FET)-based biosensor offers an alternative and promising solution for the diagnosis of clinical COVID-19. Molybdenum disulfide (MoS2) in a channel FET modified with a probe complementary DNA (cDNA) can sensitively detect selected specific sequences from SARS-CoV-2 through hybridization. MoS2 was modified with probe cDNA and exhibited a linear concentration range of 1 fM–0.1 nM in both phosphate-buffered saline (PBS) and serum samples, with low limits of detection (LOD) of 0.21 and 0.73 fM, respectively. In addition, it demonstrated a rapid response time of 3 min in clinical samples. The developed biosensor is capable of analyzing RNA from 19 clinical samples. These results indicate that the biosensor successfully distinguished between healthy and infected samples, which is consistent with the RT-PCR results (kappa coefficient = 1). Additionally, a notable difference was observed between the RdRp samples of SARS-CoV-2 and SARS-CoV. Therefore, we believe that this study offers a reliable and appealing option for the diagnosis of COVID-19.

Characterization of bulk trap density using fully I–V-based optoelectronic differential ideality factor in multi-layer MoS2 FETs

Abstract Molybdenum disulfide (MoS2) has excellent optoelectronic properties, chemical stability, and a two-dimensional (2D) structure, making MoS2 a very versatile field-effect device material. Herein, we characterize MoS2 and utilize a photo-responsive I–V technique for extracting the energy distribution of the bulk traps in multi-layer MoS2 field effect transistors (FET). This method uses the differential ideality factor in both dark and light conditions. The differential ideality factor enables the efficient quantitative extraction of the device trap density by considering the nonlinear characteristics of the subthreshold region (V ON &lt; V GS &lt; V T). To accurately differentiate between the sub-bandgap traps and the interface traps near the conduction band, near-infrared light (λ= 1530 nm) optical illumination was used for the light state characterization. The bulk trap densities under dark state and light state conditions were derived for multi-layer (7-layer and 9-layer) MoS2 FET channels, and the influence of light illumination and overall multi-layer thickness on the bulk trap density was confirmed. The accurate extraction of the trap density enables the design of MoS2 FETs with long-term stability and high optoelectronic performance.

Characterizing parameter variations for enhanced performance and adaptability in 3 nm MBCFET technology

With the continuous scaling down of semiconductor devices, traditional transistor architectures face significant challenges in maintaining performance and power efficiency. Multi-bridge channel field-effect transistors (MBCFETs) are promising candidates for next-generation of transistors, enabling significant size reduction while preserving high performance. This paper investigates both n-type and p-type 3-nm MBCFETs with a focus on their behavior under diverse operating conditions. The study examines the influence of doping concentration, sheet thickness, temperature, device width, and the number of sheets, on the device's functionality aiming for high-performance applications. Doping concentrations of acceptors and donors ranging from 1 × 10 15 cm−3 - 9 × 10 17 cm−3 and 1 × 10 17 cm−3 - 9 × 10 19 cm−3, respectively, to observe their impact on device performance. Similarly, sheet thicknesses from 1 nm to 2 nm and device widths from 3 nm to 30 nm are analyzed to understand the scaling effects. The temperature varies from 273.15 K to 573.15 K to simulate different operational environments, while the number of sheets, ranging from 1 to 7, is adjusted to evaluate structural effects on device behavior. By extracting the subthreshold swing (SS), threshold voltage (Vth), ON-current (ION), OFF-current (IOFF), and the ION/IOFF ratio, the study offers valuable insights into the suitability and potential applications of N-MBCFET and P-MBCFET devices at the ultra-scaled 3 nm dimension. At room temperatures, the SS achieves 60 mV dec⁻1 for n-type and 64 mV dec⁻1 for p-type which indicates proper switching speed, with corresponding ON/OFF ratios of 2 × 106 and 1 × 105 for n-type and p-type, respectively. This study makes notable contributions to the field of nanoscale transistor technology, aiding in the design and optimization of future electronic devices.

Nanotransistor-based gas sensing with record-high sensitivity enabled by electron trapping effect in nanoparticles

Highly sensitive, low-power, and chip-scale H2 gas sensors are of great interest to both academia and industry. Field-effect transistors (FETs) functionalized with Pd nanoparticles (PdNPs) have recently emerged as promising candidates for such H2 sensors. However, their sensitivity is limited by weak capacitive coupling between PdNPs and the FET channel. Herein we report a nanoscale FET gas sensor, where electrons can tunnel between the channel and PdNPs and thus equilibrate them. Gas reaction with PdNPs perturbs the equilibrium, and therefore triggers electron transfer between the channel and PdNPs via trapping or de-trapping with the PdNPs to form a new balance. This direct communication between the gas reaction and the channel enables the most efficient signal transduction. Record-high responses to 1–1000 ppm H2 at room temperature with detection limit in the low ppb regime and ultra-low power consumption of ~\\documentclass[12pt]{minimal} \\usepackage{amsmath} \\usepackage{wasysym} \\usepackage{amsfonts} \\usepackage{amssymb} \\usepackage{amsbsy} \\usepackage{mathrsfs} \\usepackage{upgreek} \\setlength{\\oddsidemargin}{-69pt} \\begin{document}$$\\sim$$\\end{document}300 nW are demonstrated. The same mechanism could potentially be used for ultrasensitive detection of other gases. Our results present a supersensitive FET gas sensor based on electron trapping effect in nanoparticles.

Ultrathin LiF Insertion and Ensued Contact Resistance Reduction in MoS2 Channel Transistors

Molybdenum disulfide (MoS2) is a representative 2D n‐type semiconductor for various electron devices, but its lateral conduction performances are still restricted, which are mainly attributed to the contact resistance (Rc) in field‐effect transistors (FETs). Low‐enough Rc value must be realized toward practical device fabrications. Herein, 2D MoS2 FETs using chemical vapor deposited (CVD) MoS2 channels with and without the ultrathin LiF interlayer are fabricated, to demonstrate the practical benefits of LiF. In addition, LiF is also applied to Al metal which is known to be more Earth abundant than Au, expecting the similar positive effects of the inserted LiF. When 35 CVD‐grown MoS2 channel FETs with Au are characterized on an identical gate dielectric substrate, the higher value of mobility ranging 55–60 cm2 V s−1 is achieved with the inserted LiF than that without LiF (≈20 cm2 V s−1). In the case of another MoS2 FET with exfoliated flake channel and Al contact, its field‐effect mobility with LiF insertion appears to be ≈35 cm2 V s−1, approaching to an almost Rc‐free mobility (42 cm2 V s−1).

Piezoresistive sensitivity enhancement below threshold voltage in sub-5 nm node using junctionless multi-nanosheet FETs

In this paper, the piezoresistive sensitivity is enhanced by applying uniform mechanical stress (MS) on the multi-nanosheet (NS) channels of sub-5 nm junctionless field-effect transistors. The piezoresistivity of the sensing device is boosted by narrowing channel conductivity using low gate biasing and reducing physical channel width, resulting in the maximum (∼6 times higher) sensitivity observed in the subthreshold regime compared to the ON-state condition. In addition, the sensitivity is extensively increased by ∼30.3% near the threshold voltage with horizontally multi-NS stacking due to the uniform MS distribution on the multi-NS channels, which can sense slight deflection of pressure on the circular diaphragm. These results show that the tunable sensitivity of junctionless multi-channel devices is superior to the inversion mode, a consequence of the less scattering effect, better thermal stability, and low electronic noise.

Toward Ideal Low-Frequency Noise in Monolayer CVD MoS2 FETs: Influence of van der Waals Junctions and Sulfur Vacancy Management.

The pursuit of sub-1-nm field-effect transistor (FET) channels within 3D semiconducting crystals faces challenges due to diminished gate electrostatics and increased charge carrier scattering. 2D semiconductors, exemplified by transition metal dichalcogenides, provide a promising alternative. However, the non-idealities, such as excess low-frequency noise (LFN) in 2D FETs, present substantial hurdles to their realization and commercialization. In this study, ideal LFN characteristics in monolayer MoS2 FETs are attained by engineering the metal-2D semiconductor contact and the subgap density of states (DOS). By probing non-ideal contact resistance effects using CuS and Au electrodes, it is uncovered that excess contact noise in the high drain current (ID) region can be substantially reduced by forming a van der Waals junction with CuS electrodes. Furthermore, thermal annealing effectively mitigates sulfur vacancy-induced subgap density of states (DOS), diminishing excess noise in the low ID region. Through meticulous optimization of metal-2D semiconductor contacts and subgap DOS, alignment of 1/f noise with the pure carrier number fluctuation model is achieved, ultimately achieving the sought-after ideal LFN behavior in monolayer MoS2 FETs. This study underscores the necessity of refining excess noise, heralding improved performance and reliability of 2D electronic devices.

Comparative Study of Field-Effect Transistors Based on Graphene Oxide and CVD Graphene in Highly Sensitive NT-proBNP Aptasensors.

Graphene-based materials are actively being investigated as sensing elements for the detection of different analytes. Both graphene grown by chemical vapor deposition (CVD) and graphene oxide (GO) produced by the modified Hummers' method are actively used in the development of biosensors. The production costs of CVD graphene- and GO-based sensors are similar; however, the question remains regarding the most efficient graphene-based material for the construction of point-of-care diagnostic devices. To this end, in this work, we compare CVD graphene aptasensors with the aptasensors based on reduced GO (rGO) for their capabilities in the detection of NT-proBNP, which serves as the gold standard biomarker for heart failure. Both types of aptasensors were developed using commercial gold interdigitated electrodes (IDEs) with either CVD graphene or GO formed on top as a channel of liquid-gated field-effect transistor (FET), yielding GFET and rGO-FET sensors, respectively. The functional properties of the two types of aptasensors were compared. Both demonstrate good dynamic range from 10 fg/mL to 100 pg/mL. The limit of detection for NT-proBNP in artificial saliva was 100 fg/mL and 1 pg/mL for rGO-FET- and GFET-based aptasensors, respectively. While CVD GFET demonstrates less variations in parameters, higher sensitivity was demonstrated by the rGO-FET due to its higher roughness and larger bandgap. The demonstrated low cost and scalability of technology for both types of graphene-based aptasensors may be applicable for the development of different graphene-based biosensors for rapid, stable, on-site, and highly sensitive detection of diverse biochemical markers.

Effect of fabrication process on contact resistance and channel in graphene field effect transistors

Contact resistance, as one of the main parameters that limits the performance of graphene-based transistors, is highly dependent on the metal-graphene contact fabrication processes. These processes are investigated and the corresponding resistances are measured based on the transfer length method (TLM). In fabrication processes, when annealing is done on chemical vapor deposition (CVD)-grown graphene samples that are transferred onto SiO2/Si substrates, the adhesion of graphene to the substrate is improved, and poly methyl methacrylate (PMMA) residues are also reduced. When the metal deposition layer is first applied to the graphene, and then, the photolithography process is performed to define the electrodes and graphene sheet, the graphene-metal contact resistance is better than that in other methods due to the removal of photoresist residues. In fact, by changing the sequence of the fabrication process steps, the direct contact between photoresist and graphene surface can be prevented. Thus, the contact resistance is reduced and conductivity increases, and in this way, the performance of graphene transistor improves. The results show that the fabrication process has a noticeable effect on the transistor properties such as contact resistance, channel sheet resistance, and conductivity.‌ Here, by using the annealing process and changing the order of photolithography processes, a contact resistance of 470 Ω μm is obtained for Ni-graphene contact, which is relatively favorable.

Direct Assessment of Defective Regions in Monolayer MoS2 Field-Effect Transistors through In Situ Scanning Probe Microscopy Measurements.

Implementing two-dimensional materials in field-effect transistors (FETs) offers the opportunity to continue the scaling trend in the complementary metal-oxide-semiconductor technology roadmap. Presently, the search for electrically active defects, in terms of both their density of energy states and their spatial distribution, has turned out to be of paramount importance in synthetic transition metal dichalcogenides layers, as they are suspected of severely inhibiting these devices from achieving their highest performance. Although advanced microscopy tools have allowed the direct detection of physical defects such as grain boundaries and point defects, their implementation at the device scale to assess the active defect distribution and their impact on field-induced channel charge modulation and current transport is strictly restrained. Therefore, it becomes critical to directly probe the gate modulation effect on the carrier population at the nanoscale of an FET channel, with the objective to establish a direct correlation with the device characteristics. Here, we have investigated the active channel in a monolayer MoS2 FET through in situ scanning probe microscopy, namely, Kelvin probe force microscopy and scanning capacitance microscopy, to directly identify active defect sites and to improve our understanding of the contribution of grain boundaries, bilayer islands, and defective grain domains to channel conductance.

A comparative study on 2D materials with native high-[formula omitted] oxides for sub-10 nm transistors

Two-dimensional (2D) transition metal dichalcogenides (TMDs) with native high-κ oxides have presented a new avenue towards the development of next-generation ultra-scaled field-effect transistors (FETs). These materials have been experimentally shown to form a natively compatible oxide layer with a high dielectric constant, which can help scale down both the transistor size and the supply voltage. We present a material and device performance study into the use of several of these materials – namely HfS2, HfSe2, ZrS2, ZrSe2 – as channels in sub-10 nm FETs. All four materials exhibit isotropic transport at 10 nm channel length with ON currents over 1000 μA/μm but show anisotropic transport and degraded ON currents at 5 nm channel length. In general, the sulfide family excels in terms of subthreshold characteristics at sub-10 nm channel lengths. HfS2, in particular, surpasses all the other materials in terms of ON currents and subthreshold swing (SS), allowing it to also achieve excellent intrinsic performance. We have identified HfS2 as a superior material within this TMD family for sub-10 nm FETs.

Removing Conjugated Polymers from Aligned Carbon Nanotube Arrays.

Aligned carbon nanotube (A-CNT) with high semiconducting purity and high-density have been considered as one of the most promising active channels for field-effect transistors (FETs), but conjugated polymer dispersant residues on the surface of A-CNT have become the main obstacle for its further development in electronics applications. In this work, a series of removable conjugated polymers (CPs) are designed and synthesized to achieve favorable purification and alignment for CNT arrays with a high density of ≈360 CNTs/µm. Furthermore, a removal process of CPs on the CNT array film is developed. Raman spectra show that the CNTs in array film are almost not damaged after the removal process, and the G/D ratio is as high as 35. The field-effect transistors (FETs) are fabricated with a saturation current density up to 600µAµm-1 and a current on-off ratio of ≈105, even with a relatively long channel length of ≈3µm.

Multilayer WS2 for low-power visible and near-infrared phototransistors

Mechanically exfoliated multilayer WS2 flakes are used as the channel of field effect transistors for low-power photodetection in the visible and near-infrared (NIR) spectral range. The electrical characterization as a function of the temperature reveals devices with n-type conduction and slightly different Schottky barriers at the drain and source contacts. The WS2 phototransistors can be operated in self-powered mode, yielding both a current and a voltage when exposed to light. The spectral photoresponse in the visible and the NIR ranges shows a high responsivity (4.5 μA/W) around 1250 nm, making the devices promising for telecommunication applications.