Channel Organic Thin Film Transistors Research Articles

Organic thin-film transistors with inkjet-printed electrodes on hydrophobic Teflon-AF gate dielectric with reversible surface properties

Printed organic thin-film transistors (OTFTs) are promising for flexible, low-cost electronics; however, a major challenge is that successive processing steps of multiple solution-processed layers can interfere with each other. In particular, hydrophobic fluoropolymers are a promising group of materials to fabricate gate dielectrics with low charge trap density and properties such as good thermal stability, chemical inertness, low dielectric constant, and water repellency. However, the main difficulty in incorporating hydrophobic fluoropolymers in printed electronic devices is their low surface energy. Plasma treatment is a common method for surface modification that renders these hydrophobic layers wettable to print subsequent layers. This plasma processing can also affect the interface with the organic semiconductor (OSC) and transistor performance, which is studied here for the first time. The morphological and surface chemical properties of Teflon amorphous fluoropolymer (Teflon-AF) films change after plasma treatment and gradually reverse after post-annealing of subsequent layers as demonstrated here. Here, we fabricate solution-processed OTFTs with Teflon-AF as the gate dielectric. We report OTFTs with inkjet-printed source and drain electrodes with a minimum channel length of 20 μm on Teflon-AF for the first time. We show that the annealing of the inkjet-printed electrodes changes the morphology and the surface chemistry of the Teflon-AF gate dielectric underneath, thus reversing the effect of the plasma. We show that this electrode post-annealing step can improve the transistor performance by improving the interface between the Teflon-AF gate dielectric and the OSC in terms of smoothness and hydrophobicity. The transistor parameters such as mobility, on/off current ratio, and threshold voltage all follow a trend explained here by the properties of the Teflon-AF films. Increasing the post-annealing temperature to just below complete surface reversibility decreases surface roughness and trap-sites created after plasma treatment leading to optimized device performance. We characterize the Teflon-AF surface with contact angle measurement, roughness measurement, Fourier transform infrared spectroscopy (FTIR), and x-ray photoelectron spectroscopy (XPS). This understanding of the reversibility of the Teflon-AF surface helps achieve optimal performance of devices and systems incorporating fluoropolymers. • The challenge of processing OTFT layers on hydrophobic dielectrics is addressed. • 20 μm channel OTFTs with inkjet-printed electrodes on hydrophobic dielectric are achieved. • Teflon-AF surface changes after plasma and reverses after post-annealing. • Electrode annealing changes the morphology and surface chemistry of the dielectric. • Electrode annealing can improve the gate dielectric/organic semiconductor interface.

Isomeric Acceptor–Acceptor Polymers: Enabling Electron Transport with Strikingly Different Semiconducting Properties in n-Channel Organic Thin-Film Transistors

Isomeric Acceptor–Acceptor Polymers: Enabling Electron Transport with Strikingly Different Semiconducting Properties in <i>n</i>-Channel Organic Thin-Film Transistors

Electrical instability in short channel organic thin-film transistors induced by lucky-polaron mechanism

In this work we study the electrical stability under both gate bias stress and gate and drain bias stress of short channel (L = 5 μm) bottom contact/top gate OTFTs made on flexible substrate with solution-processed organic semiconductor and fluoropolymer gate dielectric. These devices show high field-effect mobility (μ FE > 1 cm 2 V −1 s −1 ) and excellent stability under gate bias stress (bias stress V ds = 0V). However, after prolonged bias stress performed at high drain voltage, V ds , the transfer characteristics show a decreased threshold voltage, degradation of the subthreshold slope and an apparent increase in the field effect mobility. Furthermore, the output characteristics show an asymmetry when measured in forward and reverse mode. These experimental results can be explained considering that the bias stress induces the damage of a small part of the device channel, localized close to the source contact. The analysis of the experimental data through 2D numerical simulations supports this explanation showing that the electrical characteristics after bias stress at high V ds can be reproduced considering the creation of donor-like interface states and trapping of positive charge into the gate dielectric at the source end of the device channel. In order to explain this degradation mechanism, we suggest a new physical model that, assuming holes injection from the source contact into the channel in bounded polarons, envisages the defect creation at the interface near the source end of the channel induced by injection of holes that gained energy from both the high longitudinal electric fields and the polaron dissolution. • Bias stress induced instability in short channel OTFTs is due to small defected channel region at the source contact. • Interface states and charge trapping into the gate dielectric at the source end have been considered in 2D simulations. • A “Lucky-polaron” mechanism well explains the creation of a defected region and carrier injection into the gate dielectric.

Flexible inkjet-printed dual-gate organic thin film transistors and PMOS inverters: Noise margin control by top gate

Low operating voltage dual-gate p-type organic thin film transistors (OTFTs) and PMOS inverters have been fabricated on 125 μm-thick flexible polyethylene naphthalate (PEN) substrates by solution-processed techniques. Inkjet-printed silver electrodes are used for gate, source, and drain contacts while the active organic semiconducting material is printed by a dispenser system over parylene dielectric. Bottom channel, top channel, and dual-gate OTFTs separately display average charge carrier mobilities of 0.03, 0.11, and 0.37 cm 2 V −1 s −1 , respectively. Top-gate is used to independently tune the threshold voltage for bottom-gate OTFT and vice versa. Two PMOS inverters are fabricated with high gain and low supply voltage operation. Ideal symmetric voltage transfer characteristics with high noise margin are achieved by controlling the threshold voltage of the driver OTFT by top-gate bias for low supply voltage, V DD = −2.5 V. • Flexible low voltage dual-gate OTFTs are fabricated by inkjet printing technique. • Dual-gate OTFTs are characterized in bottom-, top-, and dual-gate mode. • V Th of bottom channel OTFT is linearly control by top gate and vice versa. • DLL and ZVLL, PMOS inverters are compared in terms of gain and noise margin. • Ideal PMOS inverters are achieved by controlling V Th of bottom OTFT by top gate.

Direct writing of inkjet-printed short channel organic thin film transistors

Abstract A direct-writing fabrication process for fully inkjet-printed short-channel organic thin-film transistors (OTFTs) has been developed. Channels as narrow as 800 nm between two printed Ag electrodes were achieved by printing a special Ag ink on an SU-8 interlayer, which can be partially dissolved by the solvents used in the Ag ink. The ridge formed along the printed Ag line edges due to redistribution of the interlayer material during the drying process limits the ink spread, and separates neighboring printed lines, and is the key to defining an ultra-narrow channel for transistor fabrication. The short-channel OTFTs fabricated using this technique have demonstrated well-defined linear and saturation regimes. An extracted mobility of 0.27 cm 2 /Vs with an on/off ratio of 10 5 was obtained at a driving voltage of −12 V. The excellent performance of these devices demonstrates the potential of this technique in fabrication of short-channel devices using standard printing technologies.

Fully inkjet-printed short-channel organic thin-film transistors and inverter arrays on flexible substrates

We report fully inkjet-printed organic thin-film transistors (OTFTs) and inverters with an average channel length of 9 μm and minimized overlap capacitance between gate and source/drain (S/D) electrodes on a flexible plastic substrate. Metal-organic precursor-type silver ink, poly(4-vinylphenol), and 6, 13-bis (triisopropylsilylethynyl)pentacene were used to form the gate and S/D electrodes, the gate dielectric, and the active semiconductor layer, respectively. Well-defined S/D electrodes with narrow width and spacing can be realized by introducing a separate printing process and interdigitated structure with a cartridge that can eject a 1 picoliter volume of ink droplets without any assistant surface treatments or structures. Fully inkjet-printed short channel OTFT arrays presenting an average mobility of 0.065 cm2 V−1 s−1 and on/off ratio of 4 × 103 and inverter arrays exhibiting a voltage gain of 5.5 at a VDD of −30 V and good frequency response were demonstrated.

Air-stable solution-processed n-channel organic thin film transistors with polymer-enhanced morphology

N,N′-1H,1H-perfluorobutyl dicyanoperylenecarboxydiimide (PDIF-CN2) is an n-type semiconductor exhibiting high electron mobility and excellent air stability. However, the reported electron mobility based on spin-coated PDIF-CN2 film is much lower than the value of PDIF-CN2 single crystals made from vapor phase deposition, indicating significant room for mobility enhancement. In this study, various insulating polymers, including poly(vinyl alcohol), poly(methyl methacrylate) (PMMA), and poly(alpha-methylstyrene) (PαMS), are pre-coated on silicon substrate aiming to enhance the morphology of the PDIF-CN2 thin film, thereby improving the charge transport and air stability. Atomic force microscopy images reveal that with the pre-deposition of PαMS or PMMA polymers, the morphology of the PDIF-CN2 polycrystalline films is optimized in semiconducting crystal connectivity, domain size, and surface roughness, which leads to significant improvement of organic thin-film transistor (OTFT) performance. Particularly, an electron mobility of up to 0.55 cm2/V s has been achieved from OTFTs based on the PDIF-CN2 film with the pre-deposition of PαMS polymer.

Low density of gap states and unpinned Fermi level inn-channel organic thin-film transistors

Electronic states within the band gap of a semiconductor have a significant influence on the electronic properties and the operational stability of electronic devices, especially in the case of organic semiconductors. Previous work has shown that the gap-state density in organic thin-film transistors (TFTs) is often so large that the Fermi level is pinned deep within the gap. For $p$-channel organic TFTs, we have recently reported that the density of gap states and hence the pinning of the Fermi level can be greatly reduced by optimizing the fabrication process. For $n$-channel organic TFTs, very little is known about the gap density of states and its impact on the performance and stability of the devices. Here, we report measurements of the density and distribution of gap states in $n$-channel TFTs based on two different organic semiconductors. We have found that the gap-state density in both semiconductors is relatively small (\ensuremath{\sim}10${}^{17}$ cm${}^{\ensuremath{-}3}$) and no greater than in $p$-channel organic TFTs fabricated with the same technology and the same gate dielectric. This is a significant finding, since both the performance and the stability of $n$-channel organic TFTs are often greatly inferior to those of $p$-channel organic TFTs. We have also found that the gap-state density increases over time during air exposure and that this increase in gap-state density correlates with the time-dependent, air-induced decrease in electron mobility.

Micro-imprinted prism substrate for self-aligned short channel organic transistors on a flexible substrate

Using a simple micro-imprinting process on flexible substrates, we demonstrate fabrication of self-aligned short channel organic thin film transistors (OTFTs) with significantly reduced parasitic capacitance. The surface topology resulting from the imprinted prism-like structures enables accurate alignment of both the gate and source-drain electrodes. The parasitic overlap capacitance was reduced by 80%, which enables twice higher transition frequency (fT = 10.1 kHz) compared with conventional top-contact OTFT devices. The prism-OTFTs were applied to both p-type (pentacene) and n-type (C60) organic semiconductors to implement low voltage complementary inverters.

Low-cost lithographically patterned source/drain bottom contacts for high mobility p-type organic thin film transistors

ABSTRACTShort channel organic thin film transistors in bottom-gate, bottom contact configuration use typically gold metallization for the source and drain contacts because this metal can easily be cleaned from photoresist residuals by oxygen plasma or ultraviolet-ozone and allows also surface modification by self-assembled monolayers (e.g. thiols). Alternative low-cost bottom contact metallization for high performance short-channel organic thin film transistors are scarce because of the incompatibility of the bottom contact material with the cleaning step. In this work a new process flow, involving a temporary thin aluminum protection layer, is presented. Short channel (3.4 μm) pentacene transistors with lithographical defined and thiol modified silver source/drain bottom contacts (25 nm thick, on a 2 nm titanium adhesion layer) prepared according to this process achieved a saturation mobility of 0.316 cm2/(V.s), and this at a metal cost below 1% of the standard 30 nm thick gold metallization.

Characterization of Short Channel OTFTs Fabricated Using Ink Jet Print and Imprint Process

We fabricated short channel organic thin film transistors on polyethersulphone (PES) substrate using ink jet printing combined with an imprint method. The channel lengths of organic thin film transistors (OTFTs) which were defined by imprinting Ag/PES film were 2.5 um, 3.8 um and 6.4 um, respectively. 6,13-bis(triisopropylsilylethynyl) (TIPS) pentacene and Polyvinyl alcohol (PVA) were used as an active material and as a gate insulator, respectively. The physical properties were obtained using Alpha step, SPM, and SEM. The gate transfer characteristics and drain family curves were measured using Keithley-4200. The field-effect mobility of OTFT was about 0.25 cm2/Vs in the saturation region, and the threshold voltage of OTFT was -2.5 V.

Enhanced Thin-Film Transistor Performance by Combining 13,6-N-Sulfinylacetamidopentacene with Printed PEDOT:PSS Electrodes

Bottom-contact/bottom-gate organic thin-film transistors (OTFTs) are fabricated using a soluble pentacene precursor (13,6-N-sulfinylacetamidopentacene; SAP) and inkjet printed PEDOT:PSS electrodes on bare SiO2 dielectrics. Saturation mobility, Ion/Ioff ratio, and threshold voltage parameters, respectively, of 0.27 cm2 V−1 s−1, 105, and −4.25 V were measured under ambient conditions after the thermal conversion of SAP to pentacene in 100 μm long channel OTFT devices. The results obtained by the above solution approach are comparable to that of vapor-phase grown pentacene-based OTFTs with photolithographic gold contacts and organic buffer layers and/or inorganic injection layers. The present high performance level is ascribed to the morphological continuity and uniformity of the first few layers of the polycrystalline semiconductor phase at the interface with the organic electrodes, which in effect constitute an ideal chemical interface for the converted SAP. In contrast, gold electrodes thermally evaporated by employing shadow masks result in blurred-edge regions, drastically affecting the semiconductor morphology along with the transport properties.

Contact resistance and threshold voltage extraction in n-channel organic thin film transistors on plastic substrates

n -channel organic thin film transistors were fabricated on polyethylene naphthalate substrates. The first part of the paper is devoted to a critical analysis of eight methods to extract the threshold voltage from the transfer characteristic in the linear regime. Next, to improve electron injection and reduce contact resistance, self-assembled monolayers (SAMs) were deposited on the gold source and drain electrodes. The subsequent modification on the current-voltage characteristics of the transistors is analyzed by the transfer line method, using a threshold-voltage-corrected gate voltage. The improved performance of the device obtained with some of the SAM treatments is attributed to both a better morphology of the semiconductor film, resulting in an increased channel mobility, and to easier electron injection, which manifests itself through a lowering of the contact resistance. Interestingly, the modulation of the contact resistance exactly follows an opposite behavior to what reported in the case of p-channel devices, which brings further evidence for that charge injection is tuned by the direction and magnitude of the dipole moment of the SAM.

Variable temperature film and contact resistance measurements on operating n-channel organic thin film transistors

We report structural and electrical properties in thin films of an n-channel organic semiconductor, N,N′-dipentyl-3,4,9,10-perylene tetracarboxylic dimide (PTCDI–C5). The structure of polycrystalline thin films of PTCDI–C5 was studied using x-ray diffraction and atomic force microscopy. Films order with single crystal-like packing, and the direction of π-π overlap is in the substrate plane. Organic thin film transistors (OTFTs) based on PTCDI–C5 were fabricated on hydrophobic and hydrophilic substrates. OTFTs showed effective mobility as high as 0.1 cm2/V s. Contact resistance of operating OTFTs was studied using resistance versus length plots and a four-probe method for three different contact metals (Au, Ag, Ca). Typical OTFTs had a specific contact resistance of 8×104 Ω cm at high gate voltage. There was no dependence of contact resistance with contact metal. Variable temperature measurements revealed that film resistance in the OTFT was activated in the temperature range 100–300 K, with typical activation energies of 60–80 meV. Contact resistance showed similar activated behavior, implying that the Schottky barrier at the contact is not the limiting resistance for the contact. Film resistance data showed a Meyer–Neldel relationship with characteristic energy EMN=20–25 meV, for various samples. The common TFT instability of threshold voltage shift (TVS) was observed in PTCDI–C5 OTFTs. A model is proposed to explain positive TVS in gate bias stress and oxygen exposure experiments. The model is based on the formation of a metastable complex between PTCDI–C5 and oxygen, which creates a deep acceptor-like trap state.

Fabrication of short channel organic thin film transistors by Si-etching method

By using a Si etching and oxidation method, drain and source patterns for organic thin film transistors (OTFTs) have been fabricated without the need of precise mask alignment. OTFTs were fabricated on these patterns by spin coating a layer of Poly [2-methoxy-5-(2′-ethylhexyloxy)-1,4-phenylene vinylene]. From measurement results on devices with different channel lengths down to 0.5 μm, a pronounced short channel effect was observed.

Nanolithography based on patterned metal transfer and its application to organic electronic devices

We demonstrate a patterning method capable of producing features of submicron scale based on the transfer of a metal film from a stamp to a substrate assisted by cold welding. The patterned metal film can be used as an etch mask to replicate the pattern on the substrate, or the film itself can serve as contact electrodes for a wide range of electronic devices. We demonstrate the versatility of the technique by fabricating a polymer grating on SiO2 with lateral dimensions &amp;lt;80 nm and a pattern resolution approaching 10 nm, and by fabricating organic solar cells and pentacene channel organic thin-film transistors with channel lengths as short as 1 μm.