Wide bandgap (WBG) semiconductor devices based on SiC, GaN and Ga2O3 provide advantages for many strategic initiatives in various industrial sectors, such as data centers, electric vehicles, renewable energy systems like solar and wind power inverters. Innovations in WBG technologies would enable new paths on energy efficiency for pushing towards sustainable perspectives. For instance, higher efficiency and lower power dissipation are always desirable for digital economy/society and power electronic applications owing to the energy saving at the end with the goal to reduce CO2 emissions.Here we will emphasize our ongoing WBG semiconductor related research/development and innovation activities, especially on GaN technology owing its rapid/huge demanding in the market nowadays. Thus, the GaN material growth, device processing/packaging and characterization/verification will be elaborated in detail in this talk.In recent years an epitaxy technique to grow large diameter GaN-on-Si wafers by coalesced nanowire has been established at RISE ProNano Lab. The GaN nanowires are epitaxially grown and then merged into a planar epitaxial film with reduced dislocation density as compared to commercially available substrates. It allows for fabrication of thick GaN layers that required for high-voltage vertical devices on Si. A 4.1-µm-thick GaN device layer on a GaN-on-Si template has been grown successfully. It has a threading dislocation density on the order 108 cm-2 and a root mean square roughness of < 0.4 nm. This result has laid the foundation for scaling to the thicker (10-12 µm) crack-free GaN drift layer on lager wafer diameters up to 200 mm.RISE has long term experience working on GaN based High Electron Mobility Transistors (HEMTs). Since 2019 we have worked on high performance and cost-competitive power HEMTs on buffer-free GaN-on-SiC wafers in frame of EU UltimateGaN project. It has focused not only on verification of the high device performance but also on its yield for revealing its competitiveness in the cost-sensitive power electronics market. The fabricated HEMTs demonstrated the expected threshold voltage, good linearity with gate length and width, Ion/Ioff ratio of 1010 as well as high output current up to 16 A with multiple fingers. In such wafer level device fabrication, different types of multi-finger HEMTs could be included with designed electrodes for flip-chip soldering them into package modules. The power module was designed and produced in house by ceramic additive manufacturing (AM), also known as three-dimensional (3D) printing. The package design has aimed to address the stringent thermal and electrical requirements of these types of HEMTs for power electronic applications. Importantly the ceramic AM package design also enables the incorporation of intricate 3D features into the package structure for achieving increased electrical isolation distance between the source and drain contact pads of the HEMT in the package.In addition, SiC and Ga2O3 based sensors/devices will be briefed in this talk, which will provide a glance for design and fabrication of the hybrid WBG components for various greener applications.