Center Tap Research Articles

Real-time measurement of electron temperature using a coupled centre-tapped emissive probe and a Langmuir probe (CCTELP)

Abstract Conventional electrostatic probes are commonly used for measuring the plasma parameters like plasma density, electron temperature, plasma potential and floating potential respectively in a laboratory plasma to unveil physical processes of relevance to magnetosphere and fusion plasmas. With such probes, real-time measurement of electron temperature and its fluctuating AC component becomes very difficult. These measurements are significant as they directly give the measure of energy flux and hence can be utilized in estimating the turbulence-induced energy loss in any plasma system, especially useful for electron temperature gradient plasmas. Although Triple Langmuir Probe (TLP) diagnostics provide information on real-time measurement of electron temperature, this involves many complications. These complications of TLP are suitably overcome by the proposed diagnostic, which makes use of a combination of a closely separated centre tap emissive probe (CTEP) and Langmuir probe (LP) installed on a single probe head. The coupled centre-tapped emissive and Langmuir probe (CCTELP) provides direct measurement of electron temperature (T_e) and its fluctuations (T ̃_e). The design of the proposed diagnostic is very simple and it is almost free of rigorous control electronics and post-data analysis otherwise needed to estimate the electron temperature. These features make this diagnostic an additional and simple candidate for real-time measurement of electron temperature and its fluctuation. The paper will highlight details on this novel diagnostics, called CCTELP for the measurement in Maxwellian plasmas.

A detailed study of the current‐reuse VCO's operation and a simple circuit technique to generate intrinsic‐balanced outputs

SummaryIn the first part of this paper, we closely examine well‐known methods for balancing the output power level of the pseudo‐differential current‐reuse voltage‐controlled oscillator. We scrutinize their effectiveness in terms of canceling output mismatches, insensitivity to process, voltage, and temperature variations, and their capability of not degrading phase noise performance. Through analyses and simulations, it is shown that contrary to common belief, some techniques are not as effective as previously thought and should be employed only under specific circumstances. The best conventional approach is proven to be the use of a common‐mode shunting capacitor at the inductor's center tap node to create a virtual ground. In the second part, it is demonstrated that the current‐reuse voltage‐controlled oscillator can intrinsically produce balanced outputs without using any additional techniques or extra passive or active components. Using single‐ended tank capacitors instead of differential ones, the common‐mode voltage of the outputs is shunted to the real ground. This technique reintroduces a reference voltage to the tank circuit, forcing the oscillator to achieve equilibrium between positive and negative swings. The proposed current‐reuse oscillator is designed and post‐layout simulated in a 65‐nm CMOS process, covering a frequency range of 4.84–6.38 GHz with an average power consumption of 0.65 mW. It produces balanced outputs with an amplitude error of less than ±0.2% and achieves a phase noise of −126.7 dBc/Hz and FoMT of 201.8 dB at a 3‐MHz offset frequency.

A 77 GHz Power Amplifier with 19.1 dBm Peak Output Power in 130 nm SiGe Process.

This article reports a two-stage differential structure power amplifier based on a 130 nm SiGe process operating at 77 GHz. By introducing a tunable capacitor for amplitude and phase balance at the center tap of the secondary coil of the traditional Marchand balun, the balun achieves amplitude imbalance less than 0.5 dB and phase imbalance less than 1 degree within the operating frequency range of 70-85 GHz, which enables the power amplifier to exhibit comparable output power over a wide operating frequency band. The power amplifier, based on a designed 3-bit digital analog convertor (DAC)-controlled base bias current source, exhibits small signal gain fluctuation of less than 5 dB and saturation output power fluctuation of less than 2 dB near the 80 GHz frequency point when the ambient temperature varies in the range of -40 °C to 125 °C. Benefiting from the aforementioned design, the tested single-path differential power amplifier exhibits a small signal gain exceeding 16 dB, a saturation output power exceeding 18 dBm, and a peak saturation output power of 19.1 dBm in the frequency band of 70-85 GHz.

Low threshold DC–AC power converter with optimized standby power consumption

The quest for universal energy access continues to be a major concern globally. Renewable energy technologies such as solar PV are viable options to meet this energy poverty with DC–AC power converters playing a major role in solar PV systems. Current designs of these converters suffer from high standby energy consumption and high input threshold voltage. This paper presents the design and implementation of a single-phase DC–AC power converter with low threshold input voltage and optimized standby power consumption. A multivibrator, pulse width modulation signal generator, MOSFETs, and a multiple secondary winding center tap transformer were used in the system design. The results show an optimized power converter having a low input threshold voltage of 10.5V and power consumption of 9.49W.

Design and implementation of a Central-Tapped Medium Frequency Transformer with nanocrystalline core for high-efficiency DC-DC SAB converters

A design methodology for medium frequency transformers, which considers a central tap in its secondary winding, is thoroughly presented in this paper. Topologies such as SAB (Single-Active Bridge), PSFB (Phase Shift Full Bridge), and DAB (Dual Active Bridge) can be implemented using this type of transformer for nowadays applications. The design and implementation of a Central-Tapped Medium Frequency Transformer (CT-MFT) is carried out and it is tested as part of a SAB topology. Differently to other proposals, the equivalent model of the CT-MFT was thoroughly defined and verified in the simulation and a tailor-made design methodology is presented. As result, the CT-MFT prototype achieve 99.49 % efficiency which demonstrate the usefulness and efficacy of the proposed methodology. The experience gained in developing this advanced design procedure opens the possibility of further improving isolated unidirectional and bidirectional DC-DC converter topologies in aspects such as efficiency and reliability.

A multi-winding transformer-based active cell equalizer with self-driven switches for series-connected lithium-ion batteries and super-capacitors

This work introduces a new multi-winding transformer-based cell equalizer with self-driven switches series-connected energy storage cells. With the equalizer, all series-connected cells can be equalized in both charging and discharging manners, towards the same balance voltage. In order to reduce the conduction loss in balancing process, all switching devices in the new equalizer are implemented by MOSFETs. By introducing a center tap, each secondary winding can be divided into two sub-windings, one of which is used to control the MOSFET switches while another one is used to supply the balancing voltage of cells. Therefore, the proposed cell equalizer can achieve the equalization automatically without any switch driving circuits, voltage sensors and complex control strategies. It greatly simplifies the complexity of the balance circuit and reduces the system cost. The circuit structure can be extended by adding more balancing units to meet the requirements of high voltage. Circuit configuration, operation principle, modeling and design considerations are analyzed in detail. Finally, simulation and experimental results are provided to verify the feasibility of the proposed cell equalizer.

Parallel-Connected Voltage Source Converters With a DC Common Mode and an AC Differential Mode PWM Filter

Two 3-phase converters can be connected in parallel using a range of inductor types. Coupled inductors used together with interleaved pulsewidth modulated (PWM) techniques can produce a high-quality multilevel PWM line output voltage. These inductors can be designed to have a high inductance between the two converter outputs to control circulating currents, combined with a low per-phase output inductance. Since the 3-phase PWM voltage between the two converters consists of two components, a differential mode and common mode, two inductor types can be used to separately filter the circulating currents produced by these two components. The inductor types presented places one coupled inductor between the 3-phase output terminals of the two converters, a <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3-limb CI</i> , and a second coupled inductor located between the two converter dc input terminals, a dc coupled inductor or <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dc choke</i> . The <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3-limb CI</i> filters circulating currents due to the differential mode PWM voltage and the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dc choke</i> filters circulating currents due to the common mode PWM voltage. The <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dc choke</i> uses four windings in contrast to the six required of an equivalent common mode 3-phase ac choke. The two converters are operated with a filter capacitor across their dc input terminals. The 3-phase output of the two parallel converters is located at the center tap of the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3-limb CI</i> windings in each phase and a very low effective per-phase output inductance is obtained. Consequently, the converter structure can supply very high-frequency fundamental output voltages with high-quality multilevel PWM line voltages. The performance of the coupled inductors presented is compared with a conventional coupled inductor and designs show that they can be 13% smaller with 16% lower losses. The parallel converter structure presented is suitable for high-power high-speed electric drives with applications in aerospace and electric vehicles where lightweight magnetics is required. Simulations and experimental results are presented for an 8 kW (300 Vdc, 208 Vac/22A) prototype operating with a fundamental frequency of 60 Hz –1.1 kHz.

A Low-Phase-Noise Quad-Core Millimeter-Wave Fundamental VCO Using Circular Triple-Coupled Transformer in 65-nm CMOS

The minimal achievable phase noise (PN) of millimeter-wave (mm-wave) voltage-controlled oscillators (VCOs) is bounded by the smallest realizable inductor with a reasonable high quality factor ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${Q}$ </tex-math></inline-formula> ). A multi-core VCO reduces the total equivalent inductance of the tank by synchronizing multiple VCO cores, therefore improving the PN performance. This article presents a 60-GHz fundamental VCO based on a mode-rejection circular triple-coupled-transformer tank, which improves the PN performance of the VCO from three aspects. 1) the circular topology improves <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${Q}$ </tex-math></inline-formula> of small inductors in the mm-wave frequency range by alleviating the inner edge deconstructive coupling; 2) compared with the circular inductor topology, the triple-coupled transformer provides the flexibility to suppress the unwanted oscillation mode at the center taps of the gate coils, which enables the NMOS-only VCO configuration to avoid PN degradation due to limited PMOS performance in the mm-wave frequency range; and 3) the triple-coupled transformer boosts the gate-to-source voltage swing of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${G}_{m}$ </tex-math></inline-formula> transistors. The quad-core VCO prototype is designed and fabricated in a 65-nm CMOS process. It achieves a measured PN of –104.7 dBc/Hz at 1-MHz offset and a corresponding figure of merit (FoM) of 186.5 dBc/Hz at 59.1-GHz carrier frequency.

Ku-Band Low Phase Noise VCO Using High-Quality Factor Transformer in 0.18-μm CMOS Technology

This work introduces a low phase-noise (PN) wideband voltage-controlled-oscillator (VCO) by proposing five ports transformer in 0.18- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> CMOS technology. The proposed VCO uses five ports transformer and operates in the low band when all the pMOS–nMOS cross-coupled VCO components are activated, whereas this VCO operates in the high band using only part of the transformer, and an nMOS cross-coupled core. The transformer is designed using the top metal layer (M6) and the first inductor is meander line U-shaped center tap inductor, while the second inductor consists of two shunted octagonal loops to increase the quality ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${Q}$ </tex-math></inline-formula> -) factor compared with using a single-loop inductor. The wideband switched transformer VCO achieves a measured frequency tuning range (FTR) of 16.4–17.1 GHz with a PN of −113.3 dBc/Hz at 1-MHz offset, and from 17 to 17.9 GHz with a PN of −110.3 dBc/Hz at 1-MHz offset in the low and high bands, respectively. The achieved figure-of-merit (FoM) is −189 and −186.4 dBc/Hz in the low and high bands, respectively.

A 300-GHz Low-Noise Amplifier in 130-nm SiGe SG13G3 Technology

This work presents a 300-GHz low-noise amplifier (LNA) in a SiGe:C 130-nm BiCMOS technology, featuring <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$f_{t}/f_{\text {max}}$ </tex-math></inline-formula> of 470/700 GHz. The designed amplifier uses three cascaded stages in a pseudo-differential cascode topology with input and output baluns facilitating single-ended measurements. The first stage is matched trading off noise and gain performance, while a T-type output matching network is used for broadband matching. The interstage matching is performed using center tap transformers. On-wafer measurements show that the designed LNA has a peak small-signal gain of 10.8 dB at 325 GHz, along with a 3-dB bandwidth of 68 GHz and an input 1-dB compression point of −15.6 dBm at 287.5 GHz. The simulated noise figure is better than 12.7 dB over the required band. The circuit occupies 0.26-mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> silicon area and consumes 119 mW from a 3.3-V supply.

Does the central environmental inspection effectively improve air pollution?-An empirical study of 290 prefecture-level cities in China

In order to control air pollution better, China has adopted the central environmental inspection mechanism. This paper adopts the data of 290 prefecture-level cities in China to evaluate the air improvement effect of the central environmental inspection mechanism. Firstly, based on the Mechanism Design Theory and Principal-agent Theory, this paper analyzes the government incentive measures and effort levels under the conditions of information as symmetry and asymmetry. Then, this paper introduces Regression Discontinuity Design (RDD) Model to evaluate the air improvement effect of the central environmental inspection mechanism. Lastly, this paper explores the sustainability of the environmental inspection mechanism through the regression analysis of environmental inspection revisit. The results show that: under the condition of information symmetry, the central government can make the local governments reach the Pareto optimal effort level through the design of incentive contract. In a short period of time, the first round of environmental inspection and environmental inspection revisit have significantly improved air quality, and significantly reduced PM2.5 and PM10 and other major single pollutants. In general, this system has had an immediate effect. The environmental inspection revisit has also significantly reduced the concentrations of AQI, PM2.5 and PM10. Compared with the first round of environmental inspection and environmental inspection revisit, the latter has a higher level of air pollution reduction and better effect. The sustainability of the improvement effect of environmental inspection mechanism is questioned. It is of great significance to evaluate the actual effect of the central environmental inspection system and tap the unique experience of “Chinese style” to explore how to control air pollution and promote green development.

A 42–62 GHz Transformer-Based Broadband mm-Wave InP PA With Second-Harmonic Waveform Engineering and Enhanced Linearity

Indium phosphide (InP) heterojunction bipolar transistors (HBTs) with $f_{t}/f_{\max}$ of 350/675 GHz are studied and explored for a linear, high efficiency and broadband power amplifiers (PAs) at mm-wave frequencies. Unlike the conventional transmission-like-based design, this article presents a compact, broadband transformer-based power combining and impedance matching using the waveform engineering approach. We present, for the first time, mm-wave (40–60 GHz) InP topologies incorporating the following: 1) on-chip transformer for broadband, efficient and compact impedance matching and power combining; 2) synthesis of optimal second-harmonic impedance through transformer center tap to achieve high-efficiency differential PA operation; and 3) biasing techniques to reduce AM–PM distortion for linearity enhancement. This work reports a transformer-based push–pull InP PA in $0.25~\mu \text{m}$ technology across 42–62 GHz demonstrating a peak power added efficiency (PAE) of 39.5% and peak $P_{\text{sat}}$ of 20.6 dBm. The PA supports 4 GHz bandwidth at 52 GHz with an EVM of −22.9 dB and an adjacent channel leakage ratio (ACLR) of −32 dBc for an 8 Gb/s QPSK signal at 13.3 dBm average output power. This work presents one of the highest efficiency with wide bandwidth and highest linearity mm-wave PAs in integrated technology.

A New Bidirectional DC Circuit Breaker With Fault Decision-Making Capability for DC Microgrid

DC circuit breaker (DCCB) plays an important role in dc system protection as an execution unit for disconnecting fault lines. However, due to the nature of dc current, it is a challenge for DCCB to quickly turn off and isolate the fault current. Therefore, a new bidirectional DCCB with decision-making capability based on Z-source topology is proposed in this article, which is able to respond to a fault in a few microseconds. The proposed topology uses only one coupled inductor with a central tap structure in the core part, which improves the utilization ratio of the coupled inductor and reduces the volume and cost of the DCCB. Compared with previous DCCBs, the proposed topology has a simpler structure, fewer windings and components, and smaller volume. In this article, the turn off process of the proposed topology under the line fault condition is analyzed in detail, and the hardware circuit design process is given. The performance of the proposed topology was verified by MATLAB simulation and hardware experiments.

Analysis and Implementation of High-Q CT Inductor for Compact and Wide- Tuning Range Ku-Band VCO

This work presents a new structure of center tap (CT) inductor to improve the performance of Ku-band voltage-controlled oscillators (VCOs). Conventional CT inductor provided by the foundry suffers from a poor-quality (Q-) factor large area and low self-resonance frequency. These problems are solved by introducing a coupling structure. For the proposed CT inductor, despite its size is miniaturized by 51%, the Q-factor is increased by 41% in the frequency range of 5-30 GHz compared to a conventional CT inductor. The measured differential inductance and quality factor of the proposed inductor are 385 pH and 22 at 12 GHz. The proposed CT inductor is used to design a compact and wide-tuning-range VCO at Ku-band in 0.18-μm complementary metal-oxide-semiconductor (CMOS) technology, and this leads to 5.8 dB phase noise improvement compared to the use of a conventional CT inductor. The fabricated VCO has a compact core size of 140 μm × 400 μm only. The VCO chip oscillates from 11.7 to 13.7 GHz. The measured phase noise is -107.7 dBc/Hz at 1-MHz offset frequency at a carrier frequency of 13.7 GHz, and the dc power consumption of the VCO core is 4 mW which results in a figure of merit (FoM) normalized to the die area (FoMA) to be -197 dBc/Hz.

AGA Rapid Recommendations for Gastrointestinal Procedures During the COVID-19 Pandemic

Abbreviations used in this paper AGAAmerican Gastroenterological AssociationCDCCenters for Disease Control and PreventionCIconfidence intervalCOVID-19coronavirus disease 2019GIgastrointestinalGRADEGrading of Recommendations Assessment, Development and EvaluationMERS-CoVMiddle East respiratory syndrome–related coronavirusORodds ratioPAPRpowered air-purifying respiratorPPEpersonal protective equipmentRRrisk ratioSARS-CoV-2severe acute respiratory syndrome coronavirus 2WHOWorld Health Organization

Unified Power Flow Controller Based on Autotransformer Structure

This paper proposes a new unified power flow controller (UPFC) topology. A single phase of them system with the proposed topology consists of an N:2 transformer with a center tap at the low-voltage side and a power converter module comprising full- and half-bridge converters. A three-phase system can be implemented with three devices. While the conventional UPFC topology uses two three-phase transformers, which are called series and parallel transformers, the proposed topology utilizes three single-phase transformers to implement a three-phase UPFC system. By using an autotransformer structure, the power rating of the transformers and the voltage rating of switches in the power converter module can be significantly decreased. As a result, it is possible to reduce the installation spaces and costs compared with the conventional UPFC topology. In addition, by adopting a full- and half-bridge converter structure, the proposed topology can be easily implemented with conventional power devices and control techniques. The techniques used to control the proposed topology are described in this paper. The results obtained from simulations and experiments verify the effectiveness of the proposed UPFC topology.

Second-Harmonic Ripple Voltage Suppression of Integrated Single-Phase Pulsewidth Modulation Rectifier Charging System for EVs

In single-phase ac battery chargers, pulsating power at twice of the line frequency is delivered by the ac source resulting in second-harmonic ripple voltage on the dc-link if additional passive or active filter (AF) circuits are not used. In this article, an inductance-based AF using the leakage inductance of the machine windings along with a current compensation control method is proposed. No additional passive components are required. The machine used in this article has a double-layer winding with a center tap in each phase and the winding structure of the machine is special in that the pulsating magnetomotive force of the whole phase winding can be cancelled when currents flow into the central tap. In this article, the operating principle and control strategy of the AF with the inductive energy storage are analyzed. Finally, a 400-W experimental prototype is developed and the experimental results are used to validate the performance and feasibility of the proposed converter and control strategy.

Three-Level Bidirectional DC–DC Converter With an Auxiliary Inductor in Adaptive Working Mode for Full-Operation Zero-Voltage Switching

This paper proposes a three-level bidirectional dc–dc converter with an auxiliary inductor for full-operation zero-voltage switching (ZVS) in high-output voltage applications. The auxiliary inductor is connected across the middle node of the split flying capacitors and the center tap of the secondary winding in the transformer. In this topology, the outer and inner switches in the three-level stage can generate two independent 50% duty-cycle square waveforms, which are used to control the current in the auxiliary inductor to extend the ZVS from no loads to full loads. Considering the phase-shift angle in three-level stage, the ZVS range of the converter is analyzed, and the modulation trajectory to maintain the full-operation ZVS range with low condition loss is proposed. A flowchart implementation can guarantee the seamless transfer in different working modes. Then, the conduction loss in the proposed converter is compared with the previous three-level bidirectional solution, which illustrates that the conduction loss in the proposed converter only increases in light loads. Finally, the experimental results verify the theoretical analyses and ZVS performance across the whole power and voltage range, and the efficiency curves demonstrate the efficiency improvement.

Hybrid Electromagnetic Unified Power Flow Controller: A Novel Flexible and Effective Approach to Control Power Flow

The commercial application of conventional unified power flow controllers (UPFCs) is rare, because of their high installation and operational costs. Sen proposed the “Sen” transformer (ST) that provides similar power flow control functionality as UPFCs, using only a multiwinding transformer and tap changers. However, the ST has output error and response speed issues, due to the discrete characteristics of tap changers. A novel hybrid electromagnetic unified power flow controller (HEUPFC) is proposed. The HEUPFC is composed of a larger capacity ST and a smaller capacity UPFC. The HEUPFC provides economy, flexibility, high reliability, and continuously variable amplitude and phase angle output. The minimum ratio of the magnitude of the series injected voltage from the UPFC is deduced for several center tap cases. The proposed HEUPFC can control the bulk ST power flow with coarse step changes and precise UPFC control, and precisely control active and reactive power flow. Simulation and experimental results were used to verify the practicability of the HEUPFC.

Applying digital filter to data pages before recording to increase signal-to-noise ratio in holographic memory

The spatial filter in the path of the signal and reconstructed beams and the sampling of reproduced data pages on a camera cause a nonuniform brightness distribution of bright symbols and degrade the signal-to-noise ratio (SNR). We thus applied a digital filter to data pages before recording to improve the reproduced data quality. The simulation results showed that a digital filter with coefficients of the neighboring horizontal and vertical taps from the center tap of −0.10 improved the brightness distribution of bright symbols and increased the SNR of the reproduced data. We experimentally investigated the effect of the digital filter in angle-multiplexed holograms. As a result, the SNR increased and the bit error rate decreased. We found that this method is effective for improving the reproduced data quality.