Cell Processor Research Articles

Extended precision with a rounding mode toward zero environment. Application to the Cell processor

In the field of scientific computing, the exactness of the calculation is of prime importance. That leads to efforts made to increase the precision of the floating point algorithms. One of them is to increase the precision of the floating point number to double or quadruple the working precision. The building block of these efforts is the Error-Free Transformations (EFT). In this paper, we develop EFT operations in truncation rounding mode optimised for the Cell processor. They have been implemented and used in double precision library using only single precision numbers. We compare the performance of our library with the native one in double precision on vectors operations. In the best case, the performance of our library is very closed to the standard double precision implementation. The work could be easily extended to obtain quadruple precision.

Purification Method Using Iodixanol (OptiPrep)-Based Density Gradient Significantly Reduces Cytokine Chemokine Production From Human Islet Preparations, Leading to Prolonged β-Cell Survival During Pretransplantation Culture

Purification is one of the most important steps in human islet isolation. Although Ficoll-based density gradients are widely used, OptiPrep-based density gradients are used in few centers. Cytokine/chemokine production from human islet preparations varies widely. Some cytokines/chemokines have been reported to have adverse effects on human islet preparations. Control of cytokine/chemokine production may be a key to improve islet quality and quantity, leading to better transplantation outcomes. The aim of the present study was to investigate the effects on islet preparations of purification methods using various density gradients on viability, cellular composition, and proinflammatory cytokine/chemokine production. After the digestion phase, the extracts were divided into 2 groups for purification using a semiautomated cell processor with Ficoll-based or OptiPrep-based density gradients. Islet preparations cultured for 2 days were assessed regarding islet cell viability (fluorescein diacetate/propidium iodide [FDA/PI]), fractional β-cell viability by FACS, and β-cell content using iCys. Cytokine/chemokine production from islet preparations was also measured by Bio-plex. After purification, the purity, islet equivalents (IEQ), and islet recovery rates were comparable between the 2 groups. Although FDA/PI and fractional β-cell viability showed no significant difference, survival of β cells during culture was significantly higher in the OptiPrep compared with the Ficoll-based density gradient group. There were significantly lower tumor necrosis factor (TNF)-α, interleukin (IL)-1β, interferon (IFN)-γ, IL-6, and MIP-1β productions from the OptiPrep-based density gradient group. OptiPrep-based density gradients reduced cytokine/chemokine production by islet preparations. In addition, OptiPrep-based density gradient purification significantly reduced the loss of β-cell mass during pretransplantation culture.

Implementation of Scientific Computing Applications on the Cell Broadband Engine

The Cell Broadband Engine architecture is a revolutionary processor architecture well suited for many scientific codes. This paper reports on an effort to implement several traditional high-performance scientific computing applications on the Cell Broadband Engine processor, including molecular dynamics, quantum chromodynamics and quantum chemistry codes. The paper discusses data and code restructuring strategies necessary to adapt the applications to the intrinsic properties of the Cell processor and demonstrates performance improvements achieved on the Cell architecture. It concludes with the lessons learned and provides practical recommendations on optimization techniques that are believed to be most appropriate.

An Efficient Software-Managed Cache Based on Cell Broadband Engine Architecture

While the CBEA (Cell Broadband Engine Architecture) offers substantial computational power, its explicit multilevel memory hierarchy poses significant challenges to traditional programming, especially in performance and programmability. Software-managed cache is a technique that attempts to address such issues. But there still remain some limitations in current software-managed cache technologies. First, a complex managing logic of the full implementation of the software-managed cache which is not suitable for SPU designed as a vector computational unit influences computation significantly. Second, the external managing code of the software-managed cache causes the amount of computing code explosion. Besides increasing the computing burden of the accelerator, the external code occupies precious room of local storage which is shared by computing code and data. Finally, its inconvenient user interface presents significant obstacles for it to be widely applied. Based on the locality of memory access, this paper proposes an efficient software-managed cache named ECellS cache. In the paper, several customized library interfaces were designed respectively to simplify the cache implementation and reduce cache code size. On the other hand, the code segment of the application which accesses data residing in main memory frequently is defined as a cache section. Several of these types of cache sections could be combined into a “cache bind” and be managed in parallel by using SIMD technology. By this type of coarse-grain managing method and additional simplifying the construction of software cache, ECellS cache reduces both the burden of SPU to manage the cache buffer and the size of the cache managing code. Finally, based on local address remapping technology, a more convenient programming interface which is similar to OpenMP directive is presented to facilitate programming. By this technology, requesting for data residing in the main memory will be automatically mapped to cache buffer in local storage of SPE, and there needs to be no extra modifying for the computing source code inside the cache section except for inserting the directive outside of it. Experimental results of this paper based on the Cell processor demonstrate that our proposed software-managed cache improves performance by 15-35% over the CBE SDK software-managed cache in most test cases. With ECellS cache it could be more convenient for the user to develop and port applications based on CBE architecture.

Accuracy of the lattice-Boltzmann method using the Cell processor

Accelerator processors like the new Cell processor are extending the traditional platforms for scientific computation, allowing orders of magnitude more floating-point operations per second (flops) compared to standard central processing units. However, they currently lack double-precision support and support for some IEEE 754 capabilities. In this work, we develop a lattice-Boltzmann (LB) code to run on the Cell processor and test the accuracy of this lattice method on this platform. We run tests for different flow topologies, boundary conditions, and Reynolds numbers in the range Re=6-350 . In one case, simulation results show a reduced mass and momentum conservation compared to an equivalent double-precision LB implementation. All other cases demonstrate the utility of the Cell processor for fluid dynamics simulations. Benchmarks on two Cell-based platforms are performed, the Sony Playstation3 and the QS20/QS21 IBM blade, obtaining a speed-up factor of 7 and 21, respectively, compared to the original PC version of the code, and a conservative sustained performance of 28 gigaflops per single Cell processor. Our results suggest that choice of IEEE 754 rounding mode is possibly as important as double-precision support for this specific scientific application.

Moving Scientific Codes to Multicore Microprocessor CPUs

The IBM Cell processor represents the first and most extreme of a new generation of multicore CPUs. For scientific codes that can be formulated in terms of vector computing concepts, as far as we know, the Cell is the most rewarding. In this article, we present a method for implementing numerical algorithms for scientific computing so that they run efficiently on the Cell processor and other multicore CPUs. We present our method using the piecewise-parabolic method (PPM) gas dynamics algorithm but believe that many other algorithms could benefit from our approach. Nevertheless, the code transformations are difficult to perform manually, so we are undertaking an effort to build simplified tools to assist in at least the most tedious of the code transformations involved.

From Cells to Cell Processors: The Integration of Health and Video Games

Healthcare offers special opportunities for the application of game research and technology. This was evident in the presentations at the 2007 Games for Health Conference.

CellJoin: a parallel stream join operator for the cell processor

Low-latency and high-throughput processing are key requirements of data stream management systems (DSMSs). Hence, multi-core processors that provide high aggregate processing capacity are ideal matches for executing costly DSMS operators. The recently developed Cell processor is a good example of a heterogeneous multi-core architecture and provides a powerful platform for executing data stream operators with high-performance. On the down side, exploiting the full potential of a multi-core processor like Cell is often challenging, mainly due to the heterogeneous nature of the processing elements, the software managed local memory at the co-processor side, and the unconventional programming model in general. In this paper, we study the problem of scalable execution of windowed stream join operators on multi-core processors, and specifically on the Cell processor. By examining various aspects of join execution flow, we determine the right set of techniques to apply in order to minimize the sequential segments and maximize parallelism. Concretely, we show that basic windows coupled with low-overhead pointer-shifting techniques can be used to achieve efficient join window partitioning, column-oriented join window organization can be used to minimize scattered data transfers, delay-optimized double buffering can be used for effective pipelining, rate-aware batching can be used to balance join throughput and tuple delay, and finally single-instruction multiple-data (SIMD) optimized operator code can be used to exploit data parallelism. Our experimental results show that, following the design guidelines and implementation techniques outlined in this paper, windowed stream joins can achieve high scalability (linear in the number of co-processors) by making efficient use of the extensive hardware parallelism provided by the Cell processor (reaching data processing rates of ?13 GB/s) and significantly surpass the performance obtained form conventional high-end processors (supporting a combined input stream rate of 2,000 tuples/s using 15 min windows and without dropping any tuples, resulting in ?8.3 times higher output rate compared to an SSE implementation on dual 3.2 GHz Intel Xeon).

The impact of accelerator processors for high-throughput molecular modeling and simulation

The recent introduction of cost-effective accelerator processors (APs), such as the IBM Cell processor and Nvidia's graphics processing units (GPUs), represents an important technological innovation which promises to unleash the full potential of atomistic molecular modeling and simulation for the biotechnology industry. Present APs can deliver over an order of magnitude more floating-point operations per second (flops) than standard processors, broadly equivalent to a decade of Moore's law growth, and significantly reduce the cost of current atom-based molecular simulations. In conjunction with distributed and grid-computing solutions, accelerated molecular simulations may finally be used to extend current in silico protocols by the use of accurate thermodynamic calculations instead of approximate methods and simulate hundreds of protein-ligand complexes with full molecular specificity, a crucial requirement of in silico drug discovery workflows.

Solving Systems of Linear Equations on the CELL Processor Using Cholesky Factorization

The Sony/Toshiba/IBM (STI) CELL processor introduces pioneering solutions in processor architecture. At the same time it presents new challenges for the development of numerical algorithms. One is effective exploitation of the differential between the speed of single and double precision arithmetic; the other is efficient parallelization between the short vector SIMD cores. The first challenge is addressed by utilizing the well known technique of iterative refinement for the solution of a dense symmetric positive definite system of linear equations, resulting in a mixed-precision algorithm, which delivers double precision accuracy, while performing the bulk of the work in single precision. The main contribution of this paper lies in addressing the second challenge by successful thread-level parallelization, exploiting fine-grained task granularity and a lightweight decentralized synchronization. The implementation of the computationally intensive sections gets within 90 percent of peak floating point performance, while the implementation of the memory intensive sections reaches within 90 percent of peak memory bandwidth. On a single CELL processor, the algorithm achieves over 170~Gflop/s when solving a symmetric positive definite system of linear equation in single precision and over 150~Gflop/s when delivering the result in double precision accuracy.

The clinical use of enriched bone marrow stem cells combined with porous beta-tricalcium phosphate in posterior spinal fusion

Cytotherapy for bone regeneration has not been widely used clinically. A new method based on enriched bone-marrow-derived mesenchymal stem cells (MSCs) combined with porous beta-tricalcium phosphate (β-TCP) was used for posterior spinal fusion in 41 patients. The aim of the present study was to assess the clinical feasibility of peri-operative bone marrow stem cell enrichment and their combination with tricalcium phosphate. About 252 ml marrow per patient was harvested from bilateral iliac crest, the enriched MSCs were produced by a cell processor peri-operatively, then combined with porous β-TCP granules by a negative pressure and a short-time incubation in the meantime of conventional operation, which were finally implanted back into the patient. About 45 ml enriched MSC suspension was collected, and 78 ± 16% of MSCs were recovered. By enrichment technique, the number of colony-forming units which expressed alkaline phosphatase (CFUs-ALP+, to estimate the prevalence of MSCs) was increased 4.3 times; the increasing folds of bone marrow nucleated cells (NCs) and MSCs had a positive correlation. The natural log (ln) of MSC number declined with age, and also, the MSC number of younger subjects (≤40 years) was more than that of older ones (>40 years), but none for NCs. The number of NCs and MSCs was not different significantly between men and women. However, the patients with thoracolumbar fracture (TLF) had significantly more MSCs than those with degenerative disc disease (DDD), but not for NCs. On the other hand, enriched MSCs could adhere to the wall of porous β-TCP within 2 h combination, and proliferate well during culture in vitro. After 34.5 months, 95.1% cases had good spinal fusion results. None of the samples before grafting was positive in bacterial culture. Only four patients had a little exudation or moderate swelling in their wounds, and recovered with conservative treatment.

Accelerating molecular dynamic simulation on the cell processor and Playstation 3

Implementation of molecular dynamics (MD) calculations on novel architectures will vastly increase its power to calculate the physical properties of complex systems. Herein, we detail algorithmic advances developed to accelerate MD simulations on the Cell processor, a commodity processor found in PlayStation 3 (PS3). In particular, we discuss issues regarding memory access versus computation and the types of calculations which are best suited for streaming processors such as the Cell, focusing on implicit solvation models. We conclude with a comparison of improved performance on the PS3's Cell processor over more traditional processors.

Performance of a Lattice Quantum Chromodynamics kernel on the Cell processor

The implementation of a proof-of-concept Lattice Quantum Chromodynamics kernel on the Cell processor is described in detail, illustrating issues encountered in the porting process. The resulting code performs up to 45 GFlop/s per socket (without inter-node parallel communications), indicating that the Cell processor is likely to be a good platform for future Lattice QCD calculations.

Supporting OpenMP on cell

The Cell processor is a heterogeneous multi-core processor with one power processing engine (PPE) core and eight synergistic processing engine (SPE) cores. There is a significant amount of ongoing ...

A lightweight streaming layer for multicore execution

As multicore architectures gain widespread use, it becomes increasingly important to be able to harness their additional processing power to achieve higher performance. However, exploiting parallel cores to improve single-program performance is difficult from a programmer's perspective because most existing programming languages dictate a sequential method of execution. Stream programming, which organizes programs by independent filters communicating over explicit data channels, exposes useful types of parallelism that can be exploited. However, there is still the burden of mapping high-level stream programs to specific multicore architectures. The complexities of each architecture's underlying details makes it difficult to schedule the execution of a stream program with high performance. In this paper, we present the specifications for an intermediate layer between the stream program and the target architecture. This multicore streaming layer (MSL) provides a common level of abstraction that facilitates efficient execution of stream programs by making it easier for compilers to manage computation, and by providing automatic orchestration and optimization of communication when appropriate. We implemented a framework for one such instance of the MSL targeted to the Cell processor and the StreamIt language and achieved greater than 88% utilization on all benchmarks with relatively small amounts of code. The framework can also be applied to other architectures and stream programming languages to enhance generality and portability.

Nebelung: Execution Environment for Transactional OpenMP

The Cell processor is a heterogeneous multi-core processor with one power processing engine (PPE) core and eight synergistic processing engine (SPE) cores. There is a significant amount of ongoing research in programming models and tools that attempts to make it easy to exploit the computation power of the Cell architecture. In our work, we explore supporting OpenMP on the Cell processor. It is attractive to support OpenMP because programmers can continue using their familiar programming model, and existing code can be re-used. We base our work on IBM's XL compiler, and developed new components in the XL compiler and a new runtime library. Three major issues are addressed: (1) synchronization support on heterogeneous cores; (2) code generation targeting the different instruction sets; (3) data transfers and implement the OpenMP memory model. We present experimental results for some SPEC OMP 2001 and NAS benchmarks to demonstrate the effectiveness of this approach. A visualization tool based on Paraver is also used to provide some insights into actual thread and synchronization behaviors.

Recent Developments in Multi-Core Computing Systems

The improvement of processor performance by increasing the clock rate has reached its technological limits. As a result, new processor generations rely on multiple processor cores on a chip in order to increase performance, while mitigating problems like energy consumption, heat dissipation and design complexity. We are now witnessing the emergence of multi-core processors in all markets from laptops and game consoles to servers and supercomputers. However, exploiting the full potential of multi-core computing systems for application programs is a highly complex task posing many open research questions. The 2008 International Workshop on Multi-Core Computing Systems (MuCoCoS'08) was organized in Barcelona, Spain, March 7th. In total 20 papers were submitted to MuCoCoS'08, of which 10 papers were selected by the program committee for presentation. Each paper was thoroughly evaluated by members of the program committee based on the significance to the CFP, originality, and contribution to theory/practice. From the 10 papers presented at MuCoCoS'08 we have selected six papers for this special issue. The selected papers address a representative set of issues related to the recent developments in multi-core computing systems. In the first paper - An Asynchronous API for Numerical Linear Algebra by A. R. Brodtkorb - an approach for general purpose computation on Graphics Processing Units (GPUs) using MATLAB is described. The applicability of the approach is demonstrated for several linear algebra algorithms. The second paper - On the Potential of NoC Virtualization for Multicore Chips by J. Flich, S. Rodrigo, J. Duato, T. Sodring, A. G. Solheim, T. Skeie and O.Lysne - is a position paper that provides arguments in favor of Network-on-a-Chip (NoC) virtualization. It is argued that NoC virtualization, associated with topology agnostic routing, minimizes fragmentation, provides performance isolation, facilitates cache coherency, helps dealing with manufacturing defects, and makes it easy to turn off unused cores for energy saving. These arguments are supported by a series of simulation results. In the third paper - Single-pass List Partitioning by L. Frias, J. Singler and P. Sanders - a new algorithm to partition a list into pieces is described, which is potentially useful for parallelizing problems on multi-core processors. The approach described in this paper requires a single pass over the list using sub-linear storage to perform the partitioning, while previous approaches require two passes. Authors evaluate their approach empirically using an AMD Opteron based system. The fourth paper - Efficient Implementation of WiMAX Physical Layer on Multi-core Architectures with Dynamically Reconfigurable Processors by W. Han, Y. Yi, M. Muir, I. Nousias, T. Arslan and A. T. Edorgan - proposes the use of dynamically reconfigurable processors for wireless applications. A simulator for multi-core systems is used for the evaluation of the proposed approach. In the fifth paper - Latency Impact on Spin-lock Algorithms for Modern Shared Memory Multiprocessors by J. C. Meyer and A. C. Elster - an empirical evaluation of spin-lock algorithms on IBM System p575+ and SGI Origin 3800 computing systems is presented. The last paper - Parallel Advanced Video Coding: Motion Estimation on Multi-cores by S. Momcilovic and L. Sousa - presents a motion estimation technique for multimedia processing, and its parallelization on the Cell Broadband Engine processor. The authors report very good performance in terms of frame rate on the Cell processor. The paper presents details on work partitioning among the PPU and SPE's that may be applicable to other applications on Cell. We are grateful to all authors for submitting their papers to MuCoCoS'08, to program committee members for their efforts to evaluate papers within a short period, and to David A. Bader for delivering the keynote speech. Furthermore, we would like to acknowledge the support of Marcin Paprzycki (SCPE editor-in-chief) and Alexander Denisjuk (SCPE technical and managing editor). Special Issue Editors, Sabri Pllana and Siegfried Benkner.

Fast SIMDized Kalman filter based track fit

Modern high energy physics experiments have to process terabytes of input data produced in particle collisions. The core of many data reconstruction algorithms in high energy physics is the Kalman filter. Therefore, the speed of Kalman filter based algorithms is of crucial importance in on-line data processing. This is especially true for the combinatorial track finding stage where the Kalman filter based track fit is used very intensively. Therefore, developing fast reconstruction algorithms, which use maximum available power of processors, is important, in particular for the initial selection of events which carry signals of interesting physics. One of such powerful feature supported by almost all up-to-date PC processors is a SIMD instruction set, which allows packing several data items in one register and to operate on all of them, thus achieving more operations per clock cycle. The novel Cell processor extends the parallelization further by combining a general-purpose PowerPC processor core with eight streamlined coprocessing elements which greatly accelerate vector processing applications. In the investigation described here, after a significant memory optimization and a comprehensive numerical analysis, the Kalman filter based track fitting algorithm of the CBM experiment has been vectorized using inline operator overloading. Thus the algorithm continues to be flexible with respect to any CPU family used for data reconstruction. Because of all these changes the SIMDized Kalman filter based track fitting algorithm takes 1 μs per track that is 10000 times faster than the initial version. Porting the algorithm to a Cell Blade computer gives another factor of 10 of the speedup. Finally, we compare performance of the tracking algorithm running on three different CPU architectures: Intel Xeon, AMD Opteron and Cell Broadband Engine.

Stable advection‐reaction‐diffusion with arbitrary anisotropy

AbstractTuring first theorized that many biological patterns arise through the processes of reaction and diffusion. Subsequently, reaction‐diffusion systems have been studied in many fields, including computer graphics. We first show that for visual simulation purposes, reaction‐diffusion equations can be made unconditionally stable using a variety of straightforward methods. Second, we propose an anisotropy embedding that significantly expands the space of possible patterns that can be generated. Third, we show that by adding an advection term, the simulation can be coupled to a fluid simulation to produce visually appealing flows. Fourth, we couple fast marching methods to our anisotropy embedding to create a painting interface to the simulation. Unconditional stability is maintained throughout, and our system runs at interactive rates. Finally, we show that on the Cell processor, it is possible to implement reaction‐diffusion on top of an existing fluid solver with no significant performance impact. Copyright © 2007 John Wiley & Sons, Ltd.

A Closed System for Islet Isolation and Purification Using the COBE2991 Cell Processor May Reduce the Need of Clean Room Facilities

During the isolation of human islets of Langerhans the digest has repeated direct contact with the ambient atmosphere. In order to fulfill GMP requirements in clinical applications, the entire cell preparation must be performed in clean room facilities. We hypothesized that the use of a closed system, which avoids the direct exposure of tissue to the atmosphere, would significantly ease the preparation procedure. To avoid the direct atmosphere exposure we tested a modification of the isolation and purification process by performing all islet preparation steps in a closed system. In this study we compared the isolation outcome of the traditional open preparation technique with the new closed system. Pancreata from 6-month-old hybrid pigs were procured in the local slaughterhouse. After digestion/filtration the digest was cooled, collected, and concentrated in centrifugation containers and purified thereafter in the COBE2991 by top loading (control). In the control group 502 +/- 253 IEQ per gram pancreas were purified. The total preparation time amounted to 12 h. In the closed system the digest was cooled and directly pumped into the COBE2991 for centrifugation followed by supernatant expelling. Bag filling, centrifugation, and expelling were repeated several times. Islets in pellet form were then purified by adding a gradient (bottom loading). Using this closed system 1098 +/- 489 IEQ per gram pancreas were purified with a total cell viability of 67 +/- 10% and a beta-cell viability of 41 +/- 13%. The total preparation time reduced to 6 h. After 24 h of cell culture the viability of beta-cells was still 56 +/- 10% and was only reduced after the addition of proapoptotic IL-1 and TNF-alpha to 40 +/- 4%, indicating that freshly isolated islets are not apoptotic. In conclusion, the closed system preparation is much faster, more effective, and less expensive than the traditional islet preparation. The closed system may be applicable for human islets preparations to restrict the need of clean room facilities for islet preparations to a minimum and may open the way for islet preparations without clean room demand.