Cascaded H-bridge Research Articles

Sensorless Capacitor Voltage Detection Method of Cascaded H-Bridge STATCOM Based on Special Switching Mode Identification

The cascaded H-bridge (CHB) static synchronous compensator (STATCOM) has been widely used in wind farm and conflux station. As the grid-connected voltage increases, the number of cascaded CHB proportionately increases. In order to achieve the capacitor voltage balance, it is necessary to independently detect the capacitor voltage of all H-bridge cells, which raises the cost of capacitor voltage detection. To solve this problem, the mapping relationship is studied between the converter output voltage and capacitor voltages by analyzing carrier phase-shifted sinusoidal pulse width modulation technique (CPS-SPWM), and special switching mode is firstly found. Based on the above finding, without changing the conventional CHB topology, an improved sensorless detection method is proposed to solve the problems of detection error, large computation burden and the application limitation in existing sensorless detection methods. Compared with conventional sensor detection, this method not only saves DC voltage sensors and data transmission channels but also suppress the third harmonics in the converter current. Finally, the effectiveness of the detection method applied on CHB STATCOM is proved by simulation and experiment.

Reduced switch cascaded asymmetrical 27 level inverter-STATCOMwith fuzzy logic controller

<p>In this study, a 27-levelinverter with a reduced switch asymmetrical cascaded H-bridge (CHB) with fuzzy logic controller (FLC) is proposed. With series connections, a low voltage converter, a middle level voltage converter, and a high voltage converter make up the static synchronous compensator (STATCOM). The configuration of the asymmetrical inverter uses trinary DCsources. To acquire switching signals for the trinary inverter-based STATCOM to compensate for real power, load voltage, reactive power, load current, and power factor under load changing conditions, FLC is constructed. With fewer switches, the suggested arrangement produces greater voltage levels. The performance of the reduced switch asymmetrical cascaded H-bridge inverter-STATCOM with FLCis simulated using the MATLAB Simulink platform under both static and dynamic load conditions. When compared to reduced switch asymmetrical cascaded H-bridge inverter-STATCOM with traditional proportional integral (PI) controller, the FLC result demonstrates efficient unbalanced load compensation. The FLC in the proposed inverter also lowers the total harmonic distortion.</p>

Simulation design and analysis 9-level H-bridge single phase stepdown cyclo inverter

This DC-to-AC voltage converter is designed for output frequency controlled by a 9-level cascade H-bridge cyclo inverter with pulse width adjustment. The aim of the study was to determine the pattern and format of the voltage, output frequency, and Total Harmonic Distortion index of a 9-level IGBT cyclo inverter. The method used is to build a unidirectional power converter design modeling into 9 alternating levels with cyclo converter-controlled frequency settings using the Simulink MATLAB tool. The cyclo converter section is constructed with two P and N converters in a parallel arrangement. The frequency and trigger pulse width of both converters control the output voltage and frequency format of the cyclo inverter. The test results show a series of ladder waves with an output frequency, of (1/2f, 1/3f, 1/4f, 1/5f, 1/6f, 1/7f, 1/8f, 1/9f, and 1/10f). The simulation results show that the nth input frequency divider waveform is characterized by the emergence of a number of step pulses of n positive half cycles and negative half cycles. The Total Harmonic Distortion Index gets bigger when the system circuit is designed at a low frequency. This modeling can be implemented into a prototype that is used for variable-speed DC motor drivers.

A Coordinated Control Technique for a Faulty Cascaded H-Bridge STATCOM Under Unbalanced Grid Conditions

A Coordinated Control Technique for a Faulty Cascaded H-Bridge STATCOM Under Unbalanced Grid Conditions

A Symmetric Multi-Level Cascaded H-Bridge Inverter for Renewable Energy Integration

The advanced multi-level cascaded H-Bridge inverter system described in this paper is novel and intended for effective integration of renewable energy sources. Phase-displacement pulse width modulation (PD-PWM) control has been employed in the proposed five-level topology to produce output voltage with better quality. The system incorporates proficient filtering methods with a low total harmonic distortion (THD) desired outcome. With a stable output of 230 V at 50 Hz and a 2.3 kW capacity, the inverter system has been satisfied the exacting IEEE 519 standards for power quality. The MATLAB/Simulink is implemented to simulate and model the entire system, exhibiting its superior performance in terms of harmonic reduction and grid compliance. The innovative design offers a dependable respond to for integrating renewable energy, ensuring smooth and high-quality power injection into the grid.

An Optimal Strategy for Submodule Capacitance Sizing of Cascaded H-Bridge-Based Active Power Filter

This paper presents capacitor dimensioning to increase a system’s power density while the converter performance for the delta-connected cascaded H-bridge (CHB) active power filter (APF) is not impaired. After comparing aluminum electrolytic capacitors with film capacitors, this paper proposes capacitance design requirements for film capacitors. With the help of trigonometric transformation for periodic time-varying variables, including capacitor voltages and branch voltages, the capacitance design requirements can be represented as positive univariate polynomials, the coefficients of which are with regard to the capacitance value. The optimization solver SeDuMi is then applied to determine whether a capacitance value is feasible by checking the positiveness of the polynomials. This research has very appealing theoretical and practical properties: the time-domain analysis capability for periodic variables is improved, therefore, enabling a fast computation and a broad application. Both the simulations and experimental results validate the proposed strategy. Compared with the previous work, the proposed method can result in a lower capacitance value without degrading the performance, which is beneficial for a low-cost and low-volume system.

A seven level fault tolerant hybrid cascaded inverter for renewable energy applications

Abstract The cascaded H-bridge (CHB) inverters are the prominent inverters used for renewable energy applications. Fault-tolerant operation is one of the foremost concerns to safeguard the continuous operation of the system under a fault on semiconductor switches and DC power supplies. A novel hybrid CHB inverter is proposed by adding a seven-level boost SLB module in cascade with the H-bridge modules. The proposed topology ensures the reliable and dynamic operation of the inverter during the occurrence of a fault. In addition to the fault-tolerant capability of the SLB inverter, the proposed design provides the voltage boosting and self-balancing of the switched capacitors. Extensive simulation results at different operating conditions substantiate the concept of the proposed novel fault-tolerant inverter structure. The prototype system is developed in the laboratory and the experimental results validate the proposed system configuration.

A model-based power switch fault diagnosis strategy for cascaded H-Bridge converter

Cascaded H-Bridge (CHB) converter is a promising solution in medium-voltage high-power application, such as railway traction, grid-connected photovoltaic (PV) system. However, the large number of power switches involved in the topology is a potential reliability risk since the power switch is the most vulnerable component in a power electronic system. To achieve a fast and accurate power switch fault diagnosis (FD) in CHB, this paper proposes a model-based hierarchical FD strategy, consisting of phase-level and cell-level fault detection. There is no need of extra sensors or high computational burden. The effectiveness of the method is verified by simulation and experiment.

Dual-Layer Modulated Model Predictive Control Scheme for the Cascaded H-Bridge Converter

To simultaneously achieve fast dynamics and fixed switching frequency, a dual-layer modulated model predictive control scheme is proposed for the cascaded H-bridge (CHB) converter in this article. For the output current control layer, firstly, each phase cluster is considered as a whole, and only six nonzero vectors are evaluated for output current prediction. Then, two optimal vectors are selected, and their dwell times are calculated based on the current prediction results. As a result, fast output current dynamics can be obtained with a greatly reduced number of evaluated control options. For the cluster voltage balancing control layer, instead of fundamental-frequency zero-sequence voltage (ZSV), the adaptive ZSV is injected according to the predicted cluster voltage differences. As a result, the active power flows are adjusted in each control period, and the cluster voltage balancing speed can be significantly improved. By the proposed scheme, complicated weight factor design is avoided, and fixed switching frequency is obtained through the integration of pulsewidth modulation. Experimental results verify that the proposed scheme can achieve fast output current and cluster voltage balancing dynamics with fixed switching frequency.

Virtual Inertia Control for CHB-STATCOM in a Power Electronics Dominated Grid

Integration of renewable energy sources (RESs) leads the power system to be a low inertia system, resulting in frequency deviation in the grid. This paper presents a cascaded H-bridge (CHB) converter-based static synchronous compensator (STATCOM) providing virtual synchronous inertial support. This topology achieves two functionalities. 1. It reduces the system frequency deviation in a power electronics dominated grid (PEDG) following the updated grid codes. 2. Without disturbing the normal operation of CHB-STATCOM, it provides reactive power support. This topology uses the cumulative stored energy in the distributed DC-bus capacitors of CHB-STATCOM to improve the frequency nadir/zenith and the rate of change of frequency (RoCoF), preventing frequency instability. A closed- loop control algorithm is developed, which injects an adequate amount of stored energy to prevent frequency variation. It also facilitates re-energizing the capacitors in a smooth fashion, so that subsequent frequency events can be taken care of. For this, a high-pass-filter (HPF) is designed for autonomous DC- link voltage restoration for CHB converter. Relationship between frequency variation and inertial energy support by CHB is analyzed in depth. Finally, the viability of the proposed theory is verified in OPAL-RT test bench for step-up and step-down load change.

A Cascaded Modular Isolated Back-to-Back Solid State Transformer Scheme for AC/DC/AC Interconnection With Improved Performance and Simple Control

This paper proposes a cascaded modular isolated back-to-back solid-state transformer (CMIB-SST) for electrical isolated interconnection of two distribution AC grids, which consists of modular multilevel converter (MMC)-stage, cascaded H bridge (CHB)-stage, and six-terminal active bridge (STAB)-stage. A switching synchronization hybrid phase-shift modulation (SSHPSM) for the STAB-stage is utilized to suppress the low-frequency voltage ripple of submodule (SM) both in CHB-stage and MMC-stage to reduce the SM capacitance significantly with a simple control scheme of the CMIB-SST. The proposed CMIB-SST is friendly to the cost under the new capacitance constraint, and the big size electrolytic capacitor could be replaced by film capacitor, which is beneficial to security and life of the SST module. The voltage gain, mathematical model of the proposed SST is analyzed to illustrate the principle of SM low-frequency ripple-current decoupling with the SM capacitor and cancellation mechanism in STAB-stage. The corresponding transformer design are carried out under considering the parasitic leakage inductance value and the constraints of its magnetic fields, thermal, electric field strength and insulation. The scheme is evaluated by cost and volume of switches, SM capacitors and magnetic unit. Finally, the processed topology and SSHPSM method are verified by simulation and experimental results.

Evaluation of CHB MLI based shunt APF using low pass filter and self-tuning filter

The increasing demand for high-rating power supply in the distribution system causes the conventional inverter topology, six step voltage source inverter (SSVSI) unsuitable for being applied as active power filter (APF). Multilevel inverter (MLI) is generally the best suitable inverter for APF, but not all types of MLI can be used for high-voltage applications. Among the MLIs topology, cascaded H-bridge (CHB) is the best choice since it can produce output voltage more than twice the amount of DC source. Moreover, CHB MLI topology uses fewer power devices and is simple in design. Low pass filter (LPF) is a common method used for harmonic extraction in this controller. However, this method faces various problems, such as an additional need for phase lock loop (PLL) algorithm and slow transient and steady-state responses. Therefore, self-tuning filter (STF) is introduced as a new filtering method to overcome this problem. This paper evaluates CHB MLI's performance for APF using STF as a harmonic extraction. The model was developed and verified in MATLAB/Simulink. The results show that harmonic extraction using STF performs better total harmonic distortion (THD) than conventional LPF. Nevertheless, both algorithms produce THD below 5%, defined as the permissible value stated in IEEE 519.

Improved Square Wave Injection Strategy for the Voltage Balance Control of Cascaded H-Bridge Rectifier

The modular cascaded H-bridge (CHB) adopted as the active front-end rectifier in the power electronic traction transformer tends to suffer from dc voltage imbalance issues when the load powers of each module are severely unbalanced. The existing square wave injection strategy (SWIS) can improve the capacitor voltage balancing performance, but the maximum amount of the injected square wave in the high-power modules is only 1– <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">M</i> ( <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">M</i> is the average modulation index). In order to extend the load imbalance operation range of the CHB, the improved SWIS (ISWIS) proposed in this paper not only increases the square wave content in the high-power module to 1 (the modulation index is increased to 1.27), but also reduces the phase between the ac voltage and ac current of the high-power module to 0 when the load imbalance becomes severer. These two important changes allow the high-power H-bridge modules to transmit the maximum active power. Moreover, the over-modulation problem caused by the superposition of the opposite compensation signal in the low-power modules is analyzed and an effective solution is then proposed to avoid the current distortion issue. Both simulation and experimental results prove the correctness and validity of the proposed strategy.

A New Level Shifted Carrier Based PWM Technique for a Cascaded Multilevel Inverter Based Induction Motor Drive

The pulse width modulation (PWM) techniques are becoming the game changer for multi-pulse power converter fed multilevel inverter-based induction motor drive (IMD) due to their significant impacts on power quality. In this paper, a new level shifted carrier-based PWM technique is proposed for a 5-level cascaded H-bridge (CHB) multilevel inverter driven by a 36-pulse ac-dc converter based IMD. To meet the power quality demand of IEEE-519 at grid side, a modular transformer is used, and the transformer is coupled to form a 36-pulse ac-dc converter. A 5-level CHB multilevel inverter is utilized on the motor side, which uses the proposed carrier based PWM technique for switching action to ensure superior performance of the IMD. The proposed PWM technique is named as third-harmonic injected inverted sinusoidal carrier PWM (THI2SCPWM), which utilizes 3 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rd</sup> harmonic injection principle with inverted sinusoidal signal to form the proposed carrier signal. The 5-level CHB inverter used in the IMD shows less power loss and total harmonic distortion (THD) with the proposed THI2SCPWM technique. Moreover, the IMD with the THI2SCPWM shows low stator voltage THD, stator current THD, and smooth dynamic response. Apart from these, the THI2SCPWM mitigates the torque ripple of the IMD. The motor drive system with the THI2SCPWM technique is modeled and its performance is simulated on MATLAB/Simulink environment. A scaled down experimental setup is utilized to validate the superiority of the proposed PWM technique.

A novel enhanced deep learning-based fault diagnosis approach for cascaded multilevel inverter

With the widespread use of power electronic converters like Multilevel Inverters (MLI) in various applications, several challenges arise due to increased switch count, capacitor surge current, and reverse current from inductive loads. These factors lead to the onset of faults, which negatively affect the reliability of MLI. Hence, an efficient fault detection and fault tolerant technique are necessary to ensure the reliability of the inverter. The deep learning-based fault detection approach is proposed for a 15-level Cascaded H-Bridge (CHB) MLI to address this issue. The proposed technique involves pre-processing with an Adaptive Hilbert-Huang filter, segmentation using Partial Differential Equation (PDE), feature extraction using Scale-Invariant Feature Transform (SIFT), and classification of fault signals with a Crow Swarm Algorithm (CSA) optimized Convolution Neural Network (CNN) classifier. To evaluate the effectiveness of the proposed approach in fault classification, four complex fault types were considered using MATLAB. The results show that CSA-optimized CNN offers a remarkable classification accuracy of 99.84%.

A Study on the Distributed-Control Architecture of a DSP-Based Solid-State Transformer System with Implementation

This article proposes a Distributed-control Architecture (D-CA) and an operation sequence with start-up strategies for a Digital Signal Processor (DSP)-based Solid-State Transformer (SST). Although various control techniques for SSTs have been reported in earlier studies, there is still a lack of research covering comprehensive content, including hierarchical control architectures and operation sequences with start-ups considering the implementation of DSPs. Therefore, this article addresses the following factors of SST. First, the D-CA is described for the design of the hierarchy between control boards. With the D-CA, because sub-boards are in charge of their corresponding DC-link voltage balancing control individually, the computational burden on the master board can be reduced. Second, the operation sequence of the SST system is explained based on the SST with D-CA. The step of DC-link voltage balance is considered throughout the entire operation sequence for safe driving. Furthermore, the PWM start-up strategies for a Cascade H-bridge Multilevel (CHM) converter and Dual Active Bridge (DAB) converter are proposed to prevent switching pulse errors caused by DSP operating characteristics. These start-up strategies reduce the current surges. The validity of the proposed D-CA and operation sequence with start-up strategies are verified by experimental results.

Double voltage vector model predictive control for grid-connected cascade H-bridge multilevel inverter with fixed switching frequency

Model predictive control (MPC) is an outstanding control method which can achieve superior dynamic response, nonlinear control and multi-objective collaborative control. However, because of unfixed switching frequency, the harmonic spectrum of the output current is dispersed, which would make it difficult to design the output filter. In this work, a double voltage vector model predictive control (DVV-MPC) algorithm for grid-connected cascade H-bridge (CHB) multilevel inverter is presented. The algorithm not only has the advantages of MPC but also produces fixed the switching frequency of the inverter. It is realized by a modulation stage with two adjacent voltage vectors in one switching cycle. And the duty cycle of the associated voltage level is obtained by minimizing an additional cost function. This method is suitable for the cascades of n cells inverter. For reducing the computation burden and eliminating the computation delay, adjacent regions prediction method and time-delay compensation method are applied to the inverter. Finally, in this paper, the proposed strategy is applied to a single-phase grid-connected 7-level CHB inverter. Simulation and experiment are executed to show the advantages of the proposed control algorithm in dynamic state and steady state.

Efficiency of Series APF based on Nine-level NPC Inverter Compared to Seven-level Configuration

This article presents the performance comparison of Series Active Power Filter (Series APF) based on seven and nine multi-level Neutral Point Clamped (NPC) inverters using the same control scheme. The Series APF is one of the most efficient and effective modern custom power devices used in power distribution networks to compensate voltage harmonic and all voltage disturbances. The conventional configuration based on voltage source inverter (VSI) operated at very high switching frequency presents several drawbacks and limited for low power applications. To overcome these problems and improve the output voltage different multi-level are used in various power application in particular Flying Capacitor (FC), Cascade H-Bridge (CHB) and multi-level (NPC) inverters. In this study seven and nine-level (NPC) inverters are proposed for active power filtering system; these inverters present diverse advantages include the capability to reduce the harmonic content, decrease the voltage or current ratings of the semiconductors and mainly they can work at low switching frequency. To generate switching pulses Multi-Carrier Level-Shifted Pulse Width Modulation (MC-LSPWM) control technique is adopted with modified P-Q control strategies. To verify the accuracy and the performance of the proposed Series APF models, simulation is performed using MATLAB-Simulink platform and SimPowerSystem Toolbox. The obtained results show the superiority of series APF based on nine-level in term of THDv reduction compared to the systems with seven-level inverter topology.

Part I—Advancements in Power Converter Technologies: A Focus on SiC-MOSFET-Based Voltage Source Converters

Power converter technologies have become vital in various applications due to their efficient management of electrical energy. With the growing prominence of renewable energy sources such as solar and wind, the high penetration of power electronic converters has been justified. However, ensuring power quality has emerged as a significant challenge for grid-connected power converters. The divergence from the ideal sinusoidal waveform in terms of magnitude and frequency impacts both grid-side currents and voltages. Several studies have proposed solutions to address power quality issues at the load side. The advancement of power converters has been fueled by the development of high-performance microprocessors and the emergence of high-speed switching devices, such as SiC-MOSFETs. This paper focuses on the design of voltage source converters, particularly those based on SiC-MOSFET semiconductor devices. The article presents the design of H-Bridge cells, discusses two-level voltage source converters based on cascade H-Bridge cells in a parallel configuration with experimental fault analysis, addresses the seven-level voltage source converter topology, and explores the design and experimental results of the matrix converter. The findings underscore the importance of considering the entire converter design for improved performance at high switching frequencies. The article concludes by summarizing the main outcomes and implications of this research.

Comparative performance of modular with cascaded H-bridge three level inverters

&lt;span lang="EN-US"&gt;The conventional two-level inverter becomes no longer has the ability to cope with the high-power requirement, so this paper discusses two very common topologies of multilevel inverter like modular multi-level converter (MMC) and cascaded H-bridge (CHB) multi-level inverter for induction motor drive applications. This work attempts to investigate the comparison between MMC and CHB. The comparison is done in aspects of the configuration, concept of operation, advantages and disadvantages, the comparison is also consider output voltage (line to line) waveform, total harmonic distortion (THD) of the output line voltage waveform and the current drawn by both inverters. The performance of the inverters under carrier-based pulse width modulation (PWM) technique and mainly in-phase disposition (IPD), level shifted pulse width modulation is viewed. The paper discusses the comparison between the two multilevel inverters (MLIs) with motor drive applications especially induction motor. The operation of the motor is studied under certain value of load torque. The simulation results for the induction motor with the two inverters (modular multi-level and Cascaded H-bride) for three numbers of levels using MATLAB/Simulink are provided). The obtained results are encouraging and promising especially in the improvement of the THD% results.&lt;/span&gt;