Card Cage Research Articles

IPTEKS Bagi Masyarakat Kelompok Pembudidaya Lobster

Due to the increasing demand for lobster raw materials, the demand for lobster seeds continues to increase. UD Sari Laut as a lobster farming group is struggling to meet the demand for lobsters due to the limited number of floating net cages (In Indonesian called KJA) for running lobster seed farms. In an intensive lobster farming business, it is estimated that about 70% of production costs come from feed costs. The aim of this activity is to implement waste fishing technology using floating maps to increase the scale of lobster farming and reduce feed purchase costs. The activity method used is the demonstration plot directly with activity partners with activity stages including preparation for the purchase of floating net cages (KJA) and floating maps, group training, coaching, monitoring and evaluation. The result of this activity was the addition of KJA plots to 9 plots, previously only 6 plots giving a positive value to UD Sari Laut. Besides being able to house about 1,350 lobster seeds, with the addition of KJA plots it can also be used for lobster seed nursery operations with a profit of Rp. 2,970,000/month. The results of the garbage floating cards purchasing activity to meet the need for comprehensive lobster culture feed in KJA provides positive value for KUB Cinta Bahari. Where before having a floating card, the growers usually bought waste fish from fishermen around the site. The cost of buying waste fish ranges from Rp. 30,000 - Rp 50,000, depending on the season and the size of the business. So, with the operation of the floating card, the production cost of feed can be reduced. The existence of this floating card provides additional income, selling fish of high commercial value in the market. The conclusion of this activity is that this activity has a positive value for the target group, by increasing the number of floating net cages for the storage and breeding of lobster seeds and the availability of floating card cages.

Final design and test results of a high voltage amplifier for a gyrotron body power supply

The design of a high voltage amplifier was being developed that uses series-connected transistors to control the output [Tooker and Huynh, 2013]. Although having many potential applications, this amplifier is designed to meet at a minimum the requirements of a body power supply for depressed collector gyrotrons that are used in electron cyclotron systems on the DIII-D tokamak and other devices worldwide. Therefore, the output voltage needs to be adjustable up to 35kV DC and be capable of square-wave modulation at frequencies up to 5kHz. Continuous operating body currents for a gyrotron are on the order of a few tens of milliamps. However, to attain the required speed for modulation with load capacitances as high as 2.5nF, the ability to both source and sink peak currents as high as 5–10A is required.The design of a 40kV, 250mA high voltage amplifier has now been completed and the amplifier was fabricated. The transistors are configured into modules and the modules are mounted in four card cages within an enclosure that has a size equivalent to a standard electronics rack. The high voltage DC power supply, that provides the input voltage to the amplifier section, and the controls for the amplifier are housed within a separate electronics rack. An 800kΩ, 2.5nF dummy load for testing the amplifier was also fabricated, and the amplifier was been tested into this load up to its full output.The description of the recently completed amplifier and the test results will be presented.

Free-space optical interconnection technology in parallel processing systems

A critical element in building parallel computers that use very fast processing elements is interprocessor communication. To utilize the processing elements efficiently, the interconnects in such parallel computers must provide high data rates and low latencies with extremely high reliability, compactness, and reasonable cost. We discuss the application of free-space optical links for interprocessor communication in parallel computers. Free-space transmitter and receiver modules have been fabricated and installed in a card cage enclosure. Repeatable signal levels have been achieved, after board removal and replacement, without the use of any micropositioners or adjustments. A time-division-multiplexed (TDM) ring network using high-speed (1 Gbit/s), point-to-point, free-space links has been designed to provide full connectivity among a set of processors connected to the ring nodes. Work is under way to demonstrate the 1DM ring network concept in a multiprocessor computer.

An Experimental Investigation of a Staggered Array of Heatsinks in the Hydrodynamic and Thermal Entrance Regions of a Duct

The need for methods to predict temperatures of electronic packages is becoming more important as time to market decreases and the need to reduce engineering costs increases. Geometric parameters that are commonly found in a card cage computer design are duct height to package height ratio (H/B) and longitudinal to latitudinal spacing (L/D). The velocity of the air flowing through the card cage is also an important parameter. The purpose of this experimental research is to develop correlations that can be used to predict heat transfer coefficients and thus temperatures of electronic packages in a staggered array in the hydrodynamic and thermal entrance regions of a duct. The ten components in the array are mounted on one wall of the duct to simulate a printed circuit board in a card cage. Results are presented for three values of Reynolds number (20250, 50000 and 65000) for a range of H/B from 1 to 5 by increments of 2 while L/D is varied from 1 to 3 by increments of 0.5. Comparisons are made between upstream and downstream packages. It was determined that one correlation could be used to predict the Nusselt number for upstream heatsinks. This correlation is a function of Reynolds number and H/B. The results also indicate that three correlations are necessary to predict the Nusselt number of downstream heatsinks. When H/B = 1, the Nusselt number is only a function of Reynolds number; when H/B is greater than 1 and L/D is less than 2, the Nusselt number is dependent on Reynolds number, H/B and L/D; when H/B is greater than 1 and L/D is greater than or equal to 2, the Nusselt number is a function of Reynolds number and H/B.

Dynamic behavior of cycloconverter system

The dynamic behavior of a multiprocessor-based 12-pulse circulating current cycloconverter is discussed. This type of cycloconverter can provide a high output to input frequency ratio for fixed and variable-frequency applications. Waveform level simulation of the cycloconverter indicates that both feedback and feedforward techniques can be used to minimize the tracking error of the circulating current controller. The lab prototype is used to test the response of the 12-pulse, single-phase cycloconverter system. The control is implemented by a total of six 16-b microprocessor cards and additional input and output cards resident in a single card cage. >

System Architecture of a Gallium Arsenide One-Gigahertz Digital IC Tester

The design for a 1-GHz digital integrated circuit tester for the evaluation of custom GaAs chips and subsystems is discussed. Technology-related problems affecting the design of a GaAs computer are discussed, with emphasis on the problems introduced by long printed-circuit-board interconnect. High-speed interface modules provide a link between the low-speed microprocessor and the chip under test. Memory-multiplexer and memory-shift register architectures for the storage of test vectors are described in addition to an architecture for local data storage consisting of a long chain of GaAs shift registers. The tester is constructed around a VME system card cage and backplane, and very little high-speed interconnect exists between boards. The tester has a three part self-test consisting of a CPU board confidence test, a main memory confidence test, and a high-speed interface module functional test.

Microcomputer control for soil moisture-based scheduling center pivot irrigation systems

A microprocessor-based controller has been developed to regulate soil water levels under center pivot irrigation systems. Inputs from a rain gauge and soil water sensors placed at two depths at several locations in the field provide information by which control decisions are made. Control algorithms based on soil-water retention curves determine when to begin irrigating the field and the amount of water to apply. A field test was performed and changes to the algorithm are suggested as a result of the test. The controller developed to implement the algorithms consists of a card cage containing both pre-manufactured boards and custom designed circuitry.

VLSI system design by the numbers: Design frames and system kits promise to simplify the development of VLSI-based systems

Two new concepts for computer development now being developed are design frames and system kits. The design frames take care of the details of interfacing new integrated circuits with a standard bus, and system kits provide a hardware and software standard for prototypes consisting of one or many design-frame-based circuit boards. A system kit starts with the basic prototyping hardware required to build a complete computer system: card cages, power supplies, memory boards, and so forth. These off-the-shelf parts are chosen so that they can work together through standard bus protocols, circuit-board form factors, and software conventions. The prototyping hardware is then augmented by design frames-a special interfacing technique for closely integrating custom chips and printed-circuit boards into the system.

New product applications: VLSI development system uses two 12-MHz 32-bit processors, offers up to 4 megabytes of physical memory in Multibus card cage

New product applications: VLSI development system uses two 12-MHz 32-bit processors, offers up to 4 megabytes of physical memory in Multibus card cage

Instrumentation VI: What's new in test gear: The shopping list of versatile, compact, and cost-efficient instruments is an engineer's delight

Two trends can be seen in test and measurement instruments. The first is the movement toward instrument clusters-mini instrument systems-and away from the individual instrument of the past. These instrument systems are either hooked up together with external interface cables, or are tied together on card cages in a single package. The other trend is the development of low-cost dedicated instruments to do well only specific tasks at minimum cost.

APE II...A modern analog/hybrid computer for laboratory instruction

The APE (Arizona PEdagogical) II computer system com prises a 12-amplifier solid-state analog computer (iterative differential analyzer) capable of both real-time and repeti tive operation, and a digital-logic module with patchable digital logic. A flexible digital clock generates computer- reset and sampling pulses. Random and pseudo-random noise generators and digital readout counters permit a wide variety of statistical studies as well as simulation ex periments with sampled-data control systems, automatic optimization, boundary-value problems, and simple com bined analog-digital computation at minimum cost. Special experiments can be stored on removable patchboards. Perhaps the most interesting technical feature of the new computer is its novel packaging technique: amplifier and integrated-circuit logic cards plug directly into the rear of the inexpensive patchbay receivers, which serve, thus, as card cages and save much inter-unit wiring.