Capacitive Sensor Readout Research Articles

Capacitive sensor readout circuit based on sample and hold method

This paper presents a capacitive sensor readout circuit using sample and hold method. The proposed readout circuit is used to convert capacitance from sensor to DC (direct current) voltage output. The basic structure of readout circuit consists of the pulse generator circuit, differentiator circuit, amplifier circuit, monostable I circuit, monostable II circuit, and sample and hold circuit. The proposed technique is based on the change of time constant from differentiator circuit corresponding to the measurement capacitance. The sample and hold circuit is used for sampling output voltage from differentiator circuit. The output voltage of the proposed readout circuit is proportional to measurement capacitance. The standard capacitors with different capacitance are used to test the proposed converter performance. Experimental results show that the proposed readout circuit can convert measurement capacitance to output voltage with satisfied values, good linearity and high sensitivity.

Development of a Real-Time Force and Temperature Sensing System with MEMS-LSI Integrated Tactile Sensors for Next-Generation Robots

This study proposes a sensing system that can sense force and temperature at the same time. The system consists of MEMS-LSI integrated tactile sensor devices called sensor nodes, a field-programmable gate array (FPGA) based relay node, and a host PC. For real-time temperature and force data acquisition, a time-sharing force and temperature task processing mechanism was implemented with a dedicated computer architecture in the FPGA configuration and the host program. This study firstly reports the temperature dependency analysis of a capacitive sensor readout circuit in the sensor node by circuit-level simulation. With a fabricated sensor node, sensor output data were measured and analyzed with varying temperatures and applied force. Based on the measured data, linear multiple regression equations for temperature compensation of sensed force data were developed. In the temperature range of 24.8°C–60°C, the average/maximum force errors when considering the temperature effect were −0.98%/65% without the compensation, and 0.072%/17% with the compensation, respectively. One cycle time of temperature and force sensing for one sensor node was 113 ms on average. The experimental results showed that real-time temperature and force sensing and temperature compensation for accurate force sensing could be achieved successfully. The study also demonstrated the system with hot-coffee cup and finger touch examples.

A Capacitance-to-Time Converter-Based Electronic Interface for Differential Capacitive Sensors

In this paper we present an oscillating conditioning circuit, operating a capacitance-to-time conversion, which is suitable for the readout of differential capacitive sensors. The simple architecture, based on a multiple-feedbacks structure that avoids ground noise disturbs and system calibrations, employs only three Operational Amplifiers (OAs) and a mixer implementing a square wave oscillator that provides an AC sensor excitation voltage. It performs a Period Modulation (PM) and a Pulse Width Modulation (PWM) of the output signal proportionally to the sensor differential capacitance values. The sensor variation range and the detection sensitivity can be easily set through the additional resistors. Preliminary PSpice simulation results have shown a good agreement with theoretical calculations as well as a linear response with a high detection sensitivity of differential capacitive sensors having a baseline in the range [2.2 ÷ 180 pF]. Moreover, different experimental measurements have been also performed by implementing the circuit on a laboratory breadboard using commercial discrete components so validating the idea and providing the circuit performances with different kind of differential capacitive sensors achieving detection resolutions of about 0.1 fF in an overall differential capacitive variation range that is equal to ±15.8 pF. The achieved results demonstrate that the proposed interface solution is suitable for on-chip integration with different kinds of differential capacitive sensing devices, such as Micro-Electro-Mechanical-System (MEMS), force/position, and humidity sensors in biomedical and robotics applications.

A CMOS full-range linear integrated interface for differential capacitive sensor readout

This manuscript presents the development of an integrated analog interface able to convert differential capacitive sensors variations into a DC voltage. The presented circuit exploits the architecture developed in previous works of the same authors, based on autobalancing bridge techniques, further improving its performances through the linearization of the input/output characteristic and the achievement of the full-range sensor variations capability. The interface takes advantage of Low Voltage and Low Power integrated circuit design techniques, optimizing performances for flux and force sensor. Simulated results with the AMS 0.35um standard CMOS technology have shown a very good agreement with the theoretical model developed, obtaining an error lower than 2.5% and a total power consumption of 5 mW. Moreover, waiting for the chip production, a discrete element board has been also implemented and tested. Preliminary measurements on the test board have shown satisfactory input/output linearity characteristics with overall reduced percentage error (lower than 1.5%) in the measurand estimation.

Integrated ExG, Vibration and Temperature Measurement Front-End for Wearable Sensing

This paper presents a programmable CMOS integrated front-end ASIC targeting the acquisition of signals in biomedical applications, including rehabilitation and treadmill exercise monitoring. The analog front-end is combined with a commercial microcontroller for clock generation, signal processing, and feedback generation. The ASIC provides a unique combination of sensing interfaces, including a dc-coupled ExG monitor including variable gain amplification with 34–60 dB tunable gain range, 31-step offset compensation, as well as a capacitive sensor readout for piezoelectric vibration measurement (which can alternatively be used as a buffer for sensors with voltage output) providing 28.6-dB attenuation and $16~V_{\mathrm {pp}}$ effective input range below 100 Hz, a 1 °C-precision thermometer, a 50-/60-Hz switched-capacitor notch filter for mains interference reduction, and an 8-bit analog-to-digital pulse-width-modulating converter. The design is realized in 180-nm technology where it occupies an area of 0.06 mm2. Measured results are reported which confirm the intended operation.

Rapid prototyping of force/pressure sensors using 3D- and inkjet-printing

This work reports on inkjet- and 3D-printed force/pressure sensing devices. The employed printing processes can enable cost- and resource-efficient, fast and flexible designs compared to solid-state technology which is used as a reference design. The pressure sensing devices are realized as either 3D-printed steel or 3D-printed ceramic diaphragms. Both designs thus withstand harsh environmental conditions and elevated temperatures. Additionally, the increased size guarantees less sensitivity to dirt or moisture due to the larger diameter of the diaphragms. The hardware used for the capacitive sensor read-out is based on a shunt measurement system and subsequent demodulation. This architecture enables long cabling, allowing for large parasitic capacitances, without significant loss of transferred signal power, due to the employed power matching to the transmission line. Physical analyses such as contact angle measurements, profilometer measurements, and focused ion beam analysis are done to characterize the resulting printed surfaces. Then, the response of both designs is evaluated by applying force on the diaphragms surface using a moveable load cell. The gathered results are also compared to finite element method simulations.

Implementation of 144 × 64 Pixel Array Bezel-Less Cmos Fingerprint Sensor

Abstract This paper proposes CMOS integrated 144 × 64 pixel array fingerprint sensor without a bezel electrode. In this paper, the architecture of CMOS capacitive fingerprint sensor readout circuit is presented for general type of a switched capacitive integrator scheme. The pipelined scan driver is included in the fingerprint sensor for fast image capture. It is implemented on 0.35 μm standard CMOS process technology. The operation is validated by SPECTRE for one-pixel and RTL simulation including logic synthesis for a full chip design on condition of 0.35 µm typical CMOS process and 3.3 V power. The layout is performed by full custom flow for sensor cell array and auto P&R for a full chip. The area of a full chip is 4943 μm × 3943 μm and the gate count is 542,000. The area of one-pixel is 48 × 48 µm2. The pitch is 50 µm and image resolution is 508 dpi and power consumption is less than 3 mA.

Wide Input Range Supply Voltage Tolerant Capacitive Sensor Readout Using On-Chip Solar Cell

In this paper, a wide input range supply voltage tolerant capacitive sensor readout circuit using on-chip solar cell is presented. Based on capacitance controlled oscillators (CCOs) for ultra-low voltage/power consumption, the sensor readout circuit is directly powered by the on-chip solar cell to improve the overall system energy efficiency. An extended sensing range with high sensing accuracy is achieved using a two-step successive approximation register (SAR) and delta-sigma ([Formula: see text]) analog-to-digital (A/D) conversion (ADC) scheme. Digital controls are generated on-chip using a customized sub-threshold digital standard cell library. Systematic error analysis and optimization including the finite switch on-resistance, buffer input-dependent delay, and SAR quantization nonlinearity are also outlined. High power supply rejection ratio (PSRR) is ensured by using a pseudo-differential topology with ratiometric readout. The complete sensing system is implemented using a standard 0.18[Formula: see text][Formula: see text]m complementary metal-oxide-semiconductor (CMOS) process. Simulation results show that the readout circuit achieves a wide input range from 1.5[Formula: see text]pF to 6.5[Formula: see text]pF with a worst case PSRR of 0.5% from 0.3[Formula: see text]V to 0.42[Formula: see text]V (0.67% from 0.3[Formula: see text]V to 0.6[Formula: see text]V). With a 3.5[Formula: see text]pF input capacitance and a 0.3[Formula: see text]V supply, the [Formula: see text] stage achieves a resolution of 7.1-bit (corresponding to a capacitance of 2.2[Formula: see text]fF/LSB) with a conversion frequency of 371[Formula: see text]Hz. With an average power consumption of 40[Formula: see text]nW and a sampling frequency of 47.5[Formula: see text]kHz, a figure-of-merit (FoM) of 0.78[Formula: see text]pJ/conv-step is achieved.

An RFID-based on-lens sensor system for long-term IOP monitoring.

In this paper, an RFID-based on-lens sensor system is proposed for noninvasive long-term intraocular pressure monitoring. The proposed sensor IC, fabricated in a 0.18um CMOS process, consists of capacitive sensor readout circuitry, RFID communication circuits, and digital processing units. The sensor IC is integrated with electroplating capacitive sensors and a receiving antenna on the contact lens. The sensor IC can be wirelessly powered, communicate with RFID compatible equipment, and perform IOP measurement using on-lens capacitive sensor continuously from a 2cm distance while the incident power from an RFID reader is 20 dBm. The proposed system is compatible to Gen2 RFID protocol, extending the flexibility and reducing the self-developed firmware efforts.

A Self-Powering Wireless Environment Monitoring System Using Soil Energy

This paper presents a self-powering wireless environment monitoring system using renewable and cost-efficient soil energy. The D-size (55.8 cm $^{3})$ soil energy cell with carbon and zinc electrodes can produce $\sim 60$ –100 $\mu \text{W}$ , depending on the water contents and microbial reactions in the soil. The $RC$ circuit model of a soil cell is proposed for understanding the electrical characteristics of the cell. The wireless sensing system, including temperature and air moisture sensors, a custom low-power capacitive sensor readout silicon chip, a microcontroller, and a Bluetooth low-energy transmitter, is demonstrated for long-term environmental monitoring solely by the fabricated D-size soil cell. The capacitive sensor readout chip is fabricated in a 0.18- $\mu \text{m}$ CMOS process and only consumes 3 $\mu \text{W}$ . The capacitance readout range is 160–200 pF. The total power consumption of the wireless temperature and air moisture monitoring system is $\sim 20~\mu \text{W}$ and 1 mW in the sleep mode and the active wireless data communication operations, respectively. The new technology can enable remote field environment monitoring with less labor-intensive work and battery replacement.

Simple Cost Effective and Network Compatible Readout for Capacitive and Resistive (Chemical) Sensors

The described application directs the integration of capacitive and resistive sensors for environmental parameters monitoring (CO2, relative humidity, dew point and temperature) in low cost applications which can be made on flexible substrate, which was developed in the European FP7 project INTERFLEX [1]. This type of applications on plastic substrates requires a reduction of amount and type of components in order to reduce costs through simplification of assembly processes as well as enhancement of the reliability. This paper describes a very simple low power and cost effective architecture for readout of capacitive and resistive sensors, which uses few external components, exploiting a STMicroelectronics STM8L15x microcontroller and sensors developed by Fraunhofer Research Institution for Modular Solid State Technologies (EMFT).

A Digital Readout Approach for Differential Capacitive Pressure Sensor

An approach providing a digital output linearly proportional to capacitance difference for capacitive pressure sensor is presented. Based on sigma-delta (ΣΔ) technique, the structure is insensitive to circuit imperfections and component mismatch, permitting the realization of digitized capacitive sensor readout with good accuracy. Analysis shows that a resolution as high as 20 bits is achievable. Simulation results are given to confirm the effectiveness.

Readout of MEMS capacitive sensors beyond the condition of pull-in instability

The ongoing transition between micro and nano electromechanical systems (MEMS and NEMS) based on capacitive sensing requires a solution to the problem of pull-in instability and, on the whole, to the relevance of the electrostatic readout forces with respect to other forces to be sensed (inertial, magnetic,…). The paper analyzes the case of a differential accelerometer which is dimensioned to be subject to instability (i.e. with a negative equivalent stiffness), when combined with a constant voltage readout of ±1.8 V. A charge controlled readout principle, based on an electronic feedback loop, is presented. Its switching capacitor VLSI implementation, built in a CMOS 0.35 μm technology is used to demonstrate, through experimental results, that this approach is effective in the minimization of the electrostatic readout forces.

Low Parasitic Capacitance and Low-Power CMOS Capacitive Fingerprint Sensor *

In this paper, a low parasitic capacitance and low-power CMOS capacitive fingerprint sensor readout circuit is presented. The side effect of parasitic capacitance has been under control with novel layout structure in sensor cell, and minimal size switch is used to reduce non-ideal effects of MOS switch and achieve good linearity. Power dissipation is also reduced with quiescent current control in buffer amplifier of sensor cell. A prototype chip with 32 × 32 array size has been fabricated using TSMC 0.35μm CMOS process. The chip works at 3.3V power supply and operates at 4MHz clock rate. Capacitance value from 0fF to 60fF can be sensed, corresponding analog output voltage is from 3.02V to 1.57V and the digital output is 6 bits. The overall power consumption is less than 5.5mW.

Indirectly heated micro-electrothermal actuator with a monolithically integrated displacement sensor

In this article, an indirectly heated micro-electrothermal actuator is presented. The actuator has a capacitive sensor monolithically integrated to provide in vivo sensing of the actuator’s displacement. The actuator and sensor are fabricated using the PolyMUMPs process. Electrothermal and thermal-mechanical models of the actuator have been developed. Simulated displacement versus input current reasonably agrees with tested results. The integrated capacitive sensor readout is an indicator for the displacement.

An interface circuit for measuring capacitance changes based upon capacitance-to-duty cycle (CDC) converter

We present a direct-to-digital capacitive sensor readout circuit that converts capacitance changes of a sensor element to changes of the duty cycle of a square-wave oscillator, which, in turn, is converted to a digital output by a counter. The readout circuit resembles a single-slope analog-to-digital converter structure. There are several advantages of this readout scheme. First, due to its simplicity and low number of components, the power consumption of the circuit is expected to be significantly smaller than in similar digital readout designs. Furthermore, linearization of the output may be achieved using an EEPROM lookup table. Another advantage is the possibility of performing adaptive measurements where the sensor resolution and bandwidth may be changed via the readout circuit software. Finally, we present a theory of the adaptive measurement and an analysis of the design tradeoffs. The capacitance-to-duty cycle readout circuit may achieve large bandwidth and high resolution in a modern low-voltage, low-power CMOS implementation. The performance of a prototype readout circuit built from discrete components is 13-bit effective resolution with a 1-kHz bandwidth.

Constant charge operation of capacitor sensors based on switched-current circuits

A new method to perform the readout of capacitive sensors is presented in this paper. The sensitivity of integrated capacitive sensors is investigated and compared considering two different approaches. The traditional approach, in which a voltage source is connected via a resistor to the capacitor, and a completely different approach, in which the charge residing in the capacitor is kept constant. With this second technique, the charge injected to define the dc operating point is maintained constant and a linear relationship between the external excitation and the voltage monitored is obtained. As pointed out by the authors in previous works, the use of current pulses allows injecting and controlling the charge stored in an electrostatic microactuator. In order to avoid the effect of the leakage currents, the charge is periodically refreshed. In this way, the charge is maintained constant inside the refresh cycle. In this paper, it is shown that this technique can be applied to capacitive sensors instead of electrostatic microactuators. The effects derived of using the temporal window, inside the refresh cycle to sense an external excitation, are further investigated. It is shown that the sensitivity of the sensor is increased in front of the obtained one with the voltage drive mode because the plates of the sensor can be fixed after the voltage pull-in distance without instability. Moreover, no voltage penalty is produced because the voltage developed across the transducer decreases after the pull-in distance. This method is introduced and studied through simulations, confirming the theoretical predicted behavior.

High-accuracy circuits for on-chip capacitive ratio testing and sensor readout

This paper presents novel CMOS switched-capacitor circuits for high-accuracy, on-chip capacitive-ratio testing and sensor readout. Using sigma-delta and correlated-double-sampling (CDS) techniques, these circuits provide accurate digitized capacitive-ratio readout. Both single-ended and fully differential circuits are presented. Simulation results show that the resolution can be as fine as 100 aF for 10 pF capacitors. Single-ended circuit and fully-differential circuits were implemented and tested. The measured standard deviation was below 20 aF when 10 pF capacitors were tested.

A capacitive pressure sensor with low impedance output and active suppression of parasitic effects

This paper describes the design, operating principles and performance of a capacitive pressure sensor in silicon, combined with a dedicated CMOS interface circuit. The readout circuit is designed to suppress parasitics and to yield an output signal proportional to pressure. The sensor-specific part is fabricated using standard photolithography, silicon micromachining in KOH, and anodic silicon/glass bonding at wafer level. The devices measure 2.2 × 3.5 × 0.8 mm and show a typical zero-pressure capacitance of 10 pF, with pressure-induced changes up to 250%. The interface chip ‘CAPRICE’ (CApacitive Pressure sensor Readout IC) is processed in a 3 μ n-well CMOS process and was designed to anticipate the intrinsic drawbacks of the capacitive transducing principle, i.e. sensitivity to environment noise, nonlinear output response and effects of parasitic capacitances. These drawbacks have always prevented the breakthrough of integrated capacitive mechanical sensors. CAPRICE, however, converts small capacitance variations into a noise-insensitive output voltage and a first-order linearisation is achieved by inversion of the hyperbolic capacitance versus pressure relationship. A second-order linearisation is obtained by the adoption of a novel suppression scheme for parasitic capacitances to the substrate. Parasitic capacitance rejection ratios up to 80 dB can be achieved in this way, enabling the practical feasibility of capacitive pressure sensors with less than 0.5% of full-scale nonlinearity.

Uniform aluminum deposits on large non-planar and planar polyimide substrates by physical vapor deposition : Gerald J. Hale. Solid-St. Technol.141 (February 1981)

This paper describes the design, operating principles and performance of a capacitive pressure sensor in silicon, combined with a dedicated CMOS interface circuit. The readout circuit is designed to suppress parasitics and to yield an output signal proportional to pressure. The sensor-specific part is fabricated using standard photolithography, silicon micromachining in KOH, and anodic silicon/glass bonding at wafer level. The devices measure 2.2 × 3.5 × 0.8 mm and show a typical zero-pressure capacitance of 10 pF, with pressure-induced changes up to 250%.The interface chip ‘CAPRICE’ (CApacitive Pressure sensor Readout IC) is processed in a 3 μ n-well CMOS process and was designed to anticipate the intrinsic drawbacks of the capacitive transducing principle, i.e. sensitivity to environment noise, nonlinear output response and effects of parasitic capacitances. These drawbacks have always prevented the breakthrough of integrated capacitive mechanical sensors. CAPRICE, however, converts small capacitance variations into a noise-insensitive output voltage and a first-order linearisation is achieved by inversion of the hyperbolic capacitance versus pressure relationship. A second-order linearisation is obtained by the adoption of a novel suppression scheme for parasitic capacitances to the substrate. Parasitic capacitance rejection ratios up to 80 dB can be achieved in this way, enabling the practical feasibility of capacitive pressure sensors with less than 0.5% of full-scale nonlinearity.