This work focuses on understanding the defect‐related electronic transport in cadmium sulfide (CdS) thin films, and finds thermal treatment as an efficient tool to tailor its intrinsic defect charge carrier concentration for optimum visible‐light photodetection performance. The radio frequency (RF)‐sputtered CdS thin‐films show a substantial decrease in measured dark‐current by three orders of magnitude (μA to nA) with an increase in substrate deposition temperature (Ts) from room‐temperature (RT) to a maximum of 400 °C. With increase in Ts, the current conduction behavior changes from Ohmic (at RT) to Schottky‐behavior (Ts ≥ 100–400 °C). The decrease in dark‐current and the crossover from Ohmic to Schottky electronic transport behavior, pointed to a decrease in defect‐density charge carrier concentration, with increased Ts. Additionally, post‐deposition thermal annealing of CdS thin films also is found to result in a similar decrease in dark‐current (μA to nA). The photo‐to‐dark‐current ratio of CdS thin‐film visible‐light photodetectors increased by two‐orders of magnitude, and its dynamic response time decreased by an order of magnitude via. thermal engineering. The thermal‐annealing treatment possibly reduced the defect‐related trap‐sites, which enables a reliable and faster photo‐switching response for CdS thin‐film‐based visible‐light photodetectors.
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